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WO2006031097A1 - Procede de soudage d'interconnexion protegee - Google Patents

Procede de soudage d'interconnexion protegee Download PDF

Info

Publication number
WO2006031097A1
WO2006031097A1 PCT/NL2004/000638 NL2004000638W WO2006031097A1 WO 2006031097 A1 WO2006031097 A1 WO 2006031097A1 NL 2004000638 W NL2004000638 W NL 2004000638W WO 2006031097 A1 WO2006031097 A1 WO 2006031097A1
Authority
WO
WIPO (PCT)
Prior art keywords
solder material
signal
solder
signal conductor
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/NL2004/000638
Other languages
English (en)
Inventor
Mark Ruiter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Stichting ASTRON
Original Assignee
Stichting ASTRON
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stichting ASTRON filed Critical Stichting ASTRON
Priority to PCT/NL2004/000638 priority Critical patent/WO2006031097A1/fr
Publication of WO2006031097A1 publication Critical patent/WO2006031097A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09809—Coaxial layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a shielded waveguide interconnection soldering method according to the preamble of claim 1.
  • the invention also relates to a first component with an interconnection means soldered to it by means of such soldering method.
  • the invention further relates to an assembly of such first component and a second component.
  • the invention further relates to a solder mask for use in such soldering method.
  • connection means refers to (part of) the means that interconnects different components in a condition in which these components are interconnected.
  • a soldering method for making a shielded waveguide interconnection between different components is known from practice.
  • planar circuits are interconnected with one another, or connected to other components, by using the so-called Ball Grid Array method (BGA).
  • BGA Ball Grid Array method
  • the obtained shielded waveguide interconnection means is formed by a 3 x 3 square portion of the two- dimensional array of solder balls.
  • the solder ball in the center of said square portion functions as the signal conductor of the shielded interconnection means, while the surrounding solder balls of said portion together function as signal shield.
  • This known BGA-based soldering method provides a low-cost way of making a shielded interconnection.
  • a drawback of this known method is that the shielding effect achieved by the surrounding solder balls is insufficient, especially for higher electromagnetic frequencies.
  • the method according to the invention substantially only requires modifications to the solder mask and, accordingly, to the way of applying the solder material in passageways through the solder mask. Since these modifications are not particularly complex, the method according to the invention is low-cost. Furthermore, since the longitudinal direction of the elongated part of the signal shield solder material has a component which is tangential with respect to the signal conductor solder material, the shielding effect that will be achieved by the signal shield solder material of the method according to the invention will be improved over the shielding effect achieved by the surrounding solder balls of the known soldering method.
  • Fig. IA schematically shows a side view of an example of a first component comprising a first end surface provided with a first shielded waveguide end;
  • Fig. IB schematically shows an upper view of the first component of Fig. IA;
  • Fig. 1C schematically shows a side view of an example of a second component comprising a second end surface provided with a second shielded waveguide end;
  • Fig. ID schematically shows an upper view of the second component of Fig. 1C;
  • Fig. 2A schematically shows an upper view of an example of a solder mask for use in a method according to the invention
  • Fig. 2B schematically shows a cross section of the solder mask of
  • Fig. 2A taken along the line HB of Fig. 2A.
  • FIGs. 3A-3I schematically show some stages in a method according to the invention
  • Fig. 4A schematically shows a perspective view of an example of solder material, after being soldered in a method according to the invention
  • Fig. 4B schematically shows a cross section of the solder material of Fig. 4A.
  • Figs. 5A-5F schematically show in cross section some other examples of solder material, after being soldered in a method according to the invention
  • Fig. 6 schematically shows a perspective view of another example of a solder mask for use in a method according to the invention.
  • Figs. 1A-1D show a first component 10 comprising a first end surface 11 provided with a first shielded waveguide end 12, which comprises a first signal conductor end 14 and a first signal shield end 15.
  • Figs. 1C and ID show a second component 20 comprising a second end surface 21 provided with a second shielded waveguide end 22, which comprises a second signal conductor end 24 and a second signal shield end 25.
  • the first and second components 10 and 20 may for example be integrated circuits, electronic packages, printed circuit boards, electronic connectors, test fixtures or the bike.
  • the first and second shielded waveguide ends 12 and 22 are ends of shielded, for example coaxial, waveguides (not shown) in the components 10 and 20.
  • the waveguide ends 12 and 22 may for example comprise shielded electrical pads which are electrically connected to conductors or electrically conductive vias in the components 10 and 20.
  • the first and second signal conductor ends 14 and 24 have disk shapes, while the first and second signal shield ends 15 and 25 have flat ring shapes.
  • the shielded waveguide is a coaxial waveguide.
  • the shielded waveguide may likewise be of a different kind and, for example, include conductor ends which are not positioned in the center of the shielded ends.
  • Fig. 3A shows, in side view, the first component 10 of Figs. IA and IB.
  • the first signal conductor end 14 and the first signal shield end 15 of the first shielded waveguide end 12 are electrical pads.
  • the first component 10 comprises an array of disk shaped electrical pads 16, which are located at the first end surface 11 and arranged in a two-dimensional equidistant grid outside the range of the surface 11 where the first shielded waveguide end 12 is located.
  • a first solder mask such as the first solder mask 30 shown in Figs. 2A and 2B, is positioned over the first end surface 11 of the first component 10.
  • the first solder mask 30 comprises an array of cilindrical passageways 31 through it, which array is designed to match the array of pads 16 at the first end surface 11 when the mask 30 is positioned over the end surface 11. By this matching each passageway 31 ends at a pad 16.
  • the mask 30 further comprises a number of differently shaped passageways 33 through it. In the shown example this number is four.
  • each of these passageways 33, in an upper view of the first solder mask 30, is a sector of an imaginary ring shaped passageway through the mask 30. In the center of such imaginary ring the mask 30 comprises a cilindrical passageway 32 through it.
  • the passageways 32 and 33 are designed such that, when the mask 30 is positioned over the end surface 11, the passageway 32 ends at the first signal conductor pad 14 and the passageways 33 end at the first signal shield pad 15.
  • the passageways 31 may have any suitable cross-sectional shape.
  • the cross- sectional shape of the passageways 31 may or may not be the same as the shape of the pads.
  • Fig. 3B shows the situation in which the mask 30 is positioned on top of the first end surface 11 of the first component 10, wherein it is assumed that the passageways 31, 32 and 33 are in line with the electrical pads 16, 14 and 15, respectively.
  • Fig. 3B further shows first solder material 34 which, in a further step of the method, has been inserted into the passageways 31, 32 and 33.
  • Such insertion of the first solder material 34 can for example be carried out by wiping soft solder material 34 over the mask 30, wherein excess solder material 34 can for example be removed by moving a suitable beam along the free surface of the mask 30.
  • the mask 30 is lifted up, leaving behind the first solder material 34 on the pads 14, 15 and 16 as shown in Fig. 3C.
  • suitable materials can be used for the solder material 34, for example 90/10 Pb/Sn added with a suitable flux, as known in the art.
  • the first solder material 34 is hardened, for example in a reflow oven, as known in the art.
  • a suitable heating temperature of the reflow oven is for example 250 degrees Celcius.
  • Fig. 3D shows the hardened solder material 34 after thus being soldered to the pads 14, 15 and 16. As shown in Fig.
  • this hardened solder material 34 comprises signal conductor solder material 35 soldered to the first signal conductor end 14, and signal shield solder material 36 soldered to the first signal shield end 15.
  • Figs. 4A and 4B show a perspective view of a part of the soldered assembly of Fig. 3D.
  • the disk shaped pad 14 as well as part of the ring shaped pad 15 are shown, with the signal conductor solder material 35 and one part of the signal shield solder material 36 soldered to these respective pads.
  • broken lines on the solder materials 35 and 36 indicate the location of a plane M which is substantially parallel to the first end surface 11.
  • Fig. 4B shows a cross section of the solder materials 35 and 36 in the plane M.
  • the signal conductor solder material 35 is a circular disk having a center point C.
  • the part of the signal shield solder material 36 shown in Fig. 4A is an elongate part P having a longitudinal direction denoted by L.
  • the longitudinal direction L in this example is tangential with respect to the center point C of the signal conductor solder material 35.
  • Said advantage is also achieved when the longitudinal direction L, instead of itself being tangential with respect to the center point C, at least has a component which is tangential with respect to the center point C of the signal conductor solder material 35. Furthermore, it is remarked that said advantage is also achieved when (a component of) the longitudinal direction L, instead of being tangential with respect to the center point C, is tangential with respect to another arbitrary reference point at the signal conductor solder material 35.
  • a method for connecting the signal conductor solder material 35 and the signal shield solder material 36 to a second shielded waveguide end of a second component is described. Fur this purpose, reference is now made to Figs. 3E-3G, which show the second component 20 of Figs.
  • a second solder mask 40 similar to the first solder mask 30, is positioned on top of the second end surface 21 of the second component 20. This positioning, shown in Fig. 3F, is similar to the positioning of the first solder mask 30 on top of the first component 10.
  • a second solder material 44 is applied in passageways through the second solder mask 40 in a similar way as the first solder material 34 was applied in the passageways through the first solder mask 30.
  • the second solder material 44 is left behind on the pads 24, 25 and 26, as shown in Fig. 3G.
  • the first component 10 is positioned over the second component 20, or vice versa, in such way that the first end surface 11 of the first component 10 is facing towards the second end surface 21 of the second component 20 and in such way that the hardened solder material 34 contacts the second solder material 44.
  • Fig. 3H The assembly shown in Fig. 3H is then placed in the reflow oven and heated to a temperature which is high enough to melt the second solder material 44 and which at the same time is low enough to prevent melting of the first solder material 34.
  • the second solder material 44 is different from the first solder material 34 and is chosen to have a lower eutectic melting point than the first solder material 34. If, for example, 90/10 Pb/Sn, added with a suitable flux, is used for the first solder material 34, a suitable material for the second solder material 44 can for example be 60/40 Pb/Sn, added with a suitable flux, as known in the art.
  • a suitable temperature to which the reflow oven can be heated with the assembly in it may be for example 200 degrees Celcius. By heating the assembly shown in Fig. 3H in the reflow oven, the second solder material 44 is soldered to the first solder material 34. The result is shown in Fig.
  • the passageways through the second mask 40 have smaller length than those through the first mask 30, as can be seen by comparing the height of mask 40 shown in Fig. 3F with the height of mask 30 shown in Fig. 3B.
  • a reason for this difference is, that the second solder material 44 substantially serves for soldering the first solder material 34 to the pads of the second component 20 and does not have the function to substantially contribute to the interconnection length between the first and second component, which is a function of the first solder material 34.
  • solder materials 34 and 44 after being soldered together, are denoted in general by reference numeral 50. More in particular, the solder material 50 forming the connection between the first and second signal conductor ends 14 and 24 is denoted by reference numeral 54, and the solder material 50 forming the connection between the first and second signal shield ends 15 and 25 is denoted by reference numeral 55.
  • connection of the second signal conductor end 24 to the signal conductor solder material 35 and the connection of the second signal shield end 25 to the signal shield solder material 36 are solder connections.
  • Other connection methods are possible as well, such as methods using a hold-down mechanism with springs or the like.
  • Figs. 5A-5F schematically show, in a cross-sectional view similar to that of Fig. 4B, some other examples of the first solder material, after being soldered in a method according to the invention.
  • FIGS. 5A-5C show a few examples, wherein the signal shield solder materials 61, 63 and 65, respectively, have elongate parts which are not fully tangential with respect to a reference point at the signal conductors 60, 62 and 64, respectively, but which do have at least such tangential components.
  • Figs. 5D and 5E show fully tangential signal shields 67 and 69, respectively.
  • the signal shield 67 of Fig. 5D forms a ring having only one interruption.
  • the signal shield 69 of Fig. 5E forms an uninterrupted ring.
  • Fig. 5F shows an example, wherein the signal conductor solder material comprises two interconnected disk shapes 80 and 82, shielded by more or less elliptically shaped signal shield solder material 83.
  • Such and similar configurations can be applied for example for making offset interconnections between wave guide ends of different components.
  • elliptical shapes for the signal shield solder material 83 other noncircular shapes are possible as well, for
  • Fig. 6 schematically shows a perspective view of an example of a solder mask 70 that can be used in a method according to the invention to form an uninterrupted shielding ring such as the ring 69 of Fig. 5E.
  • the solder mask 70 comprises, through it, a cilindrical passageway 72 similar to the passageway 32 of the first solder mask 30 shown in Fig. 2A, as well as a ring shaped passageway 73 for receiving solder material meant for the shielding portion of the soldered interconnection means.
  • the ring shaped passageway 73 separates a disk shaped portion 74 of the mask 70 from another flat portion 75 of the mask 70.
  • the mask 70 may comprise suitable bridging parts, such as tiny pins 76 extending within the passageway 73 and/or bridging parts 77 not lying within the passageway 73.
  • the pins 76 have the advantage that they do not form an obstacle when removing, by a beam or another device, excess solder material inserted into the passageways 72 and 73.
  • the bridging parts 77 have the advantage that they do not occupy any space in the passageway 73, which space preferably is to be allocated to solder material.
  • soldered solder material are possible, for example similar to known heights of columns applied in known Column Grid Array methods (CGA). Such heights can for example be 50 mils or 87 mils. Due to these larger heights the columns of the CGA provide a higher degree of reliability compared to the balls of the BGA. The longer interconnection lengths between components achieved by the CGA give higher yield and better electrical performance than BGA, due to better mechanical stress relief.
  • CGA Column Grid Array methods
  • the method according to the invention is particularly advantageous when applied in such CGA-like manner. This is because longer interconnection lengths increase the risk of signal disturbance, especially for higher frequencies, and therefore increase the need for a shielded waveguide interconnection that reduces the risk of signal disturbance.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Selon cette invention, un premier matériau de soudage (34) est soudé sur une première surface extrémité (11) d'un premier composant (10) à l'aide d'un premier masque de soudage (30). Après le soudage, le premier matériau de soudage comprend un matériau de soudage conducteur de signaux (35) soudé à une première extrémité conductrice de signaux (14) du premier composant, et un matériau de soudage non conducteur de signaux (36) soudé à une première extrémité non conductrice de signaux (15) du premier composant. Le premier matériau de soudage est appliqué dans des passages (32,33) à travers le premier masque de soudage (30), lesquels passages sont profilés de façon que, une fois le soudage terminé, le matériau de soudage non conducteur de signaux (36) comprenne, dans un plan (M) substantiellement parallèle à la première surface d'extrémité (11), au moins une pièce allongée (P) dont la direction longitudinale (L) comprend au moins un composant qui est tangentiel à un point de référence (C) au niveau du matériau de soudage conducteur de signaux (35).
PCT/NL2004/000638 2004-09-14 2004-09-14 Procede de soudage d'interconnexion protegee Ceased WO2006031097A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/NL2004/000638 WO2006031097A1 (fr) 2004-09-14 2004-09-14 Procede de soudage d'interconnexion protegee

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/NL2004/000638 WO2006031097A1 (fr) 2004-09-14 2004-09-14 Procede de soudage d'interconnexion protegee

Publications (1)

Publication Number Publication Date
WO2006031097A1 true WO2006031097A1 (fr) 2006-03-23

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/NL2004/000638 Ceased WO2006031097A1 (fr) 2004-09-14 2004-09-14 Procede de soudage d'interconnexion protegee

Country Status (1)

Country Link
WO (1) WO2006031097A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239385B1 (en) * 1998-02-27 2001-05-29 Agilent Technologies, Inc. Surface mountable coaxial solder interconnect and method
US6400241B1 (en) * 1999-01-28 2002-06-04 Alcatel Microwave circuit module and a device for connecting it to another module
US20030116776A1 (en) * 2001-11-12 2003-06-26 Hermann Oppermann Substrate stack

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239385B1 (en) * 1998-02-27 2001-05-29 Agilent Technologies, Inc. Surface mountable coaxial solder interconnect and method
US6400241B1 (en) * 1999-01-28 2002-06-04 Alcatel Microwave circuit module and a device for connecting it to another module
US20030116776A1 (en) * 2001-11-12 2003-06-26 Hermann Oppermann Substrate stack

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"UTILIZING COAX FOR OVERFLOW WIRES ON CLARK BOARDS", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 32, no. 10A, 1 March 1990 (1990-03-01), pages 320 - 321, XP000083334, ISSN: 0018-8689 *

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