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WO2006016947A1 - Convertisseur analogique numérique pour charge/domaine disposé en sous-intervalles de pipelines - Google Patents

Convertisseur analogique numérique pour charge/domaine disposé en sous-intervalles de pipelines Download PDF

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Publication number
WO2006016947A1
WO2006016947A1 PCT/US2005/019747 US2005019747W WO2006016947A1 WO 2006016947 A1 WO2006016947 A1 WO 2006016947A1 US 2005019747 W US2005019747 W US 2005019747W WO 2006016947 A1 WO2006016947 A1 WO 2006016947A1
Authority
WO
WIPO (PCT)
Prior art keywords
charge
signal
converter
pair
common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2005/019747
Other languages
English (en)
Inventor
Michael P. Anthony
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Massachusetts Institute of Technology
Original Assignee
Massachusetts Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massachusetts Institute of Technology filed Critical Massachusetts Institute of Technology
Priority to EP05756638A priority Critical patent/EP1782537A4/fr
Priority to JP2007521472A priority patent/JP2008506334A/ja
Priority to CA002571147A priority patent/CA2571147A1/fr
Publication of WO2006016947A1 publication Critical patent/WO2006016947A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
    • H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M1/0607—Offset or drift compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
    • H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
    • H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/145—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages
    • H03M1/146—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit the steps being performed sequentially in series-connected stages all stages being simultaneous converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/44—Sequential comparisons in series-connected stages with change in value of analogue signal

Definitions

  • Flash ADCs for example, provide the highest available sampling rates, but at relatively limited resolution and at relatively high power consumption.
  • sigma-delta ADCs provide very high resolution, but relatively low output sampling rate.
  • the general class of pipeline ADCs is particularly suitable for simultaneous operation at moderate- to-high resolution and moderate-to-high sampling rate.
  • Most pipeline ADCs are implemented using switched-capacitor circuit techniques which employ op-amps. The op-amps limit circuit speed and consume considerable power.
  • Charge-domain (CCD-based) pipeline ADCs eliminate the need for op-amps, and thus provide reduced power consumption and potentially smaller circuit area.
  • ADCs have been limited in precision to approximately 10 bits.
  • a principal reason for this limit is the difficulty of precisely and non-destructively comparing charges in CCD shift registers.
  • Such comparison is performed using floating gates, in which the charges to be compared induce voltage changes on overlying, temporarily floating gates of the CCDs; these voltage changes are then sensed by a voltage comparator circuit.
  • This floating-gate charge- comparison method is subject to errors due to parasitic capacitances, capacitance mismatches, capacitance-precharge or "kTC" noise, and comparator circuit noise and voltage offset. These error causes are all related to the fact that various capacitances, both intrinsic and parasitic to the CCD, limit the available magnitude and accuracy of the differential voltage signal induced by a given differential charge on the floating gates.
  • Figure 6 is a block diagram of a further embodiment of a multiplexed device.
  • FIG. 1 A typical pipeline stage in such an ADC is shown in Figure 1.
  • charge-transfer paths are shown as heavy lines with arrowheads, and normal (wired) connections are shown as single lines.
  • a pipeline stage I operates as follows.
  • a differential signal-charge pair Q Pm 2 and Q MHI 4 enter the stage as inputs either from another pipeline stage or from a signal source.
  • Elements 6, 8, 12, 14, 16, and 18 represent storage gates within CCD shift registers, under which charges can be stored.
  • Storage gates 6 and 8 are floating gates. A characteristic of floating gates is that after being pre-charged to a voltage attractive to signal charges, they are disconnected from the voltage source and left electrically floating. When the two signal charges are shifted under floating gates 6 and 8, they induce proportional voltage changes on gates 6 and 8. The resulting voltages 6a and 8a are compared by voltage comparator 10.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

Présentation d'un convertisseur analogique numérique de pipeline dans lequel les échantillons de valeurs de signal sont représentées différentiellement par paires de charges et qui utilisent des dispositif à couplage de charge pour les opérations de temporisation et arithmétiques sur les charges. Dans le pipeline, chaque stade successif résout une différence de charge égale ou plus petite. Après un certain nombre de stades de pipeline, le composant de mode commun de la paire signal/charge est réduit. Les stades de pipeline suivant ce stade de réduction de charge en mode commun ont une capacité et une dimension de charge réduites, permettant une comparaison de charge plus sensible. Il en résulte une résolution améliorée du convertisseur analogique numérique et une consommation électrique réduite.
PCT/US2005/019747 2004-07-12 2005-06-03 Convertisseur analogique numérique pour charge/domaine disposé en sous-intervalles de pipelines Ceased WO2006016947A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP05756638A EP1782537A4 (fr) 2004-07-12 2005-06-03 Convertisseur analogique numérique pour charge/domaine disposé en sous-intervalles de pipelines
JP2007521472A JP2008506334A (ja) 2004-07-12 2005-06-03 分解能が向上し、消費電力が低減するサブレンジングパイプライン型電荷ドメインアナログデジタル変換器
CA002571147A CA2571147A1 (fr) 2004-07-12 2005-06-03 Convertisseur analogique numerique pour charge/domaine dispose en sous-intervalles de pipelines

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/889,282 US6972707B1 (en) 2004-07-12 2004-07-12 Sub-ranging pipelined charge-domain analog-to-digital converter with improved resolution and reduced power consumption
US10/889,282 2004-07-12

Publications (1)

Publication Number Publication Date
WO2006016947A1 true WO2006016947A1 (fr) 2006-02-16

Family

ID=35430455

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/019747 Ceased WO2006016947A1 (fr) 2004-07-12 2005-06-03 Convertisseur analogique numérique pour charge/domaine disposé en sous-intervalles de pipelines

Country Status (7)

Country Link
US (1) US6972707B1 (fr)
EP (1) EP1782537A4 (fr)
JP (1) JP2008506334A (fr)
KR (1) KR101208643B1 (fr)
CA (1) CA2571147A1 (fr)
TW (1) TW200603395A (fr)
WO (1) WO2006016947A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106330189A (zh) * 2016-08-24 2017-01-11 黄山学院 一种电荷域电容数字转换电路

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6631080B2 (en) 2001-06-06 2003-10-07 Hybrid Power Generation Systems Llc Systems and methods for boosting DC link voltage in turbine generators
US7071863B1 (en) * 2002-12-06 2006-07-04 Marvell International Ltd. Low power analog to digital converter having reduced bias during an inactive phase
JP4083139B2 (ja) * 2003-05-07 2008-04-30 三洋電機株式会社 アナログ−デジタル変換回路
JP4529007B2 (ja) * 2004-09-02 2010-08-25 ルネサスエレクトロニクス株式会社 半導体集積回路装置
WO2008088877A2 (fr) * 2007-01-19 2008-07-24 Kenet, Inc. Convertisseur analogique-numérique à chevauchement charge-domaine
CN101622602B (zh) * 2007-01-23 2012-01-04 肯耐特股份有限公司 用于流水线化电荷畴a/d转换器的模拟纠错
WO2008109107A1 (fr) * 2007-03-05 2008-09-12 Kenet, Inc. Convertisseur analogique-numérique à redistribution de charge et chevauchement charge-domaine
TWI493851B (zh) * 2007-12-07 2015-07-21 Intersil Americas LLC 不變動電荷傳送特性而增加電荷傳送電路的電荷容量之操作方法及電荷傳送級裝置

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US4206446A (en) * 1977-05-23 1980-06-03 Rca Corporation CCD A-to-D converter
US5030953A (en) * 1990-07-11 1991-07-09 Massachusetts Institute Of Technology Charge domain block matching processor
US5327138A (en) * 1990-07-31 1994-07-05 Q-Dot, Inc. Charge-mode analog to digital converter

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US3969634A (en) 1975-07-31 1976-07-13 Hughes Aircraft Company Bucket background subtraction circuit for charge-coupled devices
US4035667A (en) 1975-12-02 1977-07-12 International Business Machines Corporation Input circuit for inserting charge packets into a charge-transfer-device
US4210825A (en) 1976-12-08 1980-07-01 Bell Telephone Laboratories, Incorporated Linear differential charge splitting input for charge coupled devices
US4104543A (en) 1977-02-22 1978-08-01 Hughes Aircraft Company Multichannel CCD signal subtraction system
US4246496A (en) 1978-07-17 1981-01-20 International Business Machines Corporation Voltage-to-charge transducer
US4239983A (en) 1979-03-09 1980-12-16 International Business Machines Corporation Non-destructive charge transfer device differencing circuit
US4489309A (en) 1981-06-30 1984-12-18 Ibm Corporation Pipelined charge coupled to analog to digital converter
NL8204727A (nl) 1982-12-07 1984-07-02 Philips Nv Ladingsoverdrachtinrichting.
US4639678A (en) 1983-12-30 1987-01-27 International Business Machines Corporation Absolute charge difference detection method and structure for a charge coupled device
US4573177A (en) 1984-02-06 1986-02-25 The United States Of America As Represented By The Secretary Of The Air Force Bi-directional current differencer for complementary charge coupled device (CCD) outputs
US4686648A (en) 1985-12-03 1987-08-11 Hughes Aircraft Company Charge coupled device differencer
US5189423A (en) * 1990-07-31 1993-02-23 Linnenbrink Thomas E Charge-mold analog to digital converter
US5579007A (en) * 1994-07-07 1996-11-26 Massachusetts Institute Of Technology Charge-to-digital converter
US5736757A (en) 1994-07-07 1998-04-07 Massachusetts Institute Of Technology Charge-domain generation and replication devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4206446A (en) * 1977-05-23 1980-06-03 Rca Corporation CCD A-to-D converter
US5030953A (en) * 1990-07-11 1991-07-09 Massachusetts Institute Of Technology Charge domain block matching processor
US5327138A (en) * 1990-07-31 1994-07-05 Q-Dot, Inc. Charge-mode analog to digital converter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1782537A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106330189A (zh) * 2016-08-24 2017-01-11 黄山学院 一种电荷域电容数字转换电路
CN106330189B (zh) * 2016-08-24 2019-05-21 黄山学院 一种电荷域电容数字转换电路

Also Published As

Publication number Publication date
EP1782537A4 (fr) 2007-11-14
US6972707B1 (en) 2005-12-06
CA2571147A1 (fr) 2006-02-16
JP2008506334A (ja) 2008-02-28
KR101208643B1 (ko) 2012-12-06
TW200603395A (en) 2006-01-16
EP1782537A1 (fr) 2007-05-09
KR20070030930A (ko) 2007-03-16

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