WO2006093016A1 - プリント基板及びその製造方法 - Google Patents
プリント基板及びその製造方法 Download PDFInfo
- Publication number
- WO2006093016A1 WO2006093016A1 PCT/JP2006/303282 JP2006303282W WO2006093016A1 WO 2006093016 A1 WO2006093016 A1 WO 2006093016A1 JP 2006303282 W JP2006303282 W JP 2006303282W WO 2006093016 A1 WO2006093016 A1 WO 2006093016A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit board
- printed circuit
- conductive material
- circuit pattern
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/038—Textiles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0116—Porous, e.g. foam
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
- H05K2201/029—Woven fibrous reinforcement or textile
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/241—Reinforcing the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4635—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating flexible circuit boards using additional insulating adhesive materials between the boards
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Definitions
- the present invention relates to a printed circuit board suitable for use in flat cables, flat antennas, semiconductor device equipment, semiconductor sockets, etc. for information equipment, electronic equipment, portable equipment, automobile parts, aerospace equipment, and the like, and a method for manufacturing the same. About.
- a conventional printed circuit board P has a thin copper plate 3 adhered to the surface of a resin substrate 1 with an adhesive 2, and a photosensitive emulsion is coated on the surface, not shown, and exposed. ⁇ Development etching is applied to form a circuit pattern or circuit.
- An insulating film must be formed on a printed circuit board in which a circuit circuit is formed of a conductive material on a porous sheet or foil, but this insulating material uses a hard epoxy resin. Flexibility is poor and bending can cause cracks.
- a structure in which an insulating layer is provided by attaching a polyester film, a polyimide film, or the like is used. However, this still caused the problem that the flexibility, which was the original technical solution, was not viable.
- Patent Document 1 Japanese Patent No. 2799411
- the present invention has been made in view of the above-mentioned problems, and provides a printed board and a method for manufacturing the same, which eliminate the above-mentioned drawbacks of the prior art.
- the above-mentioned problem is characterized in that an organic polymer film is formed as an insulating thin film by vapor deposition polymerization on a circuit pattern made of a conductive material formed on a porous sheet or foil made of a non-conductive material. This is solved by a printed circuit board.
- a second substrate having a second predetermined circuit pattern formed on a porous second sheet or foil made of a material, at least a part of the first predetermined pattern, and the second predetermined circuit The first substrate and the second substrate are stacked one above the other so that at least a part of the pattern is substantially in contact with each other, and vapor deposition polymerization is performed on the first and second predetermined circuit patterns.
- the total thickness including the insulating film is very small, the flexibility is very good, and it can be folded even in a narrow space. Bending is easy, and the overall circuit configuration can be made easy and compact.
- FIG. 1 is a partial perspective view of a net as a sheet applied to the first embodiment.
- FIG. 2 is a cross-sectional view showing a first step of a printed circuit board manufacturing step according to the first embodiment.
- FIG. 3 is a sectional view showing a second step of the printed circuit board manufacturing process according to the first embodiment.
- FIG. 4 is a sectional view showing a third step of the printed circuit board manufacturing process according to the first embodiment.
- FIG. 5 is a sectional view showing a fourth step of the printed circuit board manufacturing step according to the first embodiment.
- FIG. 6 is a plan view showing an example of a circuit pattern.
- FIG. 7 is a cross-sectional view of the printed circuit board according to the first embodiment (for comparison, the conventional insulating layer is indicated by a two-dot chain line).
- FIG. 8 is a cross-sectional view showing a printed circuit board manufacturing process according to the second embodiment.
- FIG. 9 is a sectional view showing a modified example of the printed circuit board according to the first embodiment.
- FIG. 10 is a sectional view showing a modification of the printed circuit board according to the second embodiment.
- FIG. 11 is a schematic diagram of a vapor deposition polymerization apparatus applied to both embodiments of the present invention.
- FIG. 12 is a partial plan view showing a modification of the sheet of the present invention.
- FIG. 13 is a cross-sectional view of a conventional printed circuit board.
- FIG. 1 is a force showing a net 10 as a porous sheet made of a non-conductive material applied to the first and second embodiments of the present invention.
- a photosensitive agent or a photoresist 14 is applied to the upper and lower surfaces of the net 10.
- a photomask having a predetermined pattern formed on the top is exposed close to the photomask, and formed to form a predetermined pattern (opening) 16 on the photosensitive agent 14 (FIG. 3).
- Copper (Cu) 18 is electrolessly plated in the pattern openings 16 as a conductive material as shown in FIG.
- the plating product of FIG. 4 is immersed in a solution containing Cu ions, and an electric current is passed to grow copper 20 on the previous plating 18 (electrolytic plating).
- a circuit pattern with a desired thickness can be obtained by adjusting the time during which electricity flows (Fig. 5).
- Figure 6 shows an example of a circuit pattern.
- a polymer film can be formed only on the substrate surface facing the evaporation source. Therefore, the substrate 32 and the vacuum chamber wall 30 are heated to about the vaporization temperature of the monomer (200 ° C.), and two kinds of monomers are introduced into this as shown in FIG.
- a method of forming a polyimide film on the surface of a complex shape by heating and introducing to a temperature at which the saturated vapor pressure of the monomer is equal has been developed (omnidirectional simultaneous vapor deposition polymerization).
- Fig. 11 shows that PMDA34 (pyromellitic anhydride) and ODA (oxygen) are used as monomers.
- 2 phosphorus 36 is introduced into the tank 30.
- the substrate 32 is composed of the substrate P ′ [network 10 + circuit pattern (18, 20) of FIG. If the photoresist layer 14 is removed] in the tank 30, a polyimide film is formed on the front and back surfaces simultaneously in a short time.
- FIG. 7 shows the force showing the insulating material-coated substrate P ⁇ thus obtained.
- an insulating film was formed of an epoxy material M as shown by a two-dot chain line.
- the total thickness t of the printed circuit board P ⁇ is about 40.
- the total thickness t ′ is about 1 ⁇ m.
- the force circuit pattern (18, 20) indicated by the polyimide film by the dotted line m is about 1. Note that in FIG. 7, the thickness of the epoxy material M is greatly reduced in order to make the drawing easier to distribute. In the figure, the overall ratio is ignored.
- FIG. 9 shows a second embodiment of the present invention.
- the printed circuit boards created in the first embodiment are stacked one above the other.
- the circuit pattern may be the same as or different from 1, but the same case is illustrated here.
- the arrow indicates the direction of the pressing force.
- Corresponding circuit portions 20, 20 ′ are pressed.
- circuit parts (20, 20 ') on the opposite sides of the circuit patterns (18, 20) (18', 20 ') are in substantial contact as shown in the figure.
- Both substrates P, P with adhesive Q are in substantial contact as shown in the figure.
- An integrated printed circuit board P, P has a polyimide layer formed on the entire surface by the apparatus shown in FIG.
- the monomer also penetrates from the direction perpendicular to the paper surface, and it is shown closely, but it also penetrates into the gaps and pores between the adhesive Q and part of the circuit pattern to form a polyimide film.
- FIG. 10 is a cross-sectional view showing a modified example of the printed circuit board according to the second embodiment of the present invention.
- circuit patterns are also manufactured in the same manner as the printed circuit board of the first embodiment. However, as shown in Fig. 10, the upper circuit pattern and the lower circuit pattern are partially overlapped when vertically stacked. There is a pattern part (50, 50 ') that does not touch considerably. If the adhesive Q is applied as shown in the figure, the upper and lower printed circuit boards P, P are integrated together.
- polyimide can be easily vapor-deposited on the entire surface by using the vapor deposition polymerization apparatus shown in FIG. Printed circuit board P
- Polyimide can be easily deposited on the entire surface of the circuit pattern and net 10, 10 'on the bottom side of 2'.
- copper is used as the conductive material for forming the circuit pattern.
- the present invention is not limited to this, and other conductive members such as aluminum (A1) and gold (Au) are used. Also good.
- Ni nickel
- Z or gold are used to prevent oxidation on the copper surface as a circuit pattern.
- Au may be marked.
- the circuit pattern of the present invention includes such a case.
- a force using a liquid crystal polymer as a material constituting the network 10 may be another non-conductive material such as polyester.
- polyimide is used as the organic polymer obtained by vapor deposition polymerization
- organic polymers obtained by other vapor deposition polymerization such as polyurea and polyamide, may be used. Varying the type of monomer, vapor-deposited polymers of various organic polymers can be obtained and used according to their properties.
- a net 10 made of a liquid crystal polymer material knitted with weft and warp is used as a sheet, but instead of this, a foil S made of a non-conductive material is used as shown in FIG. It is also possible to use the one with many small through holes b formed.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Textile Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
Claims
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007505875A JPWO2006093016A1 (ja) | 2005-02-28 | 2006-02-23 | プリント基板及びその製造方法 |
| EP06714422A EP1855515A1 (en) | 2005-02-28 | 2006-02-23 | Printed board and method for manufacturing same |
| US11/884,960 US20080314623A1 (en) | 2005-02-28 | 2006-02-23 | Printed Circuit Board and Method for Manufacturing the Same |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005-053199 | 2005-02-28 | ||
| JP2005053199 | 2005-02-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2006093016A1 true WO2006093016A1 (ja) | 2006-09-08 |
Family
ID=36941050
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2006/303282 Ceased WO2006093016A1 (ja) | 2005-02-28 | 2006-02-23 | プリント基板及びその製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US20080314623A1 (ja) |
| EP (1) | EP1855515A1 (ja) |
| JP (1) | JPWO2006093016A1 (ja) |
| KR (1) | KR20070106500A (ja) |
| CN (1) | CN101091422A (ja) |
| TW (1) | TW200637447A (ja) |
| WO (1) | WO2006093016A1 (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017010749A (ja) * | 2015-06-22 | 2017-01-12 | 東京エレクトロン株式会社 | 積層封止膜形成方法および形成装置 |
| WO2017199594A1 (ja) * | 2016-05-20 | 2017-11-23 | ソニー株式会社 | 配線構造および電子機器 |
| WO2018123977A1 (ja) * | 2016-12-28 | 2018-07-05 | 株式会社フジクラ | 配線基板及び配線基板の製造方法 |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101102657B1 (ko) * | 2009-12-09 | 2012-01-04 | 서울대학교산학협력단 | 프린팅과 기상증착중합법을 이용한 유연성 있는 유기반도체 소자 |
| TWI675744B (zh) * | 2015-01-22 | 2019-11-01 | 美商柯達公司 | 具有保護性聚合物塗層之導電物件、提供其之方法及包含其之電子裝置 |
| US9650716B2 (en) * | 2015-01-22 | 2017-05-16 | Eastman Kodak Company | Patterning continuous webs with protected electrically-conductive grids |
| CN105282986B (zh) * | 2015-10-14 | 2018-06-26 | 苏州福莱盈电子有限公司 | 一种精细柔性线路板的生产工艺 |
| JP7457567B2 (ja) * | 2020-05-01 | 2024-03-28 | アークレイ株式会社 | 電気化学式センサの製造方法、及び電気化学式センサ |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0548243A (ja) * | 1991-08-08 | 1993-02-26 | Furukawa Electric Co Ltd:The | 配線基板の製造方法 |
| JP2799411B2 (ja) * | 1996-04-08 | 1998-09-17 | 勝也 広繁 | プリント導電シート |
| JP2002151811A (ja) * | 2000-11-13 | 2002-05-24 | Suzuki Sogyo Co Ltd | 配線板用基板 |
| JP2002361770A (ja) * | 2001-06-11 | 2002-12-18 | Toray Ind Inc | カバーレイフィルム |
-
2006
- 2006-02-23 US US11/884,960 patent/US20080314623A1/en not_active Abandoned
- 2006-02-23 CN CNA2006800015496A patent/CN101091422A/zh active Pending
- 2006-02-23 EP EP06714422A patent/EP1855515A1/en not_active Withdrawn
- 2006-02-23 JP JP2007505875A patent/JPWO2006093016A1/ja active Pending
- 2006-02-23 KR KR1020077012391A patent/KR20070106500A/ko not_active Withdrawn
- 2006-02-23 WO PCT/JP2006/303282 patent/WO2006093016A1/ja not_active Ceased
- 2006-02-27 TW TW095106540A patent/TW200637447A/zh unknown
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0548243A (ja) * | 1991-08-08 | 1993-02-26 | Furukawa Electric Co Ltd:The | 配線基板の製造方法 |
| JP2799411B2 (ja) * | 1996-04-08 | 1998-09-17 | 勝也 広繁 | プリント導電シート |
| JP2002151811A (ja) * | 2000-11-13 | 2002-05-24 | Suzuki Sogyo Co Ltd | 配線板用基板 |
| JP2002361770A (ja) * | 2001-06-11 | 2002-12-18 | Toray Ind Inc | カバーレイフィルム |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017010749A (ja) * | 2015-06-22 | 2017-01-12 | 東京エレクトロン株式会社 | 積層封止膜形成方法および形成装置 |
| WO2017199594A1 (ja) * | 2016-05-20 | 2017-11-23 | ソニー株式会社 | 配線構造および電子機器 |
| WO2018123977A1 (ja) * | 2016-12-28 | 2018-07-05 | 株式会社フジクラ | 配線基板及び配線基板の製造方法 |
| JPWO2018123977A1 (ja) * | 2016-12-28 | 2019-10-31 | 株式会社フジクラ | 配線基板及び配線基板の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20080314623A1 (en) | 2008-12-25 |
| JPWO2006093016A1 (ja) | 2008-08-07 |
| KR20070106500A (ko) | 2007-11-01 |
| CN101091422A (zh) | 2007-12-19 |
| TW200637447A (en) | 2006-10-16 |
| EP1855515A1 (en) | 2007-11-14 |
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