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WO2005015648A1 - Procede de formation de depoli sur un substrat, et photoemetteur semi-conducteur au trinitrure utilisant ce substrat - Google Patents

Procede de formation de depoli sur un substrat, et photoemetteur semi-conducteur au trinitrure utilisant ce substrat Download PDF

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Publication number
WO2005015648A1
WO2005015648A1 PCT/KR2004/002029 KR2004002029W WO2005015648A1 WO 2005015648 A1 WO2005015648 A1 WO 2005015648A1 KR 2004002029 W KR2004002029 W KR 2004002029W WO 2005015648 A1 WO2005015648 A1 WO 2005015648A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
grating
light emitting
mask pattern
nitride semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2004/002029
Other languages
English (en)
Inventor
Chang Tae Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EpiValley Co Ltd
Original Assignee
EpiValley Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020030055906A external-priority patent/KR100452750B1/ko
Priority claimed from KR1020040040519A external-priority patent/KR100463288B1/ko
Application filed by EpiValley Co Ltd filed Critical EpiValley Co Ltd
Publication of WO2005015648A1 publication Critical patent/WO2005015648A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/819—Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/82—Roughened surfaces, e.g. at the interface between epitaxial layers

Definitions

  • the present invention relates to a method of manufacturing a substrate for use in a III -nitride semiconductor light emitting device and a III -nitride semiconductor light emitting device using the substrate.
  • the III -nitride semiconductor refers to AI x Ga y ln ⁇ - ⁇ -yN (0 ⁇ x ⁇ 1 , 0 ⁇ y ⁇ 1 , x + y ⁇ 1).
  • FIG. 1 is a cross-sectional view showing a conventional III -nitride semiconductor light emitting device (WO 03/010831 and WO 02/75821). A manufacturing process will be described briefly.
  • the surface of a substrate 10 is etched to form a grating A.
  • a buffer layer 11 , a lower contact layer 12 composed of an n-type III -nitride semiconductor, an active layer 13 composed of a III -nitride semiconductor and an upper contact layer 14 composed of a p-type III -nitride semiconductor are sequentially grown on the substrate 10.
  • a transparent electrode layer 15 is formed on the upper contact layer 14 that comes in ohmic contact with the transparent electrode layer 15.
  • the upper contact layer 14 and the active layer 13 are mesa-etched to expose the lower contact layer 12.
  • An n-type ohmic metal electrode layer 16 is formed on the lower contact layer 12.
  • a bonding pad 17 is formed on the transparent electrode layer 15.
  • a transparent protection film 18 that covers the resulting surface but exposes the bonding pad 17 and the n-type ohmic metal electrode layer 16, is then formed.
  • the substrate 10 can employ a sapphire or SiC substrate.
  • FIG. 2 shows an example of a grating A formed on the substrate 10. A hexagonal shape can protrude and a portion between the hexagonal shapes can protrude. In both cases, the similar effect can be obtained.
  • 3 and 4 are views for explaining how external quantum efficiency is improved when the grating A is formed on the substrate 10 and when the grating A is not formed on the substrate 10.
  • an optical path (1) i.e., the light escapes upwardly
  • the same phenomenon occurs between the lower contact layer 12 and the substrate 10.
  • the critical angle is 46.1°, which is relatively high.
  • Light having an incidence angle of over 46J "returns to the lower contact layer 12, as indicated by an optical path (3). Accordingly, only a very small amount of light can escape outwardly and the remaining light is confined within the device. As this process is repeatedly performed several times, light is abruptly extinguished within the device.
  • the grating A can be simply made to have a size W1 of 1 to 5 zm and a
  • the grating A can be made to have a depth of approximately 0J to 1 -ra.
  • a method of forming a grating in a substrate on which a light emitting unit including an active layer that generates light through recombination of electrons and holes is epitaxially grown including a first step of forming a first mask pattern on the substrate, a second step of forming a second mask pattern on the substrate on which the first mask pattern is formed, wherein the second mask pattern at least partially overlaps with the first mask pattern but does not cover the entire first mask pattern, and a third step of etching the substrate on which the first mask pattern and the second mask pattern are formed, thus forming the grating.
  • the grating refers to a projection or a concave portion that is formed on the substrate.
  • a III -nitride semiconductor light emitting device including a substrate on which a light emitting unit having an active layer that generates light through recombination of electrons and holes is epitaxially grown, wherein the substrate comprises at least one grating on the surface on which the light emitting unit is epitaxially grown, and the grating includes a sidewall, and the sidewall includes a step.
  • the present invention provides a III -nitride semiconductor light emitting device in which a top width of the grating is wider than a bottom width of the grating.
  • the present invention provides a III -nitride semiconductor light emitting device in which the sidewall of the grating gets inclined outwardly as it goes toward the top of the sidewall.
  • the density of the gratings on a substrate 10 can be increased and the inclined surface H of the grating can be maximally obtained, by means of stepped sidewall grating B. Accordingly, as the amount of light scattered at the boundary between the substrate 10 and a III -nitride semiconductor layer increases, external quantum efficiency can be increased significantly.
  • FIGS. 1 to 4 are views for explaining a prior art III -nitride semiconductor light emitting device
  • FIG. 5 is a cross-sectional view for explaining a III -nitride semiconductor light emitting device according to the present invention
  • FIGS. 6 and 7 are schematic cross-sectional views for explaining that external quantum efficiency of the present invention is further increased in comparison with a prior art
  • FIG. 8 is a graph showing the relationship between an optical output and the etching number
  • FIG. 9 is a view for explaining an exemplary etch pattern according to the present invention.
  • FIG. 10 is a graph showing a current-optical output characteristic of the III -nitride semiconductor light emitting device according to the present invention
  • FIGS. 11 to 14 are views for explaining a method of forming the gratings B in FIG. 5 according to an embodiment of the present invention
  • FIGS. 15 to 17 are views for explaining a method of forming the gratings B in FIG. 5 according to another embodiment of the present invention
  • FIG. 18 is a view for explaining a method of forming the gratings B in FIG. 5 according to still another embodiment of the present invention
  • FIG. 19 is a photography showing a sapphire substrate in which steppedsidewall gratings are formed according to the present invention.
  • FIG. 5 is a cross-section ai view for explaining a III -nitride semiconductor light emitting device according to the present invention.
  • the sidewall of a grating B is stepped or tiered unlike FIG. 1.
  • the area of an inclined surface H in the grating becomes maximized.
  • An n+ type or p+ type III -nitride semiconductor layer, or a superlattice layer composed of an n-type or p-type III -nitride semiconductor material can be interposed between an upper contact layer 14 and a transparent electrode layer 15.
  • the transparent electrode layer 15 can be formed using any one selected from the group consisting of nickel, gold, silver, platinum, chrome, titanium, aluminum; rhodium and palladium, or a combination of two or more thereof.
  • the transparent electrode layer 15 is thinly formed to a thickness of approximately 0.0001 to 10 ⁇ -m.
  • the upper electrode layer 15 is thinly formed to a thickness of approximately 0.0001 to 10 ⁇ -m.
  • FIGS. 6 and 7 are schematic cross-sectional views for explaining that external quantum efficiency of the present invention is further increased in comparison with a prior art.
  • FIG. 6 is concerned with a prior art.
  • Light that arrives at the edge portion of the grating is scattered at various angles and external quantum efficiency can thus increase.
  • FIG. 7 corresponding to the present invention, as the density of the gratings increases, the probability of scattering and the probability of refraction increase. Also, light scattered at upper edges may collide against lower edges, so that second scattering occurs. Accordingly, more light can exit outwardly compared to FIG. 6 in which stepped sidewalls are not formed.
  • FIG. 6 in which stepped sidewalls are not formed.
  • FIG. 8 is a graph showing the relationship between an optical output and the number of etching. From FIG. 8, it can be seen that more light is emitted in twice etching (when a step is formed on the sidewall of the grating) compared to once etching (only grating is formed and a step is not formed on the sidewall of the grating). It can be also seen that an increase in the optical output blunts if the number of etching is 3 or more.
  • FIG. 10 is a graph showing a current-optical output characteristic of the III -nitride semiconductor light emitting device according to the present invention. An optical output in a prior art having a grating is approximately 15% higher than that of the case where the grating is not formed.
  • FIGS. 11 to 14 are views for explaining a method of forming the gratings B in FIG. 5 according to an embodiment of the present invention.
  • a first mask pattern 51 is formed on a substrate 10 (FIG. 11).
  • a first etch pattern B1 is formed on the substrate 10 by means of a dry etching process such as RIE (Reactive Ion Etching), ICP (Inductive Coupled Plasma) etching or the like.
  • the first mask pattern 51 is removed (FIG. 12). Further, a second mask pattern 52 is formed on the substrate 10 (FIG. 13). A second etch pattern B2 is formed by means of a dry etching process (FIG. 14). It is preferred that each of the mask patterns 51 and 52 used in the dry etching process has an etching selectivity higher than that of the substrate 10. If the substrate 10 is composed of sapphire, it is preferred that the mask patterns 51 and 52 are formed using nickel, platinum, gold, silver, chrome, titanium, aluminum, silicon oxide, silicon nitride, aluminum nitride, aluminum oxide or titanium oxide.
  • the first etch pattern B1 and the second etch pattern B2 may have the same shape and size, the same shape but different sizes, or different shapes.
  • first etch pattern B1 and the second etch pattern B2 are overlapped so that they cross each other regardless of the above factors, tiered gratings B can be obtained.
  • a depth of the first etch pattern B1 and a depth of the second etch pattern B2 must be different from each other.
  • the tiered gratings B can be obtained even though these etch patterns are formed at the same location by changing the etch depths.
  • FIG. 9 shows that the shape of the etch patterns B1 and B2 is a lozengeor a diamond.
  • the shape of the etch patterns B1 and B2 is not limited to the lozenge, but can be circular, elliptical, square, triangular, trapezoid, parallelogrammic, hexagonal or any other type. Also, the etch pattern may have a stripe shape. It is preferred that the size of the etch patterns B1 and B2 is 1 to 10/-m,
  • a distance between the patterns is 0J to 10 m and a depth of the pattern is
  • a stepped longitudinal wall H becomes inclined outwardly as it goes upwardly.
  • a top width and bottom width of the grating B are preferably OJ m to 1mm.
  • the depth of the grating B is approximately 0.001 to 10/-m. If GaN is grown on a sapphire substrate using a hexagonal pattern in which each side of which has a same size, it is more preferred that the distance W2 between the patterns is 1 to 4 ⁇ m, the size W1 of the patterns is 2 to ⁇ m, the
  • the depth of the gratings is 0.5 to 3/-m and the bottom width of the gratings is 0.1 to
  • FIGS. 15 to 17 are views for explaining a method of forming the gratings B in FIG. 5 according to another embodiment of the present invention.
  • a dry etching mask pattern on the substrate 10
  • two dry etching masks are used in forming a dry etching mask pattern on the substrate 10.
  • the tiered grating B is formed through one dry etching process. After large-sized mask pattern 61 is formed using a photo mask for forming pattern as shown in FIG.
  • FIG. 15 small-sized mask pattern 62 is consecutively formed on the mask pattern 61 , as shown in FIG. 16.
  • the process of forming the mask pattern 62 on the mask pattern 61 is the same as the process of forming the mask pattern 61 on the substrate 10 except that the photo masks of different sizes are used.
  • FIG. 18 is a view for explaining a method of forming the gratings B in FIG. 5 according to still another embodiment of the present invention. In this method, mask pattern 63 and 64 are overlapped with each other using the same photo mask, unlike FIGS. 15 and 16.
  • a process in which the mask pattern 64 and the mask pattern 63 are formed so that they partially overlap with each other is the same as the process of forming the mask pattern 63 on the substrate 10 except that the photo mask is located so that the mask pattern 64 is overlapped with some of the mask pattern 63.
  • a method of etching the substrate 10 on which the mask patterns such as those shown in FIGS. 16 and 18 are formed will be described.
  • the gratings B are formed through one dry etching process unlike FIGS. 11 to 14. In the case where mask patterns as shown in FIG.
  • the mask pattern 62 that is not covered with the mask pattern 61 undergo dry etching and the region of the substrate 10 in which the mask pattern 62 is formed but the mask patterns 61 is not formed, is subjected to dry etching.
  • the mask pattern 62 is substantially completely removed through the dry etching process.
  • the region where the mask pattern 63 and the mask pattern 64 are not overlapped undergoes dry etching.
  • the substrate 10 in which the region where the mask pattern 63 and the mask pattern 64 are not overlapped is formed undergoes dry etching.
  • the region where the mask pattern 63 and the mask pattern 64 are overlapped is substantially completely removed through the dry etching process. Therefore, there is an advantage in that an additional process for removing the region where the mask pattern 63 and the mask pattern 64 are overlapped is not required.
  • the etch rates of materials constituting the mask patterns 61 , 62, 63 and 64 and the substrate 10 are different from each other.
  • the thicknesses of the mask patterns 61, 62, 63 and 64 must be designed in view of the etch rates.
  • etch rate of nickel being the mask pattern is OJ m/min, nickel having a
  • thickness of 0.1 m is needed in order to etch the sapphire substrate 10 to a
  • the mask patterns 61 are formed to a thickness of 0.05/-m and
  • the mask patterns 62 are formed to a thickness of 0.05 m, the stepped sidewall
  • FIG. 17 is a photography showing a sapphire substrate in which a grating with stepped sidewalls is formed according to the present invention. In FIG. 19, a stepped sidewall grating shape is shown clearly.

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Abstract

La présente invention concerne, d'une part un procédé de fabrication d'un substrat destiné à un dispositif photoémetteur semi-conducteur au trinitrure, et d'autre part un dispositif photoémetteur semi-conducteur au trinitrure utilisant ce substrat. L'invention concerne également un dispositif photoémetteur semi-conducteur au trinitrure incluant un substrat équipé d'une unité photoémettrice à couche obtenue par croissance épitaxiale. Cette couche produit de la lumière par recombinaison d'électrons et de trous. En l'occurrence, le substrat comprend au moins un dépoli sur la surface sur laquelle l'unité photoémettrice résulte d'une croissance épitaxiale. Enfin, ce dépoli comporte une paroi latérale définissant une marche d'escalier. L'invention concerne aussi un procédé de fabrication du substrat. L'invention permet ainsi d'augmenter le rendement quantique externe du dispositif photoémetteur.
PCT/KR2004/002029 2003-08-12 2004-08-12 Procede de formation de depoli sur un substrat, et photoemetteur semi-conducteur au trinitrure utilisant ce substrat Ceased WO2005015648A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020030055906A KR100452750B1 (ko) 2003-08-12 2003-08-12 Ⅲ-질화물 반도체 발광소자
KR10-2003-0055906 2003-08-12
KR10-2004-0040519 2004-06-03
KR1020040040519A KR100463288B1 (ko) 2004-06-03 2004-06-03 기판에 격자를 형성하는 방법

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WO2005015648A1 true WO2005015648A1 (fr) 2005-02-17

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PCT/KR2004/002029 Ceased WO2005015648A1 (fr) 2003-08-12 2004-08-12 Procede de formation de depoli sur un substrat, et photoemetteur semi-conducteur au trinitrure utilisant ce substrat

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1734592A2 (fr) 2005-06-16 2006-12-20 LG Electronics, Inc. Procédé pour la manufacture des diodes électroluminescentes
CN102867890A (zh) * 2011-07-07 2013-01-09 山东华光光电子有限公司 一种蓝宝石图形衬底的制备方法
CN102956778A (zh) * 2012-10-26 2013-03-06 江苏威纳德照明科技有限公司 具有界面绒化层的InP基发光二极管及其制造方法
CN103367582A (zh) * 2012-03-29 2013-10-23 新世纪光电股份有限公司 半导体发光元件及其制作方法
TWI458128B (zh) * 2010-11-25 2014-10-21 豊田合成股份有限公司 三族氮化物半導體發光元件的製造方法
CN106067504A (zh) * 2016-07-27 2016-11-02 安徽三安光电有限公司 一种图形化衬底及其制备方法
CN111613704A (zh) * 2020-05-29 2020-09-01 黄山博蓝特半导体科技有限公司 一种高亮度深紫外led用图形化蓝宝石衬底及其制备方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010010941A1 (en) * 1998-06-26 2001-08-02 Etsuo Morita Semiconductor device and its manufacturing method
US6316785B1 (en) * 1998-10-15 2001-11-13 Kabushiki Kaisha Toshiba Nitride-compound semiconductor device
JP2002280611A (ja) * 2001-03-21 2002-09-27 Mitsubishi Cable Ind Ltd 半導体発光素子
WO2003010831A1 (fr) * 2001-07-24 2003-02-06 Nichia Corporation Dispositif electroluminescent a semi-conducteur presentant un substrat irregulier
US20030047746A1 (en) * 2001-09-10 2003-03-13 Fuji Photo Film Co., Ltd. GaN substrate formed over GaN layer having discretely formed minute holes produced by use of discretely arranged growth suppression mask elements

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010010941A1 (en) * 1998-06-26 2001-08-02 Etsuo Morita Semiconductor device and its manufacturing method
US6316785B1 (en) * 1998-10-15 2001-11-13 Kabushiki Kaisha Toshiba Nitride-compound semiconductor device
JP2002280611A (ja) * 2001-03-21 2002-09-27 Mitsubishi Cable Ind Ltd 半導体発光素子
WO2003010831A1 (fr) * 2001-07-24 2003-02-06 Nichia Corporation Dispositif electroluminescent a semi-conducteur presentant un substrat irregulier
US20030047746A1 (en) * 2001-09-10 2003-03-13 Fuji Photo Film Co., Ltd. GaN substrate formed over GaN layer having discretely formed minute holes produced by use of discretely arranged growth suppression mask elements

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8709835B2 (en) 2005-06-16 2014-04-29 Lg Electronics Inc. Method for manufacturing light emitting diodes
EP1734592A3 (fr) * 2005-06-16 2009-03-18 LG Electronics, Inc. Procédé pour la manufacture des diodes électroluminescentes
EP2264795A3 (fr) * 2005-06-16 2011-03-02 LG Electronics Procédé pour la manufacture des diodes électroluminescentes
US8008646B2 (en) 2005-06-16 2011-08-30 Lg Electronics Inc. Light emitting diode
EP1734592A2 (fr) 2005-06-16 2006-12-20 LG Electronics, Inc. Procédé pour la manufacture des diodes électroluminescentes
TWI458128B (zh) * 2010-11-25 2014-10-21 豊田合成股份有限公司 三族氮化物半導體發光元件的製造方法
CN102867890A (zh) * 2011-07-07 2013-01-09 山东华光光电子有限公司 一种蓝宝石图形衬底的制备方法
CN103367582A (zh) * 2012-03-29 2013-10-23 新世纪光电股份有限公司 半导体发光元件及其制作方法
CN102956778A (zh) * 2012-10-26 2013-03-06 江苏威纳德照明科技有限公司 具有界面绒化层的InP基发光二极管及其制造方法
CN106067504A (zh) * 2016-07-27 2016-11-02 安徽三安光电有限公司 一种图形化衬底及其制备方法
WO2018019036A1 (fr) * 2016-07-27 2018-02-01 厦门三安光电有限公司 Substrat à motifs et son procédé de préparation
CN106067504B (zh) * 2016-07-27 2019-05-17 安徽三安光电有限公司 一种图形化衬底及其制备方法
CN111613704A (zh) * 2020-05-29 2020-09-01 黄山博蓝特半导体科技有限公司 一种高亮度深紫外led用图形化蓝宝石衬底及其制备方法

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