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WO2005071739A3 - Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung - Google Patents

Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung Download PDF

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Publication number
WO2005071739A3
WO2005071739A3 PCT/DE2005/000088 DE2005000088W WO2005071739A3 WO 2005071739 A3 WO2005071739 A3 WO 2005071739A3 DE 2005000088 W DE2005000088 W DE 2005000088W WO 2005071739 A3 WO2005071739 A3 WO 2005071739A3
Authority
WO
WIPO (PCT)
Prior art keywords
silicon
nitrogen
oxygen
plasma
vapor deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE2005/000088
Other languages
English (en)
French (fr)
Other versions
WO2005071739A2 (de
Inventor
Zvonimir Gabric
Werner Pamler
Guenther Schindler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to EP05714893A priority Critical patent/EP1706902A2/de
Priority to US10/586,788 priority patent/US7755160B2/en
Publication of WO2005071739A2 publication Critical patent/WO2005071739A2/de
Publication of WO2005071739A3 publication Critical patent/WO2005071739A3/de
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10P14/6336—
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/308—Oxynitrides
    • H10P14/6548—
    • H10P14/6682—
    • H10P14/6927—
    • H10W10/021—
    • H10W10/20—
    • H10W20/071—
    • H10W20/072—
    • H10W20/46—
    • H10W20/495—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H10P14/662—
    • H10P14/69215—
    • H10P14/6922—
    • H10P14/69433—
    • H10W20/084—

Landscapes

  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

Die Erfindung betrifft ein plasmaangeregtes chemisches Gasphasenabscheide-Verfahren zum Bilden eines Silizium-Sauerstoff-Stickstoff-haltigen Materials, bei dem während des Zuführens von Silizium-Material und Sauerstoff-Material Stickstoff-Material unter Verwendung eines organischen Silizium-Precursormaterials zugeführt wird.
PCT/DE2005/000088 2004-01-22 2005-01-22 Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung Ceased WO2005071739A2 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP05714893A EP1706902A2 (de) 2004-01-22 2005-01-22 Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung
US10/586,788 US7755160B2 (en) 2004-01-22 2005-01-22 Plasma excited chemical vapor deposition method silicon/oxygen/nitrogen-containing-material and layered assembly

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004003337.4 2004-01-22
DE102004003337A DE102004003337A1 (de) 2004-01-22 2004-01-22 Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren, Silizium-Sauerstoff-Stickstoff-haltiges Material und Schicht-Anordnung

Publications (2)

Publication Number Publication Date
WO2005071739A2 WO2005071739A2 (de) 2005-08-04
WO2005071739A3 true WO2005071739A3 (de) 2006-03-02

Family

ID=34800906

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2005/000088 Ceased WO2005071739A2 (de) 2004-01-22 2005-01-22 Plasmaangeregtes chemisches gasphasenabscheide-verfahren, silizium-sauerstoff-stickstoff-haltiges material und schicht-anordnung

Country Status (5)

Country Link
US (1) US7755160B2 (de)
EP (1) EP1706902A2 (de)
KR (1) KR100813591B1 (de)
DE (1) DE102004003337A1 (de)
WO (1) WO2005071739A2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004050391B4 (de) * 2004-10-15 2007-02-08 Infineon Technologies Ag Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
CN101454891A (zh) 2006-03-30 2009-06-10 皇家飞利浦电子股份有限公司 改善互连叠层中局部气隙形成的控制
US7863150B2 (en) * 2006-09-11 2011-01-04 International Business Machines Corporation Method to generate airgaps with a template first scheme and a self aligned blockout mask
US20090041952A1 (en) * 2007-08-10 2009-02-12 Asm Genitech Korea Ltd. Method of depositing silicon oxide films
DE102009010845B4 (de) * 2009-02-27 2016-10-13 Advanced Micro Devices, Inc. Verfahren zur Herstellung eines Mikrostrukturbauelements mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten und wieder aufgefüllten Luftspaltausschließungszonen
CN106159255A (zh) 2011-04-14 2016-11-23 户田工业株式会社 Li‑Ni复合氧化物颗粒粉末以及非水电解质二次电池
US10157777B2 (en) 2016-05-12 2018-12-18 Globalfoundries Inc. Air gap over transistor gate and related method
US10211146B2 (en) * 2016-05-12 2019-02-19 Globalfoundries Inc. Air gap over transistor gate and related method
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
CN110880475B (zh) * 2018-09-06 2023-06-16 长鑫存储技术有限公司 空气隙形成方法
US10985051B2 (en) * 2019-07-24 2021-04-20 Nanya Technology Corporation Semiconductor device with air spacer and method for forming the same
US11450601B2 (en) * 2019-09-18 2022-09-20 Micron Technology, Inc. Assemblies comprising memory cells and select gates
US11127678B2 (en) * 2019-12-10 2021-09-21 Globalfoundries U.S. Inc. Dual dielectric layer for closing seam in air gap structure
CN115340058B (zh) * 2021-05-13 2024-11-29 中国科学院微电子研究所 一种具有空腔结构的电子器件及其制备方法
US12341058B2 (en) 2022-02-04 2025-06-24 Globalfoundries Singapore Pte. Ltd. Air gap through at least two metal layers
US12500119B2 (en) 2022-06-21 2025-12-16 Globalfoundries Singapore Pte. Ltd. Air gap with inverted T-shaped lower portion extending through at least one metal layer, and related method
US12058848B2 (en) * 2022-06-29 2024-08-06 Nanya Technology Corporation Semiconductor structure having air gap

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4118165A1 (de) * 1990-06-05 1991-12-12 Mitsubishi Electric Corp Halbleitereinrichtung mit schutzisolierschicht und herstellungsverfahren fuer dieselbe
JPH06216122A (ja) * 1993-01-13 1994-08-05 Kawasaki Steel Corp 半導体装置の製造方法
US6211057B1 (en) * 1999-09-03 2001-04-03 Taiwan Semiconductor Manufacturing Company Method for manufacturing arch air gap in multilevel interconnection
US6445072B1 (en) * 2000-07-17 2002-09-03 Advanced Micro Devices, Inc. Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant
DE10125019A1 (de) * 2001-05-22 2002-12-05 Infineon Technologies Ag Hohlraumstruktur, Mehrfach-Hohlraumstruktur und Verfahren zum Herstellen einer Hohlraumstruktur
WO2003019649A2 (de) * 2001-08-20 2003-03-06 Infineon Technolgies Ag Leiterbahnanordnung und verfahren zum herstellen einer leiterbahnanordnung

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5407860A (en) 1994-05-27 1995-04-18 Texas Instruments Incorporated Method of forming air gap dielectric spaces between semiconductor leads
US5955786A (en) 1995-06-07 1999-09-21 Advanced Micro Devices, Inc. Semiconductor device using uniform nonconformal deposition for forming low dielectric constant insulation between certain conductive lines
US5792706A (en) 1996-06-05 1998-08-11 Advanced Micro Devices, Inc. Interlevel dielectric with air gaps to reduce permitivity
US5814555A (en) 1996-06-05 1998-09-29 Advanced Micro Devices, Inc. Interlevel dielectric with air gaps to lessen capacitive coupling
US5759913A (en) 1996-06-05 1998-06-02 Advanced Micro Devices, Inc. Method of formation of an air gap within a semiconductor dielectric by solvent desorption
US6184158B1 (en) * 1996-12-23 2001-02-06 Lam Research Corporation Inductively coupled plasma CVD
US6440839B1 (en) 1999-08-18 2002-08-27 Advanced Micro Devices, Inc. Selective air gap insulation
DE19957302C2 (de) 1999-11-29 2001-11-15 Infineon Technologies Ag Substrat mit mindestens zwei darauf angeordneten Metallstrukturen und Verfahren zu dessen Herstellung
US6423629B1 (en) 2000-05-31 2002-07-23 Kie Y. Ahn Multilevel copper interconnects with low-k dielectrics and air gaps
US20030176055A1 (en) * 2000-07-24 2003-09-18 United Microelectronics Corp. Method and structure for reducing capacitance between interconnect lines
US6803318B1 (en) * 2000-09-14 2004-10-12 Cypress Semiconductor Corp. Method of forming self aligned contacts
US6524948B2 (en) 2000-10-13 2003-02-25 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for fabricating the same
DE10109778A1 (de) 2001-03-01 2002-09-19 Infineon Technologies Ag Hohlraumstruktur und Verfahren zum Herstellen einer Hohlraumstruktur
US7042095B2 (en) 2002-03-29 2006-05-09 Renesas Technology Corp. Semiconductor device including an interconnect having copper as a main component
DE10223954A1 (de) * 2002-05-29 2003-12-11 Infineon Technologies Ag Plasmaangeregtes chemisches Gasphasenabscheide-Verfahren zum Abscheiden von Siliziumnitrid oder Siliziumoxinitrid, Verfahren zum Herstellen einer Schicht-Anordnung und Schicht-Anordnung
DE10246830A1 (de) 2002-09-30 2004-02-12 Infineon Technologies Ag Kupfermetallisierung
US6861332B2 (en) 2002-11-21 2005-03-01 Intel Corporation Air gap interconnect method
US7009272B2 (en) 2002-12-28 2006-03-07 Intel Corporation PECVD air gap integration
JP2004259964A (ja) * 2003-02-26 2004-09-16 Renesas Technology Corp 成膜装置およびその成膜装置を用いた半導体装置の製造方法
US6995073B2 (en) 2003-07-16 2006-02-07 Intel Corporation Air gap integration
DE10341544B4 (de) 2003-09-09 2005-10-13 Infineon Technologies Ag Verfahren zum Herstellen einer Leiterbahnanordnung und Leiterbahnanordnung
JP4864307B2 (ja) 2003-09-30 2012-02-01 アイメック エアーギャップを選択的に形成する方法及び当該方法により得られる装置
US7071532B2 (en) 2003-09-30 2006-07-04 International Business Machines Corporation Adjustable self-aligned air gap dielectric for low capacitance wiring
US7071091B2 (en) 2004-04-20 2006-07-04 Intel Corporation Method of forming air gaps in a dielectric material using a sacrificial film
US7285474B2 (en) 2004-09-16 2007-10-23 International Business Machines Corporation Air-gap insulated interconnections
US20060105581A1 (en) * 2004-11-18 2006-05-18 Bielefeld Jeffery D Glycol doping agents in carbon doped oxide films

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4118165A1 (de) * 1990-06-05 1991-12-12 Mitsubishi Electric Corp Halbleitereinrichtung mit schutzisolierschicht und herstellungsverfahren fuer dieselbe
JPH06216122A (ja) * 1993-01-13 1994-08-05 Kawasaki Steel Corp 半導体装置の製造方法
US6211057B1 (en) * 1999-09-03 2001-04-03 Taiwan Semiconductor Manufacturing Company Method for manufacturing arch air gap in multilevel interconnection
US6445072B1 (en) * 2000-07-17 2002-09-03 Advanced Micro Devices, Inc. Deliberate void in innerlayer dielectric gapfill to reduce dielectric constant
DE10125019A1 (de) * 2001-05-22 2002-12-05 Infineon Technologies Ag Hohlraumstruktur, Mehrfach-Hohlraumstruktur und Verfahren zum Herstellen einer Hohlraumstruktur
WO2003019649A2 (de) * 2001-08-20 2003-03-06 Infineon Technolgies Ag Leiterbahnanordnung und verfahren zum herstellen einer leiterbahnanordnung

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 018, no. 573 (E - 1624) 2 November 1994 (1994-11-02) *

Also Published As

Publication number Publication date
KR20060123572A (ko) 2006-12-01
US20080308898A1 (en) 2008-12-18
KR100813591B1 (ko) 2008-03-17
US7755160B2 (en) 2010-07-13
WO2005071739A2 (de) 2005-08-04
EP1706902A2 (de) 2006-10-04
DE102004003337A1 (de) 2005-08-18

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