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WO2005051059A1 - Contact rugueux - Google Patents

Contact rugueux Download PDF

Info

Publication number
WO2005051059A1
WO2005051059A1 PCT/EP2004/052671 EP2004052671W WO2005051059A1 WO 2005051059 A1 WO2005051059 A1 WO 2005051059A1 EP 2004052671 W EP2004052671 W EP 2004052671W WO 2005051059 A1 WO2005051059 A1 WO 2005051059A1
Authority
WO
WIPO (PCT)
Prior art keywords
contact point
elevations
rough surface
insulating layer
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2004/052671
Other languages
German (de)
English (en)
Inventor
Karl Weidner
Jörg ZAPF
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of WO2005051059A1 publication Critical patent/WO2005051059A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
    • H10W70/699—
    • H10W72/012—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0367—Metallic bump or raised conductor not used as solder bump
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
    • H10W70/60—
    • H10W72/251—
    • H10W72/90—
    • H10W72/9415—
    • H10W90/00—

Definitions

  • the protection against counterfeiting can be considerably increased by inserting electronic modules into smart cards, passports or documents. These modules have to be very thin, i.e. less than 100 ⁇ m thick. In addition, it is required that they can be produced very cost-effectively, ultra-thin, flexible, space-saving and possibly also integrable in a production line with self-generating energy supply at low material and manufacturing costs. Methods are known from the field of RF-ID antenna production for producing structured metallic structures at low cost. The additional, but cost-relevant process step is the contacting of components. These components can be semiconductor ICs, passive components, but also sensors or displays.
  • Vox the contacting of the components, a film or a solid carrier is produced, which has one or more structured metal levels.
  • solder / solder paste or conductive adhesive to the substrate and / or component. Contacting through flip chip placement and reflow soldering or adhesive hardening. - Application of anisotropically conductive adhesives or foils. Contacting through flip chip placement and heat sealing, i.e. under pressure and temperature. - A method which is also known is a plated-through hole using a non-conductive adhesive. The pads of the components are increased, that is to say so-called bumps are generated. The company Nanopierce fixes separate, hard, pointed, conductive particles to the surfaces of the bumps, which are supposed to improve the electrical contact. The components are placed in the non-conductive adhesive and contacted individually under temperature and pressure.
  • the invention is based on the object of specifying a possibility of cost-effective contacting of components for the production of ultra-thin modules.
  • a contact point for an electrical component has a rough surface with elevations.
  • the elevations are therefore not created by particles subsequently attached to the surface, but the contact point itself is produced or formed with a rough surface. This eliminates the additional manufacturing step of arranging particles separately.
  • the elevations of the rough surface are in particular warts, needles, tips and / or whiskers.
  • the elevations are preferably larger than 1 ⁇ m, in particular larger than 5 ⁇ m, but smaller than 50 ⁇ m, in particular smaller than 20 ⁇ m.
  • the elevations can be coated with a gold layer, for example.
  • a suitable choice of material ensures that the rough surface has mechanical stability, ie it cannot be leveled by low pressure. This can be done, for example, by using nickel, palladium and the like or a nickel-cobalt alloy as the base material or as a covering layer of the contact point.
  • the contact point is in particular a contact pad and / or a bump.
  • the contact point in a product that has a component with a dex contact point, an insulating layer and a conductor takes on the following function: the contact point is formed with a rough surface with elevations which penetrate the insulating layer and thereby the conductor electrical contact.
  • the depressions of the rough surface do not usually have to be in contact with the conductor, but can do so.
  • the insulating layer is formed in particular by a film, lacquer and / or a polymer layer.
  • the conductor can be a conductive layer, for example, which is arranged on the insulating layer.
  • Insulating layers and conductors are preferably a film laminated with a metal layer, which is laminated onto the component with its contact point, the elevations of the rough surface of the contact point penetrating the film and coming into contact with or penetrating into the metal layer.
  • the contact point is produced with a rough surface with elevations. This can be done, for example, by electroless plating, electrodeposition and / or printing.
  • Advantageous refinements of the method for producing the contact point result from the advantageous refinements of the contact point and vice versa.
  • a contact point with a rough surface with elevations is used, which penetrate the insulating layer and thereby form an electrical contact to the conductor.
  • the layer can in particular be produced from a non-liquid material, such as a film.
  • the figure shows a product comprising a component with a contact point, an insulating layer and a conductor.
  • Components with an edge length of up to 100 ⁇ m x 100 ⁇ m and up to a thickness of 10 ⁇ m are used. This means that a large number of components are contained per wafer or substrate and processes at the wafer and substrate level converted to the component are therefore very inexpensive. With suitable processes, very rough, conductive surfaces are created in the wafer or substrate composite on the contact pads of the components.
  • the processes can be external currentless or galvanic deposition processes (oxide treatment) or printing processes, predominantly stencil printing, or a combination of these processes.
  • the process parameters in these processes are selected so that, contrary to the usual objective, a rough surface with warts, whiskers, needles and / or printed tips is created.
  • a suitable choice of material ensures that this rough surface has mechanical stability, that is, it cannot be leveled even by a low pressure. This can be done, for example, by using nickel, palladium and the like or nickel-cobalt alloys as the base material or as a covering layer of the pad.
  • a tempering step can also help to make the surface of the pad significantly rougher due to the growth of whiskers.
  • the wafer or the substrate is mechanically thinly ground and polished from the back.
  • a plastic film with metal lamination is laminated on the components and the one-sided adhesive carrier film so that the components are covered on all sides with the film.
  • the metal of the metal lamination is preferably aluminum or copper.
  • This lamination can take place, for example, in a roll laminator, an autoclave or a hot press. The temperature and pressure are selected so that the plastic film softens and the raised, rough, harder pads penetrate into the metal lamination. This contacting step can be supported by a subsequent roll-to-roll press process using ultrasound.
  • the metal on the plastic film is now structured using known, inexpensive methods. Here, the pattern is adjusted to the components. For example, an etching resist is partially printed on this metal and then the metal layer in the areas that remain free is removed by etching. The etching resist can remain as protection or can also be removed afterwards.
  • the carrier film can now be removed mechanically.
  • carrier films are also possible here, in which the detachment takes place thermally.
  • the carrier film can also be removed before the metal structuring.
  • the carrier film can also serve as a component of the module as a rear protection of the unhoused components.
  • connection can be made by using preformed pressing tools in standard presses.
  • the aluminum contact pads of chips are coated without external current in the wafer assembly.
  • the aluminum surface is cleaned, a thin layer of zincate is deposited in an exchange reaction with aluminum and the pads are increased by depositing nickel.
  • a suitable choice of process parameters means that a hard nickel-cobalt alloy is deposited very unevenly, also without external current.
  • Such a suitable choice is, for example, that the use of wetting agents in the nickel-cobalt electrolyte is reduced or is completely dispensed with.
  • high current densities can be used for the deposition.
  • the nickel surface is oxidized, for example by a tempering step, before the nickel-cobalt alloy is deposited. The procedures mentioned form warts, needle-like structures and / or whiskers. An approximately 100 n thick gold layer completes the pad structure.
  • the wafer is thinned mechanically and etched so that a component thickness of less than 50 ⁇ m is achieved.
  • the components are placed on a silicone adhesive-coated polyimide film using a pick and place device.
  • a plastic film made of PET coated with approx. 10 ⁇ m aluminum is laminated on under pressure and temperature and possibly ultrasound so that the raised pads touch the aluminum and are even pressed into the softer aluminum.
  • the aluminum is structured by screen printing an etching resist and etching the free aluminum with, for example, hydrochloric acid.
  • the polyimide adhesive film is peeled off mechanically.
  • the product 1 shows a substrate composite with products manufactured in this way, or such a product 1 in an enlargement.
  • the product 1 has a component 2 with a contact point 3, 4 with a rough surface.
  • the contact point 3, 4 contains a contact pad 3 and a bump 4.
  • the rough surface of the contact point 3, 4 has penetrated an insulating layer 5 in the form of a film and has penetrated into a conductor 6 in the form of a metal lamination of the film 5.
  • elevations of the rough surface of the contact point 3, 4, but due to the deep penetration in this exemplary embodiment also simultaneously depressions of the rough surface of the contact point 3, 4, establish an electrical contact between the conductor 6 in the form of the metal lamination and the component 2.
  • a metal-clad film can be used for lamination. An expensive metallization, for example by sputtering or electroplating, is eliminated.
  • the module produced in this way is absolutely minimized in height. Only the component thickness, the thickness of the insulating layer and the thickness of the metal cladding contribute to the overall height.

Landscapes

  • Engineering & Computer Science (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

L'invention concerne un point de contact (3, 4) pour un composant électrique (2) comprenant une surface rugueuse pourvue de protubérances, qui traversent une couche isolante (5) et permettent de mettre en contact un conducteur (6) avec un composant (2).
PCT/EP2004/052671 2003-11-17 2004-10-27 Contact rugueux Ceased WO2005051059A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10353676A DE10353676B4 (de) 2003-11-17 2003-11-17 Verfahren zur Herstellung eines ultradünnen Moduls mit rauen Kontakten
DE10353676.0 2003-11-17

Publications (1)

Publication Number Publication Date
WO2005051059A1 true WO2005051059A1 (fr) 2005-06-02

Family

ID=34609045

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2004/052671 Ceased WO2005051059A1 (fr) 2003-11-17 2004-10-27 Contact rugueux

Country Status (2)

Country Link
DE (1) DE10353676B4 (fr)
WO (1) WO2005051059A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005013323A1 (de) * 2005-03-22 2006-10-05 Infineon Technologies Ag Kontaktierungsvorrichtung zum Kontaktieren einer integrierten Schaltung, insbesondere eines Chips oder eines Wafers, mit einer Testervorrichtung, entsprechendes Testverfahren und entsprechendes Herstellungsverfahren
DE102008000842A1 (de) * 2008-03-27 2009-10-01 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe
DE102015218842A1 (de) 2015-09-30 2017-03-30 Siemens Aktiengesellschaft Verfahren zur Kontaktierung einer Kontaktfläche eines Halbleiterbauteils und Elektronikmodul

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5487999A (en) * 1991-06-04 1996-01-30 Micron Technology, Inc. Method for fabricating a penetration limited contact having a rough textured surface
US5876580A (en) * 1996-01-12 1999-03-02 Micromodule Systems Rough electrical contact surface
US5977642A (en) * 1997-08-25 1999-11-02 International Business Machines Corporation Dendrite interconnect for planarization and method for producing same
US6306750B1 (en) * 2000-01-18 2001-10-23 Taiwan Semiconductor Manufacturing Company Bonding pad structure to prevent inter-metal dielectric cracking and to improve bondability
US20020053735A1 (en) * 2000-09-19 2002-05-09 Neuhaus Herbert J. Method for assembling components and antennae in radio frequency identification devices
DE10214314A1 (de) * 2002-03-28 2003-10-23 Nedcard B V Chipmodul

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185073A (en) * 1988-06-21 1993-02-09 International Business Machines Corporation Method of fabricating nendritic materials
DE4122297A1 (de) * 1991-07-05 1993-01-07 Messerschmitt Boelkow Blohm Elektronische oder optronische anordnung, insbesondere halbleiter-anordnuung
JPH11145176A (ja) * 1997-11-11 1999-05-28 Fujitsu Ltd ハンダバンプの形成方法及び予備ハンダの形成方法
US6326241B1 (en) * 1997-12-29 2001-12-04 Visteon Global Technologies, Inc. Solderless flip-chip assembly and method and material for same
JP2000269269A (ja) * 1999-03-15 2000-09-29 Toshiba Corp 半導体実装用基板と半導体装置および半導体装置の製造方法
JP2001148401A (ja) * 1999-11-18 2001-05-29 Seiko Epson Corp 半導体装置およびその製造方法
DE10046296C2 (de) * 2000-07-17 2002-10-10 Infineon Technologies Ag Elektronisches Chipbauteil mit einer integrierten Schaltung und Verfahren zu seiner Herstellung

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5487999A (en) * 1991-06-04 1996-01-30 Micron Technology, Inc. Method for fabricating a penetration limited contact having a rough textured surface
US5876580A (en) * 1996-01-12 1999-03-02 Micromodule Systems Rough electrical contact surface
US5977642A (en) * 1997-08-25 1999-11-02 International Business Machines Corporation Dendrite interconnect for planarization and method for producing same
US6306750B1 (en) * 2000-01-18 2001-10-23 Taiwan Semiconductor Manufacturing Company Bonding pad structure to prevent inter-metal dielectric cracking and to improve bondability
US20020053735A1 (en) * 2000-09-19 2002-05-09 Neuhaus Herbert J. Method for assembling components and antennae in radio frequency identification devices
DE10214314A1 (de) * 2002-03-28 2003-10-23 Nedcard B V Chipmodul

Also Published As

Publication number Publication date
DE10353676A1 (de) 2005-06-30
DE10353676B4 (de) 2007-11-29

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