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WO2004023289A3 - Firmware architecture supporting safe updates and multiple processor types - Google Patents

Firmware architecture supporting safe updates and multiple processor types Download PDF

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Publication number
WO2004023289A3
WO2004023289A3 PCT/US2003/027791 US0327791W WO2004023289A3 WO 2004023289 A3 WO2004023289 A3 WO 2004023289A3 US 0327791 W US0327791 W US 0327791W WO 2004023289 A3 WO2004023289 A3 WO 2004023289A3
Authority
WO
WIPO (PCT)
Prior art keywords
firmware
updates
multiple processor
processor types
architecture supporting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/027791
Other languages
French (fr)
Other versions
WO2004023289A2 (en
Inventor
Todd Schelling
Amy Santoni
Craig Valine
William Greene
Bassam Elkhoury
John Lovelace
David O'shea
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to DE10393235T priority Critical patent/DE10393235T5/en
Priority to AU2003273286A priority patent/AU2003273286A1/en
Priority to GB0504086A priority patent/GB2408821B/en
Publication of WO2004023289A2 publication Critical patent/WO2004023289A2/en
Publication of WO2004023289A3 publication Critical patent/WO2004023289A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44536—Selecting among different versions
    • G06F9/44542—Retargetable
    • G06F9/44547—Fat binaries
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)
  • Hardware Redundancy (AREA)

Abstract

One embodiment of the invention provides a firmware architecture which splits firmware modules to support safe updates of specific modules as well as supporting multiple different processors. A firmware image is partitioned into several different binaries based on their update requirements and processor/platform dependence. A firmware interface table enables safe updates by enabling the option of redundant copies of specific modules as well as supporting systems with different and/or multiple processor types, mixed processors from the same family, and/or fault resilient firmware updates.
PCT/US2003/027791 2002-09-09 2003-09-05 Firmware architecture supporting safe updates and multiple processor types Ceased WO2004023289A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10393235T DE10393235T5 (en) 2002-09-09 2003-09-05 Firmware architecture that supports secure updates and multiple processor types
AU2003273286A AU2003273286A1 (en) 2002-09-09 2003-09-05 Firmware architecture supporting safe updates and multiple processor types
GB0504086A GB2408821B (en) 2002-09-09 2003-09-05 Firmware architecture supporting safe updates and multiple processor types

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/237,349 US7036007B2 (en) 2002-09-09 2002-09-09 Firmware architecture supporting safe updates and multiple processor types
US10/237,349 2002-09-09

Publications (2)

Publication Number Publication Date
WO2004023289A2 WO2004023289A2 (en) 2004-03-18
WO2004023289A3 true WO2004023289A3 (en) 2005-03-03

Family

ID=31977706

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/027791 Ceased WO2004023289A2 (en) 2002-09-09 2003-09-05 Firmware architecture supporting safe updates and multiple processor types

Country Status (7)

Country Link
US (1) US7036007B2 (en)
CN (1) CN100388196C (en)
AU (1) AU2003273286A1 (en)
DE (1) DE10393235T5 (en)
GB (1) GB2408821B (en)
TW (1) TWI269229B (en)
WO (1) WO2004023289A2 (en)

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US8136108B2 (en) * 2008-09-03 2012-03-13 Computime, Ltd Updating firmware with multiple processors
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US10177934B1 (en) 2009-09-04 2019-01-08 Amazon Technologies, Inc. Firmware updates inaccessible to guests
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US9565207B1 (en) 2009-09-04 2017-02-07 Amazon Technologies, Inc. Firmware updates from an external channel
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US8300641B1 (en) 2009-09-09 2012-10-30 Amazon Technologies, Inc. Leveraging physical network interface functionality for packet processing
US8959611B1 (en) 2009-09-09 2015-02-17 Amazon Technologies, Inc. Secure packet management for bare metal access
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CN102541571A (en) * 2010-12-08 2012-07-04 国基电子（上海）有限公司 Multiprocessor device and firmware updating method thereof
US9596082B2 (en) * 2011-12-15 2017-03-14 Intel Corporation Secure debug trace messages for production authenticated code modules
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US9030446B2 (en) 2012-11-20 2015-05-12 Samsung Electronics Co., Ltd. Placement of optical sensor on wearable electronic device
US11237719B2 (en) 2012-11-20 2022-02-01 Samsung Electronics Company, Ltd. Controlling remote electronic device with wearable electronic device
US10551928B2 (en) 2012-11-20 2020-02-04 Samsung Electronics Company, Ltd. GUI transitions on wearable electronic device
US11372536B2 (en) 2012-11-20 2022-06-28 Samsung Electronics Company, Ltd. Transition and interaction model for wearable electronic device
US11157436B2 (en) 2012-11-20 2021-10-26 Samsung Electronics Company, Ltd. Services associated with wearable electronic device
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EP0723226A1 (en) * 1995-01-18 1996-07-24 Hewlett-Packard Company Powerfail durable flash EEPROM upgrade
US5933652A (en) * 1996-08-30 1999-08-03 Advanced System Products, Inc. Host independent peripheral controller with on-board firmware
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US20010042243A1 (en) * 1998-12-31 2001-11-15 Andrew J. Fish Arrangements having firmware support for different processor types

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Also Published As

Publication number Publication date
AU2003273286A8 (en) 2004-03-29
US20040049669A1 (en) 2004-03-11
GB2408821A (en) 2005-06-08
WO2004023289A2 (en) 2004-03-18
CN1695118A (en) 2005-11-09
TWI269229B (en) 2006-12-21
CN100388196C (en) 2008-05-14
DE10393235T5 (en) 2005-07-28
US7036007B2 (en) 2006-04-25
TW200414042A (en) 2004-08-01
AU2003273286A1 (en) 2004-03-29
GB2408821B (en) 2006-04-12
GB0504086D0 (en) 2005-04-06

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