WO2004068763A1

WO2004068763A1 - A method and an apparatus of uplink synchronization acquisition

Info

Publication number: WO2004068763A1
Application number: PCT/CN2003/000088
Authority: WO
Inventors: Gang Quan; Yuan Zhang
Original assignee: Linkair Communications Inc
Current assignee: Linkair Communications Inc
Priority date: 2003-01-27
Filing date: 2003-01-27
Publication date: 2004-08-12
Anticipated expiration: 2005-07-27
Also published as: CN1714526A; AU2003303841A1

Abstract

The present invention is to provide a method and an apparatus of uplink synchronization acquisition. The present invention comprising the step of: the transmitter of the Sync Channel is located at every User Station; the transmitter generates the sync pulse and according to the message received from BS, the transmitter sends sync pulse in an arbitrary position; the BS receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS; this interaction between BS and MS takes place until the deviation of the received sync pulse from standard position at BS is within a certain limit; the receiver of the Sync Channel is located at Base station. It assures that all users' signal reach the Base Station at the same time or within the IFW and can assure all the users acquire synchronization. It can eliminate the multiple access interference.

Description

A Method and An Apparatus of Uplink

Synchronization Acquisition

Field of the invention

The present invention relates to the physical layer reference design of TD-LAS system. More specifically, the present invention relates to A Method and An Apparatus of Uplink Synchronization Acquisition.

Background of the invention

LAS-CDMA TDD system, or TD-LAS system, is designed to be a wireless packet system based on the proprietary LAS-CDMA technology. By TD-LAS, we consider LAS-CDMA TDD mode, so in the sequel, we will use interchangeably LAS-CDMA TDD or TD-LAS. The function of Uplink Sync Channel in TD-LAS system is to assure the initial synchronization of all active MS and of their spread codes.

LAS-CDMA is a synchronous CDMA system with its special feature of Interference Free Window (IFW). Since there is totally no MAI and ISI in the IFW, so if all users' signal reaches at the same time at Base Station, or within the IFW, then we can get the multiple access interference eliminated. To assure that all the users' signals reach at base station at the same time, all the users are required to acquire synchronization. Since all the users are randomly distributed in the cell, the distances of the users to the Base Station are different each other, and are their propagation delay. Consequently all the users' signals reaching Base Station are not synchronized. Uplink sync channel is designed to insure that the users be synchronized, i.e., arriving at BS at the same time. Summary of the invention

The object of the present invention is to provide a method and an Apparatus of uplink synchronization acquisition. It assures that all users' signal reach the Base Station at the same time or within the IFW and can assure all the users acquire synchronization. It can eliminate the multiple access interference.

A method of uplink synchronization acquisition comprising the step of: The transmitter of the Sync Channel is located at every User Station. The transmitter generates the sync pulse and according to the message received from BS, transmits in a free sync slot;

The transmitter sends sync pulse in an arbitrary position; The BS (Base Station) receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS (Mobile Station);

The MS adjusts the transmitting position of the sync pulse according to USC; This interaction between BS and MS takes place until the deviation of the received sync pulse from standard position at BS is within a certain limit; Under this condition, the MS is considered to be synchronized successful;

The receiver of the Sync Channel is located at Base station;

In the LAS-CDMA/TDD system, downlink physical channels and uplink physical channels are transmitted in the same carrier; The LAS-CDMA/TDD frame has a duration of 24 ms; The 24ms frame is divided into 14 sub-frames;

The first sub-frame, called the downlink sync sub-frame, has a length of 874 chips; It is allocated to the D-SYNCH;

The second sub-frame, called the uplink sync sub-frame, has a length of 962 chips. It is allocated to the U-SYNCH;

The remaining 12 sub-frames are traffic sub-frames; Each traffic sub-frame has a duration of at least 2359 chips; Either uplink physical channels or downlink physical channels can use the traffic sub-frames.

Wherein the said sync pulse is a compressed code of length 60 chips, which is formed by a C code of length 20 chips followed by a 20-chip gap and a S code of length 20 chips.

Wherein the said USC retrieves the delay control command from the received signal and the transmitting time of the Sync Pulse is adjusted accordingly;

The adjusting range is (0 - 42T and the adjusting unit is T 16 , so the delay control command is 10 bits.

Wherein the said acquisition function implemented at Base Station is to find the position of the Sync pulse, generate the USC and save data for multi-path finding procedure. The receiver should save 6*16 data around the standard position;

The range actually is ± 3T_C before the standard access chip; The data of the successful access pulse should be used for finding multi-path.

An Apparatus of uplink synchronization acquisition comprising: Uplink sync channel transmitter and uplink sync channel receiver; Wherein the said uplink sync channel transmitter includes: U-SYNCH code generator, means for framing, means for modulator; The said U-SYNCH code generator generates the sync pulse; The said means for framing is put the sync pulse into a free sync slot, and sends the signal towards, the said modulator; The modulated signal is then transmitted;

Wherein the said uplink sync channel receiver includes: matching filter, limiter, MRC module, 2 in 1 module, means for creating USC, means for finding multi-path;

The received base-band signal is input to the said matching filter; The output of the said matching filter is combined in the said MRC module; The output of the said

MRC module is input to the said 2 in 1 module; The output of the said 2 in 1 module is input to the said limiter; The output of the said limiter is input to the said means for creating USC and means for finding multi-path respectively.

Wherein the said U-SYNCH code generator generates the Sync pulse of length

60 chips; To assumed that the transmitted symbol be (A + JB) and the sync pulse is

(R_e + jIJ ; The transmitted signal should be: (A + jB)(R_e + //„,) ; In USCH, the transmitted symbol is fixed: A = \,B = 0 ; So the l-route should be R_e : the real part of the sync pulse, and the Q-route should be I_m : the image part of the sync pulse.

Wherein the said modulator consists of Base band Filter (BF) and the carrier modulator;

The BF implemented here is a root raised cosine filter;

The carrier frequency (Intermediate Frequency - IF) is 4/_c with sampling frequency of 16 /. ;

The modulated signal is then transmitted.

Wherein the said matching filter includes:

The received base-band signal is first fed to a 16-sample length sliding window;

The output of the said 16-sample length sliding window is input to the said matched filter.

Wherein the said limiter includes:

Limiter 1 has a fixed threshold — T1 ; If the input signals are all less than T1 , it declares that there is no sync pulse in this time slot; The threshold of limiter 1 should be set as a parameter that can be changed during the test. Wherein the said MRC module includes:

The output of the matched filter of each antenna is combined by the MRC algorithm; The FMV module finds the maximum value among the matching filter output data of one sync time, which is used as the weighting value. Wherein the said 2 in 1 module combines two continued MF output of two access slots of a U-SYNPCH sub-channel.

Wherein the said means for creating USC includes:

Limiter 2, sliding window, evaluator; The said Limiter 2 removes the input signals whose value is less than the product of the threshold — T2 and the output of the FMV module; Its function is to remove some noise; T2 is a configurable parameter;

The output of the said Limter2 module is then fed to the sliding window block, which is made of two delay circuits and an accumulator; The said sliding window sums the energy of several continuous paths, and translates the data from the energy of point to the energy of block.

The said evaluator module receives the signal coming from the said sliding window;

Wherein the said evaluator is comprised of FPLM-T (Find Position of Last Max value with Tolerance), a subtracter and a JUDGE block;

The FPLM-T fulfills the function below. It finds, at first, the maximum value in a block of 110*16 signals; and, it then finds the position of the last value which has no more difference than a small value with the maximum value;

The small value equals the product of the threshold — T3 and the maximum value; T3 is a configurable parameter; At last uses this position subtract the standard position to get USC; The value of USC is then compared to a small value (sync precision) at the module JUDGE to judge whether the sync is successful or not.

The present invention provides a method and an Apparatus of uplink synchronization acquisition. It assures that all users' signals reach at the Base Station at the same time or within the IFW and assures that all the users acquire synchronization. It eliminates the multiple access interference. Brief description of the drawings

Fig. 1 s Frame Structure at the Base Station; Fig. 2 s Structure of the Uplink sync channel; Fig. 3 s Sync pulse; Fig. 4 s 4 sector of phasell; Fig. 5 s the position of the sync pulse in the sync time slot; Fig. 6 s action of the MS during the uplink initial sync; Fig. 7 s action of the BS during the uplink initial sync; Fig 8 is Interface with other units in MS;

Fig 9 is Uplink Sync Channel Transmitter;

Fig. 10 is Interface with other units in BS; Fig. 11 is Uplink Sync Channel Receiver; Fig. 12 is Uplink Sync Channel Matching Filter;

Fig. 13 is MRC algorithm; Fig. 14 is Create USC Algorithm.

Detailed description of the preferred embodiments

LAS-CDMA is a synchronous CDMA system with its special feature of Interference Free Window (IFW). Since there is totally no MAI and ISI in the IFW, so if all users' signal reaches at the same time at Base Station or within the IFW then we can eliminate the multiple access interference. To assure all the users' signal reaches base station at the same time, all the users are required to acquire synchronization. Since all the users are randomly distributed in the cell, the distance of each user from the Base Station is different, and so the propagation delay. Consequently all the users' signal reaching Base Station is not synchronized. Uplink sync channel is assigned to support the users to be initially synchronized. Before starting communication, every user sends a fixed sequence of Sync Pulse, at the Base Station the received signal is processed so that to get the distance of the position of it from the Standard Position. Then the uplink sync channel receiver will create Uplink Sync Control (USC) command. The USC is sent to the user station to adjust its transmitting position. When the USC is in certain limit (precision) then the user is said to have acquired synchronization and start communication.

In the LAS-CDMA/TDD system, downlink physical channels and uplink physical channels are transmitted in the same carrier. The LAS-CDMA/TDD frame is duration of 24 ms. The 24ms frame is divided into 14 sub-frames. The first sub-frame, called the downlink sync sub-frame, has a length of 874 chips (1 chip = 0.78125 μs). It is allocated to the D-SYNCH. The second sub-frame, called the uplink sync sub-frame, has a length of 962 chips. It is allocated to the U-SYNCH. The remaining 12 sub- frames are called traffic sub-frames. Each traffic sub-frame has duration of at least 2359 chips. Either uplink physical channels or downlink physical channels can use the traffic sub-frames. Figure 1 shows the frame structure.

Characteristics and Structure of Uplink Sync Channel: In the uplink sync channel, 82 chips are as gap to separate the uplink sync channel with other channels. There are altogether 8 Time Slots each of length 110 chips in U-SYNCH. Figure 2 illustrates the sub-frame structure of the uplink (reverse) sync channel.

The U-SYNPCH consists of eight U-SYNPCH sub-channels. Each sub-channel is an unmodulated common channel to transmit two access bursts in a frame, one burst in an access slot. Table 1 shows the association of two access slots with each sub-channel.

Table 1 Association of U-SYNPCH subchannels with access slots

For each U-SYNPCH sub-channel, a code of two symbols, (a₀, a.,), are spread in a frame, a₀ for the first time slot and a₁ for the second time slot. Codes for U-SYNPCH sub-channels are given in Table 2 and used for differentiating different type of access. It is noted that they are orthogonal.

Table 2 Orthogonal codes for U-SYNPCH

Sync Pulse:Sync pulse is shown in the following figure 3. It is a compressed code of length 60 chips, which is formed by a C code of length 20 chips followed by a 20- chip gap and a S code of length 20 chips.

Sync pulsel is shown below:

Sector 1

C + . . + _ + — + + + + _ s + _ . + _ + - - _ + - + + + + + + - - +

Sector 2

C + - _ + . + — + + + + . s J J J J J J J J J J J J J J J J J J J J

Sector 3

C + 7 + 7 + 7 -7^'+ / -1 -1 - 1 + 1 + 1

S +1+J+ 1-1+1+1+1+1-1-1

Sector 4 C +Ϊ+Ϊ+1-J+Ϊ-1-]- 1+1+1

S 1+1+1-1+1 + 1+1-1+1-]-

Where '+ - ' denotes that the code is "1 +j" and "-1 ^'respectively, ' j j ' denotes that the code is "-1 +j" and "1-j" respectively. Figure 5 shows the position of the sync pulse in the sync time slot.

At the beginning of each uplink sync process (placing a call or responding the paging channel), the user station gets the information of all 8-uplink sync channel Time Slots (TS) from the downlink channel. The user station sends the sync pulse (60 chips) in two free time slots (110chips each). The user may be located in any place in the cell in other words the distance of the user from the base station is not known at the beginning. At the beginning all the users are supposed to be at the edge of the cell so the user station starts sending a sync pulse at position « χll0 and (n+4)*110. Where 'n' is the number of TS. The base station receives the sync pulse transmitted by user stations and calculates the distance from the standard position to generate the uplink sync control (USC). The USC is then transmitted to the respective user stations and accordingly the user stations adjust their transmitting time. This interaction between user stations and base station continues until the position of received sync pulse at base station is in certain limit. Then the Synchronization acquisition procedure is successful, and the system can turn to the following procedures. The USC command is transmitted by word RPAB in ACPCH. The mark of success is transmitted by word ACK in ACPCH. The action of the MS is illustrated as Fig.6. The action of the BS is illustrated as Fig.7.

The Uplink sync Channel Transmitter is described as follow:

1 ) Interface with other units in MS: The interface with other units of the uplink sync channel in MS is illustrated as

Fig.8. The up layer decides the transmission time of the sync pulse depending on the U-SYNCH time slot the MS selected and the delay control command from the BS.

2) Function model of the USCH transmitter (illustrated as Fig.9):

The transmitter of the Sync Channel is located at every User Station. The transmitter simply generates the sync pulse and according message received from BS, transmits in a free sync slot. At first, the transmitter sends sync pulse in arbitrary position. The BS (Base Station) receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS (Mobile Station). The MS adjusts the transmitting position of the sync pulse according to USC. This interaction between BS and MS takes place until the deviation of the received sync pulse from standard position at BS is within certain limit. In this condition, the MS is considered to be sync successful. U-SYNCH code generator: Generates the Sync pulse of length 60 chips. We assumed that the transmitted symbol is (_4 + /R) and the sync pulse is (R_e +j^'I_m) .

The transmitted signal should be: (A + j^'B)(R_e +j^'I_m) . In USCH, the transmitted symbol is fixed: A = l,B = 0. So the I route should be R. : the real part of the sync pulse, and the Q route should be l_m : the image part of the sync pulse. USC: USC is the acronym of Uplink Sync Control. The USC block retrieves the delay control command from the received signal (delay control command is transmitted by Base Station to the user station) and the transmitting time of the Sync Pulse is adjusted accordingly. The adjusting range is (0 ~ 42T_C) and the adjusting unit is T_c l\6 , so the delay control command is 10 bits. Framing: In this block Sync pulse is put into a free Sync slot and sends the signal towards Modulator.

Modulator: The Modulator consists of Base band Filter (BF) and the carrier modulator. The BF implemented here is a time rolled off raised cosine filter with roll off factor 0.5. The carrier frequency (Intermediate Frequency - IF) is Af_c with sampling frequency of \6f_c . The modulated signal is then transmitted.

The Uplink sync Channel receiver is described as follow:

1 ) Interface with other units in BS (As shown in the Fig.10).

2) Function model of U-SYNCH receiver (As shown in the Fig.11 ):

The receiver of the Sync Channel is located at Base station. The acquisition algorithm implemented at Base Station is to find the position of the each path of the multi path transmission.

Matching filter: The received base-band signal fed to a 16-sample length sliding window. The structure of the matched filter as shown in the Fig.12

Limiterl : Limiterl has a fixed threshold — T1. If the input signals are all less than T1 , it denotes that there is no sync pulse in this time slot. The threshold of limiterl should be set as a parameter that can be changed during the test.

MRC module: The output of the matched filter of each antenna is combined as MRC algorithm. The FMV module finds the maximum value among the matching filter output data of one sync time, which use as weighting value. The physical structure is showed as Fig.13.

2in1 module: This module combines two continued MF output of two access slots of a U-SYNPCH sub-channel. The code depict in Table 2 should be despreaded here. Create USC Algorithm: The receiver creates USC by finding the position of the max energy block, (as shown in Fig.14)

Limiter2: The module Limiter2 removes the input signals whose value is less than the product of the threshold — T2 and the output of the FMV module. Its function is to remove some noise. T2 is a configurable parameter. SLIDING WINDOW: The output of the Limter2 module is then fed to the

SLIDING WINDOW block, which is made of two delay circuits and an accumulator. In other words the sliding window is 3T_C long and it accumulates consequent three signals. The window is selected 2>T_C long is to accumulate the signal in 3_T_C . The rate at output of the SLIDING WINDOW is still 16/_c . EVALUATOR: The EVALUATOR module receives the signal coming from the

SLIDING WINDOW. The EVALUATOR module is comprised of FPLM-T (Find Position of Last Max value with Tolerance), a subtracter and a JUDGE block. The FPLM-T fulfill the function below: first finds the maximum value in a block of 110*16 signals; and then finds the position of the last value which has no more difference than a small value with the maximum value. The small value equals the product of the threshold — T3 and the maximum value. T3 is a configurable parameter. At last uses this position subtract the standard position to get USC. The value of USC is then compared with a small value (sync precision) at the module JUDGE to judge whether the sync is successful or not. Find multi-path algorithm: The receiver should save 6*16 data around the standard position. The range actually is + T_C before the standard access chip. The data of the successful access pulse should be used for find multi-path algorithm.

The present invention provides a method and an Apparatus of uplink synchronization acquisition. It can assure all users' signal reaches the Base Station at the same time or within the IFW and can assure all the users acquire synchronization. It can eliminate the multiple access interference.

Although the invention has been described in detail with reference only to a preferred embodiment, those skill in the art will appreciate that various modifications can be made without departing from the invention. Accordingly, the invention is defined only by the following claims, which are intended to embrace all equivalents thereof.

Claims

1. A method of uplink synchronization acquisition comprising the step of: The transmitter of the Sync Channel is located at every User Station;

The transmitter generates the sync pulse and according to the message received from BS, transmits in a free sync slot;

The transmitter sends sync pulse in an arbitrary position; The BS receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS;

The receiver of the Sync Channel is located at Base station.

2. The method of claim 1 , In the LAS-CDMA/TDD system, downlink physical channels and uplink physical channels are transmitted in the same carrier;

The LAS-CDMA/TDD frame has a duration of 24 ms; The 24ms frame is divided into 14 sub-frames;

The first sub-frame, called the downlink sync sub-frame, has a length of 874 chips; It is allocated to the D-SYNCH; The second sub-frame, called the uplink sync sub-frame, has a length of 962 chips; It is allocated to the U-SYNCH;

3. The method of claim 1 , wherein the said sync pulse is a compressed code of length 60 chips, which is formed by a C code of length 20 chips followed by a 20-chip gap and a S code of length 20 chips.

4. The method of claim 1 , wherein the said USC retrieves the delay control command from the received signal and the transmitting time of the Sync Pulse is adjusted accordingly; The adjusting range is (0 - 422 ) and the adjusting unit is -T. /16 , so the delay control command is 10 bits.

5. An apparatus of uplink synchronization acquisition comprising: Uplink sync channel transmitter and uplink sync channel receiver; Wherein the said uplink sync channel transmitter includes: U-SYNCH code generator, means for framing, means for modulator;

The said U-SYNCH code generator generates the sync pulse; The said means for framing is put the sync pulse into a free sync slot into, and sends the signal towards the said modulator; The modulated signal is then transmitted; Wherein the said uplink sync channel receiver includes: matching filter, limiter,

MRC module, 2 in 1 module, means for creating USC, means for finding multi-path;

The received signal is input to the said matching filter; The output of the said matching filter is combined in the said MRC module; The output of the said MRC module is input to the said 2 in 1 module; The output of the said 2 in 1 module is input to the said limiter; The output of the said limiter is input to the said means for creating

USC and means for finding multi-path respectively.

6. The apparatus of claim 5, wherein the said U-SYNCH code generator generates the Sync pulse of length 60 chips; To assumed that the transmitted symbol be (A + J^'B) and the sync pulse is (R_e +j^'I_m) ; The transmitted signal should be:

(A + lB)(R_e + β_m) ; In USCH, the transmitted symbol is fixed: = 1,5 = 0; So the I

route should be R_e : the real part of the sync pulse, and the Q route should be I_m : the image part of the sync pulse.

7. The apparatus of claim 5, wherein the said modulator consists of Base band Filter and the carrier modulator; The BF implemented here is a root raised cosine filter;

The carrier frequency is 4/_c with sampling frequency of \6f_c ;

The modulated signal is then transmitted.

8. The apparatus of claim 5, wherein the said matching filter includes:

The received base-band signal is first fed to a 16-sample length sliding window; The output of the said 16-sample length sliding window is input to the said matched filter.

9. The apparatus of claim 5, wherein the said limiter includes:

Limiterl has a fixed threshold — T1 ; If the input signals are all less than T1 , it denotes that there is no sync pulse in this time slot; The threshold of limiterl should be set as a parameter that can be changed during the test.

10. The apparatus of claim 5, wherein the said MRC module includes:

The output of the matched filter of each antenna is combined by the MRC algorithm; The FMV module finds the maximum value among the matching filter output data of one sync time, which is used as the weighting value.

11. The apparatus of claim 5, wherein the said 2 in 1 module combines two continued MF output of two access slots of a U-SYNPCH sub-channel.

12. The apparatus of claim 5, wherein the said means for create USC includes: Limiter2, sliding window, evaluator; The said Limiter2 removes the input signals whose value is less than the product of the threshold — T2 and the output of the FMV module; Its function is to remove some noise; T2 is a configurable parameter;

The output of the said Limter2 module is then fed to the sliding window block, which is made of two delay circuits and an accumulator; The said sliding window sums the energy of several continuous paths, and translates the data from the energy of point to the energy of block;

The said evaluator module receives the signal coming from the said sliding.

13. The apparatus of claim 12, wherein the said evaluator is comprised of FPLM-T, a subtracter and a JUDGE block; The FPLM-T fulfills the function below; It finds, at first, the maximum value in a block of 110*16 signals; and it then finds the position of the last value which has no more difference than a small value with the maximum value;

The small value equals the product of the threshold — T3 and the maximum value;

T3 is a configurable parameter; At last uses this position subtract the standard position to get USC; The value of USC is then compared to a small value at the module

JUDGE to judge whether the sync is successful or not.