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WO2004059860A1 - Architecture de recepteur de telephonie mobile et procede pour synchroniser des blocs-materiels d'un recepteur de telephonie mobile - Google Patents

Architecture de recepteur de telephonie mobile et procede pour synchroniser des blocs-materiels d'un recepteur de telephonie mobile Download PDF

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Publication number
WO2004059860A1
WO2004059860A1 PCT/DE2003/004048 DE0304048W WO2004059860A1 WO 2004059860 A1 WO2004059860 A1 WO 2004059860A1 DE 0304048 W DE0304048 W DE 0304048W WO 2004059860 A1 WO2004059860 A1 WO 2004059860A1
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Prior art keywords
gen
offset
rake
scr
frame
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PCT/DE2003/004048
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German (de)
English (en)
Inventor
Burkhard Becker
Robert Denk
Christian Drewes
Wolfgang Haas
Thomas Herndl
Michael HOFSTÄTTER
Manfred Zimmermann
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Infineon Technologies AG
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Infineon Technologies AG
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Priority to AU2003298059A priority Critical patent/AU2003298059A1/en
Publication of WO2004059860A1 publication Critical patent/WO2004059860A1/fr
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/711—Interference-related aspects the interference being multi-path interference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/711—Interference-related aspects the interference being multi-path interference
    • H04B1/7115—Constructive combining of multi-path signals, i.e. RAKE receivers
    • H04B1/7117—Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers

Definitions

  • the invention relates to a mobile radio receiver for the simultaneous demodulation of several physical channels with different frame times and a method for synchronizing hardware blocks of a mobile radio receiver, which is designed for the simultaneous demodulation of several physical channels with different frame times.
  • Modern mobile radio receivers are characterized by the fact that a large number of computing algorithms in hardware - i.e. in hard-wired hardware circuits.
  • These hard-wired hardware circuits which are often referred to in the literature as “hardware supports” or “dedicated (hardware) data paths", enable fast and energy-saving processing of recurring computing operations.
  • a despreading unit which multiplies a spreading code correctly with a data stream which consists of the received samples of a received signal.
  • a data stream which consists of the received samples of a received signal.
  • Signals that are sent from different base stations are not correlated in time.
  • the different frame timings of the signals from different base stations are measured in the receiver. They must also be taken into account when despreading the received signal (stream of samples); -
  • different start times for the despreading of different received signals are specified by the user.
  • the system must support a channel-specific specification of certain desired start times for the despreading (e.g. for measurement purposes).
  • each timer is assigned to an active base station (from which a signal is received) and generates a base station-specific trigger signal.
  • a hardware block is started by means of this trigger signal. The trigger signal ensures that exactly the desired or "correct" sample values are processed in the hardware block.
  • the trigger signal can indicate the start of a time frame if the hardware block is to be activated at the start of the time frame. Or it is possible that the trigger signal indicates the start of a power measurement to be started, which is coincident with the start of a symbol limit of a data stream received by a specific base station.
  • Fig. 1 shows the general architecture of a mobile radio receiver according to the prior art. A stream of samples is fed to a rake demodulator RK via a data connection 1. For easier understanding, multipath propagation is initially neglected. Three identical signals are considered, which are received by three different base stations via only one propagation path at the receiver. In order to enable timely demodulation of these three signals in the rake fingers, the
  • each trigger signal S1, S2, S3 has a pulse which starts a finger of the rake demodulator RK, see FIG. 2.
  • One of the trigger signals S1, S2, S3 becomes a data link 5, 6 and a multiplexer MUX selected and applied to a trigger input 7 of the rake demodulator RK.
  • the selection of the associated rake finger (not shown) of the rake demodulator RK is made via the data connections 5, 6, 8.
  • the selected rake finger then demodulates the signal originating from the selected base station starting from the point in time specified by the trigger signal. If (as usual) the signals of several base stations are to be demodulated simultaneously, the rake demodulator RK must be supplied with several trigger signals S1, S2, S3 via three trigger inputs (each corresponding to trigger input 7).
  • a demodulated signal is output which is based on the received signals from several base stations.
  • the time control of the rake demodulator RK explained by means of FIGS. 1 and 2 by means of independent timers TM1, TM2, TM3 is useful for monitoring a large number of base stations. cations no longer practical.
  • UMTS Universal Mobile Telecommunications System
  • the signals from up to 6 base stations (or cells) are simultaneously demodulated (so-called active set), and signals from a maximum of 26 base stations are also monitored in the so-called monitor set (those in the monitor Set-monitored other base stations are possible candidates, which can be transferred to the Active Set under certain conditions during a connection).
  • monitor set such as a result, 32 independent timers are required in the worst case, each with its own time base for a base station (e.g. in the form of a trigger signal at the beginning of the respective time frame or at the start of a power measurement to be carried out) for the rake demodulator RK or a hardware block within the Generate rake demodulator RK.
  • controlling so many timers is relatively complicated, especially when time-multiplexed rake fingers are to be used for various demodulation tasks.
  • the invention has for its object to provide a simple concept for the synchronization of hardware blocks in a mobile radio receiver, which for simultaneous
  • the invention aims to provide a method for the synchronization of hardware blocks of a mobile radio receiver, which is designed for a simultaneous demodulation of several signals transmitted by different base stations with different frame times.
  • a mobile radio receiver comprises a digital signal processor (DSP), a plurality of hardware blocks for processing signals with different frame time slots, each hardware block having a timing input for receiving a reference time trigger signal and a port for receiving Offset parameters, which determine a time offset between a desired processing timing of the hardware block and the reference time trigger signal, has a single timer which generates a common reference time trigger signal for all hardware blocks and this to the timing inputs of the Feeds hardware blocks, and one or more data connections that connect or connect the ports with the digital signal processor, for programming the hardware blocks with the offset parameters.
  • DSP digital signal processor
  • the idea on which the invention is based is to provide only a single timer (timer) for the entire hardware and thus only a single time base (given by the reference time trigger signal).
  • timer timer
  • the individual hardware blocks of the mobile radio receiver are programmed decentrally with respective offset parameters.
  • the offset parameters refer to different propagation paths, to different starting conditions for demodulation, to different uncorrelated frame timings of the signals from different base stations or to a different time allocation of the spreading codes (scrambling code, channelization code) ).
  • the presence of only a single timer means a simplification of the hardware - but also a simplification of the synchronization as such, since only a single, system-wide reference time trigger signal has to be taken into account.
  • the trigger signals S1, S2 and S3 occurring in the prior art (see FIGS. 1 and 2), which are based on the respective frame timings of the different basic Orient the signals received from stations. Furthermore, the allocation of hardware blocks to specific timers required in the prior art is dispensed with.
  • the time behavior of the hardware blocks is programmed using the offset parameters directly on the hardware block itself and not by programming the respective timers.
  • the DSP uses the same programming principle for the different hardware blocks (programming of the hardware blocks with reference time-related offset parameters), i.e. a uniform interface between the DSP and the hardware is implemented.
  • this increases the scalability of the hardware (for new hardware blocks only a further set of offset parameters has to be calculated in the DSP), and on the other hand it facilitates the optimal use of the hardware blocks by time-division multiplexing techniques, because (unlike in the prior art) no trigger signals have to be made available to the assigned hardware blocks in the time-division multiplex pattern.
  • a particularly preferred embodiment of the invention is characterized in that the hardware blocks are the fingers of a rake demodulator as well as address generators and code generators.
  • the hardware blocks are the fingers of a rake demodulator as well as address generators and code generators.
  • This one reference time trigger signal preferably shows the timing of the beginning of the frame of the pilot channel, in particular CPICH (Common Pilot Channel) in the UMTS standard, of the base station first detected
  • the reference time trigger signal is available at the earliest possible time during the signal acquisition - namely already after synchronization with the first base station.
  • the reference time trigger signal is coupled to the transmission time in the mobile radio receiver.
  • the time reference for the mobile station is defined not the time of reception (frame start of the CPICH channel) but the time of transmission. This is shifted from the frame start of the CPICH channel by a time difference of 1024 chips.
  • the transmission time can be changed at a defined rate. In particular, this procedure is carried out when the reference base station ceases to exist and another base station must be selected as the reference base station. In this case, the transmission time is successively changed (with a predefined maximum rate of change) until the end of the procedure, the transmission time is at a time interval of 1024 chips from the beginning of the frame of the CPICH channel of the new reference base station.
  • a rake demodulator preferably has a rake memory common to the rake fingers for the intermediate storage of samples to be processed in the rake fingers and one
  • Address generator for generating read addresses for the rake memory, the address generator comprising the port for input of offset parameters and the timing input.
  • the offset parameters indicate the delay times of different propagation paths, based on the reference time trigger signal, and the read addresses for the sample values assigned to a propagation path are dependent on the reference time trigger signal and the offset parameter (s) assigned to this propagation path (n) generated.
  • Propagation path delay characteristic offset parameters the path delays of the signal components of a signal transmitted over different propagation paths are taken into account.
  • a rake finger Code generator for generating a spreading code for despreading a path component of a signal processed in one of the rake fingers, the code generator comprising the port for entering offset parameters and the timing input, and also the one for the rake Finger provided spreading code generated at a time which is dependent on the reference time trigger signal and the offset parameter assigned to this rake finger.
  • the code generator is programmed by means of the offset parameter with reference to the trigger point in time, which is predetermined by the reference time trigger signal.
  • Figure 1 is a schematic representation of a mobile radio receiver with a rake demodulator according to the prior art controlled by a plurality of timers;
  • FIG. 2 is a graph of the trigger signals output by the timers shown in FIG. 1;
  • FIG. 3 shows a schematic representation of the structure of a mobile radio receiver according to the invention with a rake demodulator controlled by a central timer;
  • FIG. 4 is a graph of the reference time trigger signal output by the central timer shown in FIG. 3;
  • Fig. 5 is a block diagram of the arrangement shown in Fig. 3; 6 is a diagram for explaining the offset parameters for programming a code generator for code generation; and
  • Fig. 7 is a diagram for explaining the offset parameter for programming a rake memory for taking the travel delay into account in the rake demodulator.
  • FIG. 3 and 4 show the basic concept of the present invention.
  • the same components as in Figures 1 and 2 are identified in Figures 3 and 4 with the same reference numerals.
  • the DSP is connected to a central timer TM_C via a data connection 20.
  • the central timer TM_C outputs a reference time trigger signal 40, which is shown in FIG. 4.
  • the reference time trigger signal can consist, for example, of a pulse which occurs at the time REF .
  • the reference time trigger signal 40 is fed to the rake demodulator RK.
  • the rake demodulator RK receives one or more offset parameters from the DSP via a data connection 30.
  • the offset parameter or parameters relate to the time t RE p of the reference time trigger signal and indicate the time periods after the occurrence of the Reference time trigger signal certain activities (which will be explained in more detail with reference to FIG. 5) are started or ended.
  • the time is represented in units of a common system clock clk, which is fed to both the central timer TM_C and the rake demodulator RK.
  • the main difference to the arrangement shown in FIGS. 1 and 2 is that the rake demodulator RK is supplied with only a single, universal reference time trigger signal 40, although signals from different base stations with uncorrelated frame time positions and even different path components of the multipath propagation are demodulated in the rake demodulator RK.
  • FIG. 5 shows a block diagram of the circuit shown in FIG. 3.
  • the sample values supplied to a memory RAKE_RAM via the data connection 1 are obtained in a manner not shown by mixing down an analog antenna signal into the baseband or into an intermediate frequency range and subsequent sampling at a sufficiently high sampling rate.
  • the chip time period T c 0.26 ⁇ s, ie the chip rate Tc "1 is 3.84 MHz.
  • the samples, which chips (sampling rate 3.84 MHz) or preferably half-chips (sampling rate 7.68 MHz) are collected in the memory RAKE_RAM.
  • the memory RAKE_RAM is followed by several (N) rake components RD1, RD2, ..., RDN.
  • the rake components RD1, RD2, ..., RDN are identical in construction and are explained using the rake component RD1 as an example.
  • the rake component RD1 comprises an interpolator TVI (Time Variant Interpolator), a despreading stage DS, which despreads the interpolated signal with a scrambling code and a channelization code, an Integrate & Dum unit
  • I&D which integrates the despread chips over a symbol time period (ie, sf chips are added in each case and the value obtained in the process is output as a symbol; sf denotes the spreading factor of the channelization code) and a multiplier M, which is the unit I&D received symbols multiplied by a channel weight.
  • the outputs of the rake components RD1, RD2, ..., RDN are fed to a combiner (maximum ratio combiner) MRC, which is the symbol which (although received via different propagation paths and possibly also transmitted by different base stations) are assigned to the same signal, added.
  • the demodulated symbols of one or more signals are output in the usual way at the output 9 of the combiner MRC.
  • the despreading stage DS can be realized by two serially arranged despreading units (multipliers) DSCR and DCHN. be based.
  • the despreading unit DSCR carries out the so-called de-scrambling (descrambling) of the sequence of chip values obtained. (If the samples stored in the RAKE_RAM memory are half-chips, the interpolator TVI effects a rate reduction by a factor of 2, so that chip values are always present at the input of the de-spreading stage DS.)
  • the de-spreading unit DSCR from a scrambling code generator SCR_GEN via, the data connection 50.1 a scrambling code. Further scrambling codes generated by the scrambling code generator are supplied via the data connections 50.2,..., 50.N to corresponding despreading units DSCR in the further rake components RD2,..., RDN.
  • scrambling codes are used to distinguish signals originating from different base stations. More precisely, the signals transmitted by a specific base station are multiplied by a base station-specific scrambling code on the transmitter side. By de-scrambling in the despreading unit DSCR, the considered rake component RD1 is assigned to a specific base station.
  • the de-channelization unit DCHN despreads the channelization code. It is therefore fed (in a manner not shown here) with a channelization code.
  • the circuit used for this includes a channelization code generator. It corresponds to the circuit for de-scrambling and is not shown in FIG. 5 for reasons of clarity.
  • the rake component RD1 is assigned to a specific physical channel by the channelization code. (As is generally known, physical channels in CDMA systems are made distinguishable from one another by multiplying a channelization code. In particular, the channelization codes enable subscriber separation. Each subscriber of a mobile radio network is assigned a specific channelization code. grasslands. The symbols (only) intended for this subscriber are multiplied on the transmitter side by the channelization code assigned to this subscriber. By loading the despreading unit DCHN with this subscriber-specific channelization code, the CDMA-typical subscriber-specific user data demodulation is achieved.)
  • the two de-spreading units DSCR and DCHN can also be implemented by a single de-spreading unit (multiplier), which in this case is acted on by a product of scrambling code and channelization code.
  • multiplier de-spreading unit
  • spreading code in this application denotes scrambling codes, channelization codes and also products of these codes.
  • each rake finger is “set” to a specific propagation path by a delay element provided on the input side, ie the propagation path delays which, due to the multipath propagation, cause one to be transmitted from a base station Signals occur at the input of each rake finger to be compensated.
  • this is done in that the sample values obtained in chronological order via input 1 are stored in sequence in the cyclic memory RAKE_RAM, but for the rake components RD1, RD2, ..., RDN with different read addresses ""read out simultaneously.”
  • "Simultaneously” means that a sample value is read out for each active rake component RD1, RD2, ..., RDN within a chip period by a correspondingly high system clock clk.
  • the different read addresses AD (1), ..., AD (N) for the rake components RD1, RD2, ..., RDN are provided to an address decoder AD_DEC of the memory RAKE_RAM by the address generator AD_GEN.
  • the memory RAKE_RAM together with the address generator AD_GEN and the address decoder AD_DEC therefore allows the multipath propagation delay in the individual rake fingers to be compensated.
  • the memory RAKE_RAM thus represents the delay elements for all rake fingers.
  • Each rake finger accordingly comprises a rake component RD1, ..., RDN and the (common) memory RAKE_RAM.
  • Each base station transmits according to chapter 5.3.3.1.1. the specification above exactly one CPICH per cell. This one CPICH is valid for the entire cell.
  • the CPICH transmitted by a base station with the index 0 is referred to below as CPICH_BS (0)
  • the CPICH transmitted by a base station with the index 1 is referred to below as CPICH_BS (1). Since the same channelization code is used for all CPICHs, the only difference between the CPICHs transmitted by different base stations is their srambling code.
  • One frame of the CPICH channel lasts 10 ms.
  • the frame comprises 15 time slots.
  • each time slot contains 2560 chips.
  • the frame period is therefore 38400 chip periods. 10 symbols (10 x 256 chips) of the CPICH channel are transmitted within one time slot.
  • the cell-specific CPICH channels are subjected to a process of matched filtering.
  • the cells are distinguished by the scrambling code.
  • the multipath components of the propagation within the relevant cell can be recognized from the power distribution of the correlation results depending on the starting time of the correlation. The same procedure is repeated for all known cells.
  • CPICH_BS (1) shown (bold lines; the x-axis corresponds to the time direction).
  • the respective beginning of the frame are designated with the reference numerals 100.0 (of the CPICH_BS (0)) and 100.1 (of the CPICH_BS (1)).
  • the time difference occurring at the receiver between the beginning of the channel frame is designated with the reference numerals 100.0 (of the CPICH_BS (0)) and 100.1 (of the CPICH_BS (1)).
  • CPICH_BS (1) and the frame beginning of the channel CPICH_BS (0) is called CPICHJDEL (l) and is known to the recipient after the acquisition.
  • DPCH Dedicated Physical Channel
  • the frames of the DPCH channels are designated in FIGS. 6 and 7 with DPCH_BS (0) for the base station with the index 0 and DPCH_BS (1) for the base station with the index 1.
  • the frames of the DPCH channels also have a duration of 10 ms and a length of 15 time slots.
  • CPICH and DPCH frames from the same base station are out of sync. The following designation is used:
  • frame_offset (i) Time offset of the DPCH_BS (i) frame compared to the CPICH_BS (i) frame for the base station BS (i) with the index i.
  • the time offset frame_offset (i) is communicated by the respective base station BS (i).
  • the values frame__offset (i) are thus known in the receiver for all monitored base stations of the indices i.
  • both the DPCH_BS (0) channel and the DPCH_BS (1) channel in the rake receiver is to be started at a certain point in time - for example because the same signal is transmitted over both channels and both channels are to be used for demodulation the following steps are carried out according to the invention:
  • the reference time trigger signal of the central timer TM_C transmitted via the signal line 40 is set to the start of frame 100.0 of the CPICH frame CPICH_BS (0) identified first during the acquisition, or generally to a time reference which is based on the time of transmission. As already explained above, this point in time can e.g. if the current reference base station is lost, change at a predetermined rate until the reference time trigger signal 40 of the central timer TM_C is coincident with a new time reference which is based on the reception time of the CPICH channel of another base station.
  • the desired start time for demodulation is based on this reference time trigger signal and is therefore B_TS. 6 and 7, it was assumed that the reference time trigger signal 40 indicates the timing of the start of the frame 100.0 of the channel CPICH BS (0).
  • This reference time trigger signal remains valid as long as this base station BS (0) is received by the receiver.
  • the reference time trigger signal is updated at a predefined maximum rate and defined indirectly via the new transmission time with respect to the CPICH frame start of another base station communicated by higher layer. In the following time, this other base station then determines the time base in the receiver.
  • “Loading the scrambling code” means that the two shift registers of the code generator (code generators realized by feedback shift registers; the code generator for generating scrambling codes in the UMTS standard is shown in chapter 5.2.2, Fig. 10, specification TS 25.213 V4.3.0) at the time of loading with the initial assignment specified by the code number (based on the CPICH-BS (i) frame limit) as well as the time shift between the CPICH-BS (i) frame start and the time B_TS.
  • the scrambling code available at time B_TS includes a preliminary run of the scrambling code generator SCR_GEN loaded with the scrambling code of the number SCR_CNR (i) by frame_offset (i) + start_offset (i) time units (chips), that is exactly the time difference between the CHPICH_BS (i) frame start and the start of demodulation.
  • start__offset (i) specifies the time span by which the time B_TS (start of the demodulation at the time
  • B_TS is delayed from the beginning of the DPCHJ3S (i) frame.
  • SCR_CNR Number of the base station's scrambling code with index i.
  • B_SCR_CNR Initial value of the scrambling code at time B__TS (is obtained by loading the scrambling code generator with SCR_CNR (i) and advancing the scrambling code generator by frame_offset (i) + start_offset (i) time units generated) .
  • R_TS Time for loading the scrambling code of the number SCR_CNR (i) assigned to the base station with index i and not changed in advance into the scramblin code generator (always at the start of the CPICH_BS (i) frame).
  • FIG. 6 shows the time relationships discussed above between CPICH BS (i) and DPCH BS (i) frames with the time difference of frame_offset (i). Since in the example shown here (FIG. 6) the start of the demodulation at the time BT_S is not identical to the start of the frame of one of the two DPCH frames, start_offset (i) must be taken into account. It applies
  • B_TS frame_offset (i) + start_offset (i) + CPICH_DEL (i)
  • the scrambling code number SCR_CNR (i) relates to the beginning of the frame of the associated CPICH channel CHPICH_BS (i).
  • R_TS (i) matches the frame limit of the CPICH_BS (i) frame:
  • R_TS (i) (B_TS - frame_offset (i) - start__offset (i)) mod 38400
  • the demodulation of the DPCH_BS (i) channel start_offset (i) is communicated to the scrambling code generator SCR_GEN via the data connection 30.1 shown in FIG. 5.
  • the scrambling code number SCR__CNR (i) which is valid for the respective base station, initiates a preliminary run of the scrambling code generator.
  • the number of offset values communicated depends on the number of base stations monitored in the Active Set and in the Monitor Set.
  • the initial value of the scrambling code number at time B_TS results from:
  • B_SCR__CNR (i) SCR_CNR (i) + frame_offset (i) + start_offset (i)
  • the delay compensation illustrated in FIG. 7 relates to the DPCH channels of the base stations of the active set. If the channel DPCH_BS (0) of the base station with index 0 is selected as the reference, the propagation path delay actframe_offset (i) can be defined as follows:
  • actframe_offset (i) temporal offset between the time frame start DPCH_BS (0) and the
  • the propagation path delay actframe_offset (i) is a measured variable determined in the receiver.
  • the values for actframe_offset (i) are calculated by the DSP, for example in time units of a chip, and are output to the address generator AD_GEN via the data connection 30.2.
  • the address generator AD_GEN converts the time differences actframe_offset (i) into address differences (if, for example, a half chip is stored in the memory RAKE_RAM per memory location, the difference between the read addresses AD (nl) and AD (n2) is for the two rake components RD (nl) and RD (n2), which spread the channels DPCH_BS (0) or DPCH_BS (i), 2 * actframe_offset (i)).
  • the address generator AD_GEN calculates a read address AD (1), ..., AD (N.) For each propagation path between each base station of the Active Set and the receiver ). The sample values stored under the addresses AD (1), ..., AD (N) are read out simultaneously from the memory RAKE_RAM.
  • the memory RAKE_RAM is read out up to 2 * N times within a chip time period (provided all rake components RD1, RD2, ..., RDN are active and two half chips per chip- Duration and rake component are read out), so that a sample value is available behind the interpolator TVI for each rake component RD1, RD2, ..., RDN in each chip time cycle.
  • the size of the memory RAKE_RAM must be selected so that the sample values for all propagation paths of all cells of the active set are simultaneously available in the memory RAKE_RAM. This means that when storing half chips, the memory RAKE_RAM must have a larger number of memory locations than the maximum value of 2 * actframe_offset (i) (a memory size for 400 chips is sufficient).
  • actframe_offset (i) only denote the relative time differences between the various multi-way components. These relative times must be related to an absolute time. For this purpose, the relative time information on the CPICH-
  • the parameters actframe_offset (i) and frame_offset (0) are transmitted via the data connection 30.2.
  • the relative times can be related to an absolute time that is based on the time of transmission of the mobile station. Referencing to an absolute time is necessary because the RAKE RAM refers to the solute time is filled cyclically with received data and thus a relationship between the write pointer and read pointer must be established.
  • the data connection 30.3 between the DSP and the rake components RD1, RD2, ..., RDN enables programming of the rake components RD1, RD2, ..., RDN by means of offset parameters based on the reference time trigger signal 40.

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

L'invention concerne un récepteur de téléphonie mobile comprenant un processeur de signaux numérique (DSP), une pluralité de blocs-matériels (RD1, ..., RDN, AD_GEN, SCR_GEN) pour traiter les signaux, et un seul registre d'horloge (TM_C), qui génère un signal (tREF) de déclenchement de temps de référence commun à tous les blocs-matériels. Ce signal de déclenchement est envoyé à des entrées de synchronisation (40) des blocs-matériels, lesquels sont programmés par le processeur de signaux numérique (DSP) pour traiter des signaux envoyés par différentes stations de base (BS(i)) avec différents intervalles de temps cadres.
PCT/DE2003/004048 2002-12-23 2003-12-09 Architecture de recepteur de telephonie mobile et procede pour synchroniser des blocs-materiels d'un recepteur de telephonie mobile Ceased WO2004059860A1 (fr)

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AU2003298059A AU2003298059A1 (en) 2002-12-23 2003-12-09 Mobile radio receiver architecture and method for synchronisation of the hardware blocks of a mobile radio receiver

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DE10260653.6 2002-12-23
DE2002160653 DE10260653B4 (de) 2002-12-23 2002-12-23 Mobilfunkempfänger-Architektur und Verfahren zum Synchronisieren von Hardware-Blöcken eines Mobilfunkempfängers

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WO2004059860A1 true WO2004059860A1 (fr) 2004-07-15

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PCT/DE2003/004048 Ceased WO2004059860A1 (fr) 2002-12-23 2003-12-09 Architecture de recepteur de telephonie mobile et procede pour synchroniser des blocs-materiels d'un recepteur de telephonie mobile

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EP1128565A2 (fr) * 2000-02-18 2001-08-29 Texas Instruments Incorporated Processeur auxiliaire correlateur pour récepteur du type rake à AMRC
WO2003041294A1 (fr) * 2001-11-06 2003-05-15 Qualcomm Incorporated Appareil et procede pour demodulation armc extensible autonome
WO2003058836A1 (fr) * 2001-12-27 2003-07-17 Interdigital Technology Corporation Structure rake amelioree

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JPH11298401A (ja) * 1998-04-14 1999-10-29 Matsushita Electric Ind Co Ltd 同期処理装置及び同期処理方法
US7031271B1 (en) * 1999-05-19 2006-04-18 Motorola, Inc. Method of and apparatus for activating a spread-spectrum radiotelephone
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EP1128565A2 (fr) * 2000-02-18 2001-08-29 Texas Instruments Incorporated Processeur auxiliaire correlateur pour récepteur du type rake à AMRC
WO2003041294A1 (fr) * 2001-11-06 2003-05-15 Qualcomm Incorporated Appareil et procede pour demodulation armc extensible autonome
WO2003058836A1 (fr) * 2001-12-27 2003-07-17 Interdigital Technology Corporation Structure rake amelioree

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DE10260653B4 (de) 2010-12-09
DE10260653A1 (de) 2004-07-08
AU2003298059A1 (en) 2004-07-22

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