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WO2003039090A3 - Method and apparatus for error correction in a data transmission system - Google Patents

Method and apparatus for error correction in a data transmission system Download PDF

Info

Publication number
WO2003039090A3
WO2003039090A3 PCT/US2002/034961 US0234961W WO03039090A3 WO 2003039090 A3 WO2003039090 A3 WO 2003039090A3 US 0234961 W US0234961 W US 0234961W WO 03039090 A3 WO03039090 A3 WO 03039090A3
Authority
WO
WIPO (PCT)
Prior art keywords
value
data transmission
error correction
transmission system
decision system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2002/034961
Other languages
French (fr)
Other versions
WO2003039090A2 (en
Inventor
Hiroshi Takatori
James Little
Scott Chiu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to AU2002363157A priority Critical patent/AU2002363157A1/en
Publication of WO2003039090A2 publication Critical patent/WO2003039090A2/en
Publication of WO2003039090A3 publication Critical patent/WO2003039090A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H04L7/0062—Detection of the synchronisation error by features other than the received signal transition detection of error based on data decision error, e.g. Mueller type detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

A receiver includes a decision system. Which calculates a value of an input signal and holds the value as a tentative value. The decision system calculates an error value, amplifies the error value, and holds the amplified error value as a corrected value. If the amplified error value is within a marginal range and the input signal was in transition from a positive to negative state, or a negative to positive state, then the decision system overrides the tentative value with the corrected value.
PCT/US2002/034961 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system Ceased WO2003039090A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002363157A AU2002363157A1 (en) 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US171201A 2001-10-31 2001-10-31
US10/001,712 2001-10-31

Publications (2)

Publication Number Publication Date
WO2003039090A2 WO2003039090A2 (en) 2003-05-08
WO2003039090A3 true WO2003039090A3 (en) 2003-07-10

Family

ID=21697445

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/034961 Ceased WO2003039090A2 (en) 2001-10-31 2002-10-30 Method and apparatus for error correction in a data transmission system

Country Status (3)

Country Link
CN (1) CN100525270C (en)
AU (1) AU2002363157A1 (en)
WO (1) WO2003039090A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102769587A (en) * 2012-07-09 2012-11-07 广东威创视讯科技股份有限公司 Method and devices for enhancing PCI-E (Peripheral Component Interconnect - Express) data transmission stability
CN105897629A (en) * 2016-06-15 2016-08-24 晶晨半导体(上海)有限公司 Signal decision device and signal decision method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760282A (en) * 1972-03-29 1973-09-18 Ibm Data recovery system
EP0296253A1 (en) * 1987-01-12 1988-12-28 Fujitsu Limited Discrimination timing control circuit
EP0594246A1 (en) * 1992-10-22 1994-04-27 Koninklijke Philips Electronics N.V. Data processing circuit
WO1995020843A1 (en) * 1994-01-31 1995-08-03 Motorola Inc. A demodulator for frequency shift keyed signals

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3760282A (en) * 1972-03-29 1973-09-18 Ibm Data recovery system
EP0296253A1 (en) * 1987-01-12 1988-12-28 Fujitsu Limited Discrimination timing control circuit
EP0594246A1 (en) * 1992-10-22 1994-04-27 Koninklijke Philips Electronics N.V. Data processing circuit
WO1995020843A1 (en) * 1994-01-31 1995-08-03 Motorola Inc. A demodulator for frequency shift keyed signals

Also Published As

Publication number Publication date
CN1611045A (en) 2005-04-27
AU2002363157A1 (en) 2003-05-12
WO2003039090A2 (en) 2003-05-08
CN100525270C (en) 2009-08-05

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