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WO2003090018A3 - Network processor architecture - Google Patents

Network processor architecture Download PDF

Info

Publication number
WO2003090018A3
WO2003090018A3 PCT/US2003/011617 US0311617W WO03090018A3 WO 2003090018 A3 WO2003090018 A3 WO 2003090018A3 US 0311617 W US0311617 W US 0311617W WO 03090018 A3 WO03090018 A3 WO 03090018A3
Authority
WO
WIPO (PCT)
Prior art keywords
information element
segment
information
network processor
processor architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/011617
Other languages
French (fr)
Other versions
WO2003090018A2 (en
Inventor
Man Dieu Trinh
Ryszard Bleszynski
Barry T Lee
Steve C Chen
Eric K Yang
Simon S Chong
Tony J Chiang
Jun-Wen Tsong
Giochiro Ono
Charles Gershman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bay Microsystems Inc
Original Assignee
Bay Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/251,946 external-priority patent/US6996117B2/en
Application filed by Bay Microsystems Inc filed Critical Bay Microsystems Inc
Priority to AU2003226395A priority Critical patent/AU2003226395A1/en
Publication of WO2003090018A2 publication Critical patent/WO2003090018A2/en
Publication of WO2003090018A3 publication Critical patent/WO2003090018A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/74—Address processing for routing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

A network processor (201) for processing information (204) is described. Each information element is associated with a flow and comprises at least one information element segment. A policy controller (205) stores an information element into at least one information segment storage unit with a memory (211), and determines whether an information element segment conforms to a predetermined quality of service QOS. A traffic processor (209) selects the information element segment for forwarding based on at least one QOS parameter. A forwarding processor forwards the selected information element segment to an egress port.
PCT/US2003/011617 2002-04-14 2003-04-14 Network processor architecture Ceased WO2003090018A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003226395A AU2003226395A1 (en) 2002-04-14 2003-04-14 Network processor architecture

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
US37265602P 2002-04-14 2002-04-14
US37250702P 2002-04-14 2002-04-14
US60/372,656 2002-04-14
US60/372,507 2002-04-14
US38243702P 2002-05-20 2002-05-20
US38221702P 2002-05-20 2002-05-20
US60/382,217 2002-05-20
US60/382,437 2002-05-20
US10/251,946 US6996117B2 (en) 2001-09-19 2002-09-19 Vertical instruction and data processing in a network processor architecture
US10/251,946 2002-09-19

Publications (2)

Publication Number Publication Date
WO2003090018A2 WO2003090018A2 (en) 2003-10-30
WO2003090018A3 true WO2003090018A3 (en) 2004-01-08

Family

ID=30119434

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/011617 Ceased WO2003090018A2 (en) 2002-04-14 2003-04-14 Network processor architecture

Country Status (2)

Country Link
AU (1) AU2003226395A1 (en)
WO (1) WO2003090018A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100450095C (en) * 2006-02-18 2009-01-07 华为技术有限公司 System and method for providing QoS service for virtual private line service
ES2979074T3 (en) 2014-12-08 2024-09-24 Umbra Tech Ltd System and method for retrieving content from remote network regions
JP2018508067A (en) 2015-01-06 2018-03-22 アンブラ テクノロジーズ リミテッドＵｍｂｒａ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ｌｔｄ． System and method for neutral application programming interface
CN115834534A (en) 2015-01-28 2023-03-21 安博科技有限公司 System for Global Virtual Networks
CN107852604B (en) 2015-04-07 2021-12-03 安博科技有限公司 System for providing Global Virtual Network (GVN)
EP3308504A4 (en) 2015-06-11 2019-01-02 Umbra Technologies Ltd. System and method for network tapestry multiprotocol integration
WO2017098326A1 (en) 2015-12-11 2017-06-15 Umbra Technologies Ltd. System and method for information slingshot over a network tapestry and granularity of a tick
WO2017187263A1 (en) 2016-04-26 2017-11-02 Umbra Technologies Ltd. Sling-routing logic and load balancing
WO2020182949A1 (en) * 2019-03-12 2020-09-17 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Transmitter and receiver, serializer and deserializer and methods for transmitting and receiving, serializing and deserializing

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6259699B1 (en) * 1997-12-30 2001-07-10 Nexabit Networks, Llc System architecture for and method of processing packets and/or cells in a common switch
US6477166B1 (en) * 2000-06-30 2002-11-05 Marconi Communications, Inc. System, method and switch for an MPLS network and an ATM network
US6553000B1 (en) * 1998-01-27 2003-04-22 Alcatel Internetworking (Pe), Inc. Method and apparatus for forwarding network traffic
US6570875B1 (en) * 1998-10-13 2003-05-27 Intel Corporation Automatic filtering and creation of virtual LANs among a plurality of switch ports

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6259699B1 (en) * 1997-12-30 2001-07-10 Nexabit Networks, Llc System architecture for and method of processing packets and/or cells in a common switch
US6553000B1 (en) * 1998-01-27 2003-04-22 Alcatel Internetworking (Pe), Inc. Method and apparatus for forwarding network traffic
US6570875B1 (en) * 1998-10-13 2003-05-27 Intel Corporation Automatic filtering and creation of virtual LANs among a plurality of switch ports
US6477166B1 (en) * 2000-06-30 2002-11-05 Marconi Communications, Inc. System, method and switch for an MPLS network and an ATM network

Also Published As

Publication number Publication date
AU2003226395A1 (en) 2003-11-03
AU2003226395A8 (en) 2003-11-03
WO2003090018A2 (en) 2003-10-30

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