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WO2003075333A1 - Electrode for dry etching a wafer - Google Patents

Electrode for dry etching a wafer Download PDF

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Publication number
WO2003075333A1
WO2003075333A1 PCT/KR2002/000715 KR0200715W WO03075333A1 WO 2003075333 A1 WO2003075333 A1 WO 2003075333A1 KR 0200715 W KR0200715 W KR 0200715W WO 03075333 A1 WO03075333 A1 WO 03075333A1
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WO
WIPO (PCT)
Prior art keywords
electrode
semiconductor wafer
protrusion
edge
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2002/000715
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French (fr)
Inventor
Youngyul Kim
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CI SCIENCE Inc
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CI SCIENCE Inc
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Filing date
Publication date
Application filed by CI SCIENCE Inc filed Critical CI SCIENCE Inc
Priority to JP2003573690A priority Critical patent/JP4152895B2/en
Priority to US10/506,558 priority patent/US20050178505A1/en
Priority to AU2002253689A priority patent/AU2002253689A1/en
Publication of WO2003075333A1 publication Critical patent/WO2003075333A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/32541—Shape

Definitions

  • the present invention relates to a dry etching of a semiconductor wafer, and more particularly to an electrode for dry etching a semiconductor wafer using plasma, thereby removing foreign material deposited on the edge of the semiconductor wafer for manufacturing integrated circuit chips.
  • multiple layers 110 and 120 such as a poly-silicon layer, a nitride layer, a metal layer, etc. are deposited and accumulated on the edge of a semiconductor wafer 100, as shown in Fig. 5. Further, as shown in Fig. 6, particles broken off the deposited layers on the edge of the semiconductor wafer 100 are generated while transferring the semiconductor wafer 100 or by equipment 200, and introduced into the central portion of the semiconductor wafer 100, thereby contaminating the integrated circuit chips.
  • a gate electrode of a semiconductor chip has been recently changed from tungsten suicide to tungsten, and an insulation layer of a capacitor has been changed from an ONO (oxide-nitride-oxide) structure to tantalum oxide.
  • An organic bottom anti-reflective coating (hereinafter, referred to as ARC) layer and an inorganic ARC layer such as SiON have been recently used to form fine photoresist patterns, and Ti and TiN layers have been used as a barrier metal layer. Therefore, these materials contaminate the semiconductor wafer by the aforementioned route during fabrication.
  • these materials act as a particle source during fabrication and contaminate the semiconductor wafer 100.
  • the diameter of the wafer increases from 200mm to 300mm
  • the radius of the edge of the wafer also increases, thereby more increasing the contamination of the semiconductor wafer by the particles.
  • a wet etching process for removing a nitride layer which comprises five steps, is described with reference to Figs. 7a to 7e.
  • An oxide layer 102 is deposited on the nitride layer 101 of the silicon semiconductor wafer 100 by a plasma depositing apparatus (Fig. 7a).
  • a photoresist layer 103 is formed on the oxide layer 102 by coating photosensitizer, and the photoresist layer 103 on the edge of the semiconductor wafer 100 is removed, thereby exposing the oxide layer 102 of the edge of the semiconductor wafer 100 (Fig. 7b).
  • the exposed oxide layer 102 of the edge of the semiconductor wafer 100 is removed by a chemical solution (NHF 4 +HF) using a wet etching device (Fig. 7c). iv.
  • the photoresist layer 103 on the oxide layer 102 is removed using a dry etching device and residual photoresist 103 is washed by a chemical solution
  • this wet etching process of the nitride layer requires different apparatuses for performing the deposition of the oxide layer, the coating of the photoresist, the removal of the photoresist by dry etching, the removal of the oxide layer by wet etching, the full removal of the residual photoresist, the washing, and the wet etching of the nitride layer.
  • a dry etching process for removing the poly-silicon layer which comprises five steps, is described with reference to Figs. 8a to 8e.
  • the oxide layer 102 is deposited on the poly-silicon layer 104 on the silicon semiconductor wafer 100 using a plasma depositing apparatus (Fig. 8a).
  • a photoresist layer 103 is formed on the oxide layer 102 by coating photosensitizer, and the photoresist layer 103 on the edge of the semiconductor wafer 100 is removed, thereby exposing the oxide layer 102 on the edge of the semiconductor wafer 100 (Fig. 8b).
  • the exposed oxide layer 102 on the edge of the semiconductor wafer 100 is removed by a chemical solution (NHF 4 +HF) using a wet etching device (Fig. 8c).
  • a chemical solution (NHF 4 +HF) using a wet etching device (Fig. 8c).
  • the photoresist layer 103 on the oxide layer 102 is removed using a dry etching device and residual photoresist 103 is washed by a chemical solution (H 2 SO 4 /H 2 O 2 ) using a washing apparatus (Fig. 8d).
  • the exposed poly-silicon layer 104 of the edge of the semiconductor wafer 100 is removed using the conventional dry etching device (Fig. 8e).
  • the above-described dry etching process of the poly-silicon layer is complex. Further, this dry etching process of the poly-silicon layer requires different apparatuses for performing the deposition of the oxide layer, the coating of the photoresist, the removal of the photoresist by dry etching, the removal of the oxide layer by wet etching, the washing, and the dry etching of the poly-silicon layer.
  • the poly-silicon layer of the edge of the semiconductor wafer is removed using the conventional dry etching apparatus, the poly-silicon layer on the upper surface of the edge of the semiconductor wafer can be removed but the poly-silicon layer on the lower and the side surfaces of the edge of the semiconductor wafer cannot be fully removed, or can only be imperfectly removed.
  • the conventional dry etching device used for forming fine circuit patterns of the semiconductor chip forms an electric field between a flat-shaped first electrode 300 and a flat-shaped second electrode 300' in a reactive gas atmosphere, and generates plasma into the upper surface of the semiconductor wafer 100, thereby etching a deposited layer on the upper surface 100a of the semiconductor wafer 100 and forming a fine pattern 103 a.
  • the deposited layer on the edge of the semiconductor wafer 100 is removed.
  • Reference number 400 denotes an RF (radio frequency) generator and reference number 500 denotes a matching network.
  • the semiconductor wafer 100 is mounted on one electrode 300' and etched, thereby not etching the side surface 100b and the lower surface 100c of the semiconductor wafer 100. Therefore, the deposited layer on the side surface 100b and the lower surface 100c of the semiconductor wafer cannot be removed.
  • the present invention has been made in view of the above problems, and it is an object of the present invention to provide an electrode for dry etching a semiconductor wafer using plasma, which can effectively remove foreign materials deposited on the lower and the sides surfaces as well as the upper surface of the edge of the semiconductor wafer without causing damage to the wafer.
  • an electrode for dry etching a semiconductor wafer comprises a first electrode and a second electrode for removing foreign materials from the edge of the semiconductor wafer using plasma.
  • the first electrode includes a first flat plate and a ring-shaped first protrusion corresponding to one surface of the edge of a semiconductor wafer
  • the second electrode includes a second flat plate and a ring-shaped second protrusion corresponding to the other surface of the edge of the semiconductor wafer.
  • the first protrusion and the second protrusion are the same size.
  • an insulating material may be deposited on or an insulation layer may be attached to an inner area of the upper surface of the first electrode, which is inside of the first protrusion.
  • Fig. 1 is a partial cross-sectional view of an electrode for dry etching a semiconductor wafer in accordance with the present invention
  • Fig. 2 is a schematic view illustrating the etching of the upper and the side surfaces of a semiconductor wafer using the electrode of the present invention
  • Fig. 3 is a schematic view illustrating the etching of the lower and the side surfaces of the semiconductor wafer using the electrode of the present invention
  • Fig. 4 is a cross-sectional view of a dry etching device provided with the electrode of the present invention
  • Fig. 5 is a side view of semiconductor wafer, on which multiple layers are deposited
  • Fig. 6 is a schematic view illustrating the deposition of foreign materials on the semiconductor wafer by equipment.
  • Figs. 7a to 7e are cross-sectional views illustrating a process for removing a nitride layer using a conventional wet etching
  • Figs. 8a to 8e are cross-sectional views illustrating a process for removing a poly-silicon layer using a conventional dry etching
  • Fig. 9 is a schematic view illustrating the etching of a semiconductor wafer using a conventional electrode.
  • Fig. 1 is a partial cross-sectional view of an electrode for dry etching a semiconductor wafer in accordance with the present invention.
  • the electrode of the present invention comprises a pair of electrodes, i.e., a first electrode 10 and a second electrode 20.
  • the first electrode 10 and the second electrode 20 are means for generating plasma for removing foreign materials deposited and accumulated on the edge of the semiconductor wafer.
  • the first electrode 10 is used as an anode and the second electrode 20 is used as a cathode.
  • the first electrode 10 may be used as a cathode and the second electrode 20 may be used as an anode.
  • the first electrode 10 is shaped as a flat circle.
  • a ring-shaped first protrusion 10a is formed on the bottom surface of the first electrode 10.
  • a gas inlet hole 10b is formed between the first protrusion 10a and the circumference of the first electrode 10. The gas inlet hole 10b serves to introduce a reactive gas for generating plasma into a vacuum chamber (not shown), in which the first electrode 10 and the second electrode 20 are formed.
  • the second electrode 20 is also shaped as a flat circle having the same diameter of that of the first electrode 10.
  • An opening 20a is formed on the center of the second electrode 20 and a ring-shaped second protrusion 20b having the same dimension as that of the first protrusion 10a is formed between the opening
  • a flat portion of the outside of the first protrusion 10a of the first electrode 10 and a flat portion of the outside of the second protrusion 20b of the second electrode 20 are referred to as a first flat portion 10c and a second flat portion 20c.
  • An insulator 11 or an insulation layer is deposited on or attached to an inner area of the bottom surface of the first protrusion 10a.
  • the deposited insulation layer 11 serves to prevent an electric field or an electromagnetic field from being formed between the first electrode 10 and the second electrode 20, when a RF power is supplied between the first electrode 10 and the second electrode 20.
  • Polymide, Teflon, silicon, quartz, or ceramic may be used as the insulator 11.
  • Figs. 2 and 3 illustrate the etching of a semiconductor wafer using the electrode of the present invention.
  • Figs. 2 and 3 illustrate the etching of a semiconductor wafer using the electrode of the present invention.
  • an interaction between the first and the second electrodes 10, 20 of the present invention and the semiconductor wafer 30 is described.
  • the semiconductor wafer 30 is interposed between the first electrode 10 as the anode and the second electrode 20 as the cathode by an electrostatic chuck 40.
  • the electrostatic chuck 40 is installed at a lowering position via the opening 20a of the second electrode 20, thereby bringing the lower surface 30c of the edge of the semiconductor wafer 30 into contact with the upper surface of the second protrusion 20b of the second electrode 20.
  • a reactive gas is introduced via the gas inlet hole 10b of the first electrode 10 and power is supplied from the RF generator 50 to the second electrode 20, thereby forming an electric field or an electromagnetic field through the first protrusion 10a and the first flat portion 10c of the first electrode 10 and the second protrusion 20b and the second flat portion 20c of the second electrode 20.
  • two types of plasma with different intensity are generated by the reactive gas between the first protrusion 10a and the second protrusion 20b and between the first flat portion 10c and the second flat portion 20c.
  • plasma is formed along width of the first protrusion 10a and the second protrusion 20b.
  • the width of the first protrusion 10a and the second protrusion 20b corresponds to the width B of the edge of the semiconductor wafer 30 to be etched. Therefore, an area A of the semiconductor wafer 30, in which fine circuit pattern 31 is formed, is not affected by this plasma.
  • the side surface 30b of the semiconductor wafer 30 is etched by plasma C formed between the first flat portion 10c and the second flat portion 20c.
  • the etching is mainly performed on the upper surface 30a and the side surface 30b of the semiconductor wafer 30 by RIE (Reactive Ion Etching).
  • the insulation layer 11 deposited on the inner area of the first electrode 10 an electric field or an electromagnetic field is not formed in the area A, thereby preventing plasma from being generated on the area A and improving the efficiency of the etching.
  • reference number 60 denotes a matching network. As shown in Fig. 3, the electrostatic chuck 40 is elevated via the opening
  • the reactive gas is introduced via the gas inlet hole 10b of the first electrode 10 and the power is supplied from the RF generator 50, thereby generating plasma between the first protrusion 10a and the second protrusion 20b.
  • the etching is mainly performed on the lower surface 30c and the side surface 30b of the semiconductor wafer 30 by plasma, thereby removing the foreign materials deposited on the area B.
  • Fig. 4 is a cross-sectional view of a vacuum chamber 70, in which the electrode of the present invention is installed.
  • the vacuum chamber 70 comprises a blow pipe 71 for introducing a reactive gas for generating plasma into the first electrode 10 and the second electrode 20, a port 70a for entering the semiconductor wafer 30, an outlet 70b for exhausting the gas after the etching of the semiconductor wafer 30, and the electrostatic chuck 40 for moving the semiconductor wafer 30 upward and downward.
  • the semiconductor wafer 30 is entered into the vacuum chamber 70 via the port 70a and mounted on the electrostatic chuck 40. Under a reactive gas atmosphere, the RF generator 50 supplies a voltage via the second electrode 20. At this time, the upper surface of the central portion of the semiconductor wafer 30 is protected by the insulation layer 11 of the first electrode 10, and plasma is generated between the first protrusion 10a and the second protrusion 20b and between the first flat portion 10c and the second flat portion 20c. Then, the upper, the lower, and the side surfaces 30a, 30c, and 30b of the edge of the semiconductor wafer 30 are etched through the aforementioned process. During the etching process, the same as the conventional case, the foreign materials removed from the semiconductor wafer 30 and the reactive gas are pumped out via the outlet 70b.
  • Table 1 illustrates the reactive gases used in the dry etching of the edge of the semiconductor wafer using the electrode of the present invention and the foreign materials removed using the corresponding reactive gas.
  • the conventional etching device has been used to remove only one type of materials, i.e., a wet etching device for removing the nitride layer or a dry etching device for forming a fine circuit pattern on a semiconductor wafer. Therefore, the process for etching the semiconductor wafer is very complex and each step of the process requires a corresponding etching device.
  • the electrode of the present invention is used to remove all foreign materials shown in Table 1 by sequentially supplying appropriate reactive gases corresponding to each material without additional equipment, thereby simplifying the whole process.
  • portions other than the upper, the side and the lower surfaces of the edge of the semiconductor wafer are not affected by plasma, thereby effectively etching the edge of the semiconductor wafer and not damaging the fine circuit pattern formed on the center of the semiconductor wafer.
  • the present invention provides a an electrode for dry etching a semiconductor wafer, which removes foreign materials deposited on the upper, the side and the lower surfaces of the edge of the semiconductor wafer, without additional equipment or step, thereby simplifying the whole process, reducing the process cost, and improving the yield, the quality of the semiconductor wafer, and its productivity.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

Disclosed is an electrode for dry etching a wafer. The electrode includes a first electrode and a second electrode. The first electrode includes a first flat plate and a ring-shaped first protrusion corresponding to one surface of the edge of a wafer, and the second electrode includes a second flat plate and a ring-shaped second protrusion corresponding to the other surface of the edge of the wafer. The first plate and the second flat plate are the same dimension, and the first protrusion and the second protrusion are the same dimension.

Description

ELECTRODE FOR DRY ETCHING A WAFER
Technical Field
The present invention relates to a dry etching of a semiconductor wafer, and more particularly to an electrode for dry etching a semiconductor wafer using plasma, thereby removing foreign material deposited on the edge of the semiconductor wafer for manufacturing integrated circuit chips.
Background Art
As well known to those skilled in the art, during the fabrication of high integrated semiconductor chips, multiple layers 110 and 120 such as a poly-silicon layer, a nitride layer, a metal layer, etc. are deposited and accumulated on the edge of a semiconductor wafer 100, as shown in Fig. 5. Further, as shown in Fig. 6, particles broken off the deposited layers on the edge of the semiconductor wafer 100 are generated while transferring the semiconductor wafer 100 or by equipment 200, and introduced into the central portion of the semiconductor wafer 100, thereby contaminating the integrated circuit chips.
Moreover, a gate electrode of a semiconductor chip has been recently changed from tungsten suicide to tungsten, and an insulation layer of a capacitor has been changed from an ONO (oxide-nitride-oxide) structure to tantalum oxide. An organic bottom anti-reflective coating (hereinafter, referred to as ARC) layer and an inorganic ARC layer such as SiON have been recently used to form fine photoresist patterns, and Ti and TiN layers have been used as a barrier metal layer. Therefore, these materials contaminate the semiconductor wafer by the aforementioned route during fabrication.
That is, these materials act as a particle source during fabrication and contaminate the semiconductor wafer 100. Particularly, in case that the diameter of the wafer increases from 200mm to 300mm, the radius of the edge of the wafer also increases, thereby more increasing the contamination of the semiconductor wafer by the particles.
Since the materials deposited and accumulated on the edge of the semiconductor wafer 100 reduce the yield and the reliability of the semiconductor chip, these materials need to be fully removed. Accordingly, in order to remove the materials deposited and accumulated on the edge of the semiconductor wafer, several methods have been used as follows.
For example, hereinafter, a wet etching process for removing a nitride layer, which comprises five steps, is described with reference to Figs. 7a to 7e. i. An oxide layer 102 is deposited on the nitride layer 101 of the silicon semiconductor wafer 100 by a plasma depositing apparatus (Fig. 7a). ii. A photoresist layer 103 is formed on the oxide layer 102 by coating photosensitizer, and the photoresist layer 103 on the edge of the semiconductor wafer 100 is removed, thereby exposing the oxide layer 102 of the edge of the semiconductor wafer 100 (Fig. 7b). iii. The exposed oxide layer 102 of the edge of the semiconductor wafer 100 is removed by a chemical solution (NHF4+HF) using a wet etching device (Fig. 7c). iv. The photoresist layer 103 on the oxide layer 102 is removed using a dry etching device and residual photoresist 103 is washed by a chemical solution
(H SO4/H2O ) using a washing apparatus (Fig. 7d). v. The exposed nitride layer 101 of the edge of the semiconductor wafer 100 is removed by a phosphoric acid (H3PO ) solution of high temperature using a wet etching device (Fig. 7e). The above-described wet etching process of the nitride layer is complex.
Further, this wet etching process of the nitride layer requires different apparatuses for performing the deposition of the oxide layer, the coating of the photoresist, the removal of the photoresist by dry etching, the removal of the oxide layer by wet etching, the full removal of the residual photoresist, the washing, and the wet etching of the nitride layer.
On the other hand, a dry etching process for removing the poly-silicon layer, which comprises five steps, is described with reference to Figs. 8a to 8e. i. The oxide layer 102 is deposited on the poly-silicon layer 104 on the silicon semiconductor wafer 100 using a plasma depositing apparatus (Fig. 8a). ii. A photoresist layer 103 is formed on the oxide layer 102 by coating photosensitizer, and the photoresist layer 103 on the edge of the semiconductor wafer 100 is removed, thereby exposing the oxide layer 102 on the edge of the semiconductor wafer 100 (Fig. 8b). iii. The exposed oxide layer 102 on the edge of the semiconductor wafer 100 is removed by a chemical solution (NHF4+HF) using a wet etching device (Fig. 8c). iv. The photoresist layer 103 on the oxide layer 102 is removed using a dry etching device and residual photoresist 103 is washed by a chemical solution (H2SO4/H2O2) using a washing apparatus (Fig. 8d). v. The exposed poly-silicon layer 104 of the edge of the semiconductor wafer 100 is removed using the conventional dry etching device (Fig. 8e).
Identically with the aforementioned wet etching of the nitride layer, the above-described dry etching process of the poly-silicon layer is complex. Further, this dry etching process of the poly-silicon layer requires different apparatuses for performing the deposition of the oxide layer, the coating of the photoresist, the removal of the photoresist by dry etching, the removal of the oxide layer by wet etching, the washing, and the dry etching of the poly-silicon layer.
When the poly-silicon layer of the edge of the semiconductor wafer is removed using the conventional dry etching apparatus, the poly-silicon layer on the upper surface of the edge of the semiconductor wafer can be removed but the poly-silicon layer on the lower and the side surfaces of the edge of the semiconductor wafer cannot be fully removed, or can only be imperfectly removed.
Further, since different conventional etching apparatuses are respectively used in each step for forming patterns on the semiconductor wafer, that is, since one etching apparatus is used only to remove one foreign material, it is impossible to use one. etching apparatus to remove various materials. As shown in Fig. 9, the conventional dry etching device used for forming fine circuit patterns of the semiconductor chip forms an electric field between a flat-shaped first electrode 300 and a flat-shaped second electrode 300' in a reactive gas atmosphere, and generates plasma into the upper surface of the semiconductor wafer 100, thereby etching a deposited layer on the upper surface 100a of the semiconductor wafer 100 and forming a fine pattern 103 a. Herein, the deposited layer on the edge of the semiconductor wafer 100 is removed. Reference number 400 denotes an RF (radio frequency) generator and reference number 500 denotes a matching network. In the conventional dry etching device, the semiconductor wafer 100 is mounted on one electrode 300' and etched, thereby not etching the side surface 100b and the lower surface 100c of the semiconductor wafer 100. Therefore, the deposited layer on the side surface 100b and the lower surface 100c of the semiconductor wafer cannot be removed.
Disclosure of the Invention
Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide an electrode for dry etching a semiconductor wafer using plasma, which can effectively remove foreign materials deposited on the lower and the sides surfaces as well as the upper surface of the edge of the semiconductor wafer without causing damage to the wafer.
In accordance with the present invention, the above and other objects can be accomplished by the provision of an electrode for dry etching a semiconductor wafer. The electrode comprises a first electrode and a second electrode for removing foreign materials from the edge of the semiconductor wafer using plasma. The first electrode includes a first flat plate and a ring-shaped first protrusion corresponding to one surface of the edge of a semiconductor wafer, and the second electrode includes a second flat plate and a ring-shaped second protrusion corresponding to the other surface of the edge of the semiconductor wafer. Herein, the first protrusion and the second protrusion are the same size.
Preferably, an insulating material may be deposited on or an insulation layer may be attached to an inner area of the upper surface of the first electrode, which is inside of the first protrusion.
Brief Description of the Drawings
The above and other objects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
Fig. 1 is a partial cross-sectional view of an electrode for dry etching a semiconductor wafer in accordance with the present invention;
Fig. 2 is a schematic view illustrating the etching of the upper and the side surfaces of a semiconductor wafer using the electrode of the present invention;
Fig. 3 is a schematic view illustrating the etching of the lower and the side surfaces of the semiconductor wafer using the electrode of the present invention; Fig. 4 is a cross-sectional view of a dry etching device provided with the electrode of the present invention;
Fig. 5 is a side view of semiconductor wafer, on which multiple layers are deposited;
Fig. 6 is a schematic view illustrating the deposition of foreign materials on the semiconductor wafer by equipment.
Figs. 7a to 7e are cross-sectional views illustrating a process for removing a nitride layer using a conventional wet etching;
Figs. 8a to 8e are cross-sectional views illustrating a process for removing a poly-silicon layer using a conventional dry etching; and Fig. 9 is a schematic view illustrating the etching of a semiconductor wafer using a conventional electrode.
Best Mode for Carrying Out the Invention Fig. 1 is a partial cross-sectional view of an electrode for dry etching a semiconductor wafer in accordance with the present invention. The electrode of the present invention comprises a pair of electrodes, i.e., a first electrode 10 and a second electrode 20. The first electrode 10 and the second electrode 20 are means for generating plasma for removing foreign materials deposited and accumulated on the edge of the semiconductor wafer.
Herein, the first electrode 10 is used as an anode and the second electrode 20 is used as a cathode. However, the first electrode 10 may be used as a cathode and the second electrode 20 may be used as an anode. The same as the conventional electrode, the first electrode 10 is shaped as a flat circle. A ring-shaped first protrusion 10a is formed on the bottom surface of the first electrode 10. A gas inlet hole 10b is formed between the first protrusion 10a and the circumference of the first electrode 10. The gas inlet hole 10b serves to introduce a reactive gas for generating plasma into a vacuum chamber (not shown), in which the first electrode 10 and the second electrode 20 are formed.
The second electrode 20 is also shaped as a flat circle having the same diameter of that of the first electrode 10. An opening 20a is formed on the center of the second electrode 20 and a ring-shaped second protrusion 20b having the same dimension as that of the first protrusion 10a is formed between the opening
20a and the circumference of the second electrode 20.
A flat portion of the outside of the first protrusion 10a of the first electrode 10 and a flat portion of the outside of the second protrusion 20b of the second electrode 20 are referred to as a first flat portion 10c and a second flat portion 20c.
An insulator 11 or an insulation layer is deposited on or attached to an inner area of the bottom surface of the first protrusion 10a. The deposited insulation layer 11 serves to prevent an electric field or an electromagnetic field from being formed between the first electrode 10 and the second electrode 20, when a RF power is supplied between the first electrode 10 and the second electrode 20. Polymide, Teflon, silicon, quartz, or ceramic may be used as the insulator 11.
Figs. 2 and 3 illustrate the etching of a semiconductor wafer using the electrode of the present invention. Hereinafter, with reference to Figs. 2 and 3, an interaction between the first and the second electrodes 10, 20 of the present invention and the semiconductor wafer 30 is described.
As shown in Fig. 2, the semiconductor wafer 30 is interposed between the first electrode 10 as the anode and the second electrode 20 as the cathode by an electrostatic chuck 40. The electrostatic chuck 40 is installed at a lowering position via the opening 20a of the second electrode 20, thereby bringing the lower surface 30c of the edge of the semiconductor wafer 30 into contact with the upper surface of the second protrusion 20b of the second electrode 20.
A reactive gas is introduced via the gas inlet hole 10b of the first electrode 10 and power is supplied from the RF generator 50 to the second electrode 20, thereby forming an electric field or an electromagnetic field through the first protrusion 10a and the first flat portion 10c of the first electrode 10 and the second protrusion 20b and the second flat portion 20c of the second electrode 20. Then, two types of plasma with different intensity are generated by the reactive gas between the first protrusion 10a and the second protrusion 20b and between the first flat portion 10c and the second flat portion 20c. Herein, plasma is formed along width of the first protrusion 10a and the second protrusion 20b. The width of the first protrusion 10a and the second protrusion 20b corresponds to the width B of the edge of the semiconductor wafer 30 to be etched. Therefore, an area A of the semiconductor wafer 30, in which fine circuit pattern 31 is formed, is not affected by this plasma. The side surface 30b of the semiconductor wafer 30 is etched by plasma C formed between the first flat portion 10c and the second flat portion 20c.
Since the lower surface 30c of the semiconductor wafer 30 is in contact with the upper surface of the second protrusion 20b of the second electrode 20, the etching is mainly performed on the upper surface 30a and the side surface 30b of the semiconductor wafer 30 by RIE (Reactive Ion Etching).
Further, since the insulation layer 11 deposited on the inner area of the first electrode 10, an electric field or an electromagnetic field is not formed in the area A, thereby preventing plasma from being generated on the area A and improving the efficiency of the etching.
Herein, reference number 60 denotes a matching network. As shown in Fig. 3, the electrostatic chuck 40 is elevated via the opening
20a of the second electrode 20, thereby bringing the upper surface 30a of the edge of the semiconductor wafer 30 into contact with the upper surface of the first protrusion 10a of the first electrode 10. Then, the reactive gas is introduced via the gas inlet hole 10b of the first electrode 10 and the power is supplied from the RF generator 50, thereby generating plasma between the first protrusion 10a and the second protrusion 20b. Herein, the etching is mainly performed on the lower surface 30c and the side surface 30b of the semiconductor wafer 30 by plasma, thereby removing the foreign materials deposited on the area B.
Fig. 4 is a cross-sectional view of a vacuum chamber 70, in which the electrode of the present invention is installed. The vacuum chamber 70 comprises a blow pipe 71 for introducing a reactive gas for generating plasma into the first electrode 10 and the second electrode 20, a port 70a for entering the semiconductor wafer 30, an outlet 70b for exhausting the gas after the etching of the semiconductor wafer 30, and the electrostatic chuck 40 for moving the semiconductor wafer 30 upward and downward.
The semiconductor wafer 30 is entered into the vacuum chamber 70 via the port 70a and mounted on the electrostatic chuck 40. Under a reactive gas atmosphere, the RF generator 50 supplies a voltage via the second electrode 20. At this time, the upper surface of the central portion of the semiconductor wafer 30 is protected by the insulation layer 11 of the first electrode 10, and plasma is generated between the first protrusion 10a and the second protrusion 20b and between the first flat portion 10c and the second flat portion 20c. Then, the upper, the lower, and the side surfaces 30a, 30c, and 30b of the edge of the semiconductor wafer 30 are etched through the aforementioned process. During the etching process, the same as the conventional case, the foreign materials removed from the semiconductor wafer 30 and the reactive gas are pumped out via the outlet 70b.
Hereinafter, Table 1 illustrates the reactive gases used in the dry etching of the edge of the semiconductor wafer using the electrode of the present invention and the foreign materials removed using the corresponding reactive gas.
Table 1
Figure imgf000011_0001
As described above, the conventional etching device has been used to remove only one type of materials, i.e., a wet etching device for removing the nitride layer or a dry etching device for forming a fine circuit pattern on a semiconductor wafer. Therefore, the process for etching the semiconductor wafer is very complex and each step of the process requires a corresponding etching device.
Further, with the structure of the electrode of the conventional etching device, foreign materials deposited on the upper surface and the side surface of the edge of the semiconductor wafer can be removed. However, foreign materials deposited on the lower surface of the edge of the semiconductor wafer cannot be removed.
However, the electrode of the present invention is used to remove all foreign materials shown in Table 1 by sequentially supplying appropriate reactive gases corresponding to each material without additional equipment, thereby simplifying the whole process.
Moreover, portions other than the upper, the side and the lower surfaces of the edge of the semiconductor wafer are not affected by plasma, thereby effectively etching the edge of the semiconductor wafer and not damaging the fine circuit pattern formed on the center of the semiconductor wafer.
Although the preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
Industrial Applicability
As apparent from the above description, the present invention provides a an electrode for dry etching a semiconductor wafer, which removes foreign materials deposited on the upper, the side and the lower surfaces of the edge of the semiconductor wafer, without additional equipment or step, thereby simplifying the whole process, reducing the process cost, and improving the yield, the quality of the semiconductor wafer, and its productivity.

Claims

Claims:
1. An electrode for dry etching a wafer, said electrode comprising a first electrode and a second electrode for removing foreign materials from the edge of the wafer by plasma, said first electrode including a first flat plate and a ring-shaped first protrusion corresponding to one surface of the edge of a wafer, and said second electrode including a second flat plate and a ring-shaped second protrusion corresponding to the other surface of the edge of the wafer, wherein said first protrusion and said second protrusion are the same size.
2. The electrode for dry etching a wafer as set forth in claim 1, wherein an insulating material is deposited on or an insulation layer is attached to an inner area of the upper surface of the first electrode, which is inside of the first protrusion.
PCT/KR2002/000715 2002-03-04 2002-04-19 Electrode for dry etching a wafer Ceased WO2003075333A1 (en)

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JP2003573690A JP4152895B2 (en) 2002-03-04 2002-04-19 Semiconductor wafer dry etching electrode
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AU2002253689A AU2002253689A1 (en) 2002-03-04 2002-04-19 Electrode for dry etching a wafer

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