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WO2003075368A2 - Chauffage par induction de films minces - Google Patents

Chauffage par induction de films minces Download PDF

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Publication number
WO2003075368A2
WO2003075368A2 PCT/US2003/006048 US0306048W WO03075368A2 WO 2003075368 A2 WO2003075368 A2 WO 2003075368A2 US 0306048 W US0306048 W US 0306048W WO 03075368 A2 WO03075368 A2 WO 03075368A2
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WO
WIPO (PCT)
Prior art keywords
thin film
substrate
current
coil
depositing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/006048
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English (en)
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WO2003075368A3 (fr
Inventor
Paul L. Bergstrom
Melissa L. Trombley
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Michigan Technological University
University of Michigan Ann Arbor
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Michigan Technological University
University of Michigan Ann Arbor
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Priority to AU2003222237A priority Critical patent/AU2003222237A1/en
Publication of WO2003075368A2 publication Critical patent/WO2003075368A2/fr
Publication of WO2003075368A3 publication Critical patent/WO2003075368A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H10P95/90—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B6/00—Heating by electric, magnetic or electromagnetic fields
    • H05B6/02—Induction heating
    • H05B6/10—Induction heating apparatus, other than furnaces, for specific applications
    • H05B6/105—Induction heating apparatus, other than furnaces, for specific applications using a susceptor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H10P72/0432—

Definitions

  • the invention relates to induction heating.
  • Modern microelectronic circuit process technologies incorporate device structures having high sensitivities to thermal treatment.
  • the high sensitivities are due to the precise definition of device regions. These regions may include ultra-thin ion implanted source and drain regions in a submicron complementary metal-oxide- semiconductor field-effect transistor circuit (CMOS FET), among others.
  • CMOS FET complementary metal-oxide- semiconductor field-effect transistor circuit
  • material and process related temperature limitations prohibit the integration or incorporation of a wide range of possible device structures in the fabrication process.
  • Applications such as high temperature treatment of embedded high voltage, high current, or high power microelectronic devices often require complete thermal isolation of process modules.
  • An example of such a system is an embedded processor that is responsible for driving motors.
  • the system might include drivers for driving the motors, and a plurality of high density logic circuits for controlling the operation of the motor. Both the drivers and the logic circuits typically have different thermal capacities and, therefore, complicated processes are required to embed the drivers and the logic circuits in a single system
  • Device examples include micro- electromechanical systems (MEMS), micromachines and microsystem.
  • MEMS micro- electromechanical systems
  • Various thin film structures for the devices may also require thermal treatment to stabilize the mechanical properties for use.
  • microelectronic process typically requires lower temperature throughout its processing.
  • the relatively high thermal energy generated in the thermal treatment of the MEMS tends to impact the CMOS processing of the system.
  • embedding elements like radio-frequency components into high density CMOS, require different thermal treatments and, thus, require complicated processes to embed them together.
  • the invention provides an area-selective induction heating process.
  • the process includes providing a substrate which has an area or a region to be heated, patterning the area of the substrate to be heated with a thin film, applying the thin film to the selected area or the selected region, and inductively heating the selected area through the thin film.
  • the invention provides an apparatus to regionally heat a substrate via a thin film.
  • the apparatus can include a thin film depositor configured to deposit the thin film to the substrate.
  • the apparatus can also include a substrate chamber in which the substrate with the thin film is positioned, and an impedance coupler.
  • the impedance coupler is positioned near or within the chamber. When energized, the coupler generates a flux, which induces a current in the thin film thereby heating the device or the structure and the substrate.
  • the invention provides a method to enhance a thermal growth rate or dopant diffusion rate for localized regions of a substrate. For example, a thermal-driven growth rate of an oxide or nitride from a substrate (e.g.
  • the invention provides a method to incorporate dopant into localized films.
  • the process can include applying a thin film to a system having substrate, inductively heating the system, and exposing the system to a dopant through a predeposition process or through ion implantation. The exposure of the substrate to dopant enhances the diffusion and activation of dopants in regions where localized inductive heating has elevated the local temperatures in a device or a structure in the system that is covered with the thin films.
  • the invention provides a method of locally annealing a plurality of thin films while the thin films are growing or depositing, or after the thin films have grown or have been deposited.
  • thin films that are in the process of being deposited or grown by physical vapor deposition ("PVD") techniques such as electron beam evaporation, or processed by screen-printing can be locally annealed.
  • PVD physical vapor deposition
  • Thermal treatment during the deposition or growth modulates many material properties. In some embodiments, these properties include mechanical stress, stress gradients, optical transmission, electrical conduction, and the like.
  • FIG.l is a sectional view of a system.
  • FIG. 2 is a sectional view of the system shown in FIG. 1 with an electrically conductive film.
  • FIG. 3 is a sectional view of the system shown in FIG. 2 placed near an inductive coil.
  • FIG. 4 is a table listing the inductive heating properties of selected microsystem materials and some common ferromagnetics.
  • FIG. 5 is an isometric view of a second system containing a heating element.
  • the invention relates to methods of and apparatus for performing regional heating of a substrate by induction heating.
  • Induction heating can be utilized in industrial processes to modify the mechanical properties of materials.
  • induction heating allows for localized temperature control of a specific region of a material, device, or substrate.
  • induction heating potentially conserve energy but it also allows protection of temperature-sensitive components.
  • induction heating has several potential applications in microelectronic and microsystem fabrication.
  • inductive coupling to conductive films allows for the localized heating of selected areas. This potentially prevents significant heat energy from reaching the substrate and, thus, allows for substantially increased flexibility in microelectronic and microsystem design.
  • the invention pertains to fabricating thin film structures and devices on a substrate, and to enclosing a product, such as an integrated microsystem, in a package.
  • Package examples include monolithic packaging wafer scale packaging.
  • the product is fabricated on a flat silicon substrate.
  • substrate materials can also be used.
  • a substrate can be a semiconductor such as germanium or gallium arsenide, semimetals such as bismuth and molybdenum, metals and metal alloys such as copper and stainless steel, insulators such as silicon dioxide and aluminum oxide, organic polymers such as Teflon, and inorganic polymers such as silioxane.
  • the invention also concerns any and all substrate profiles including, but not limited to, flat, curved, cylindrical, and spherical.
  • FIG. 1 shows a sectional view of a system 100, such as a wafer, including a substrate 102, a plurality of devices 105 and 110, and a plurality of structures 115 and 120.
  • a diffusion barrier 122 is deposited onto devices 105 and 110 as a passivation layer for the substrate 102.
  • the first device 105 depicts an electronic device that does not require induction heating, the second device
  • the first mechanical structure 115 depicts a mechanical structure that requires heat treatment
  • the second structure 120 depicts a mechanical device intended for packaging or wafer bonding.
  • FIG. 2 shows a sectional view of the system 100 shown in FIG. 1 with an electrically conductive film 150.
  • the film 150 covers only the areas of the system 100 to be heated.
  • the film 150 is patterned through photolithography. However, patterning may also be achieved by other methods depending on the film application and the deposition technique chosen.
  • a suitable barrier film material 124 including, but not limited to, silicon dioxide or silicon nitride isolates the film 150 from the structural and device layers 115, and 120.
  • the system 100 can have more than one layer of conductive film. That is, the thickness of the film 150 can vary. Additionally, multiple, different film materials can be deposited on or applied to the system 100. Varying the thickness or differing the material of the film 150 allows for different temperature increments when energy is induced in the film 150.
  • the deposition technique is sputtering.
  • other techniques suitable for depositing the film 150 on or applying the film 150 to the system 100 are available.
  • Other film application or depositing techniques include, but not limited to, thermal evaporation, liquid phase chemical technique, gas phase chemical process, glow discharge process, electronic beam (“EB”) evaporation method, ion beam assisted deposition, chemical vapor deposition ("CVD”), plasma enhanced chemical vapor deposition (“PECVD”), pulsed laser ablation (“PLD”), chemical solution deposition, cathodic arc deposition, and a combination of different techniques or processes.
  • electroplating is used even though it may result in relatively thick film application or deposition.
  • the thickness ranges from a half micron up to ten microns thick. However, depending on the application, localized inductive heating still works with other thicknesses such as 50, 100, 200, 500, or higher number of microns.
  • the system 100 is placed near an inductive coil 170, whose structure, orientation, and distance from the wafer 100 are arranged so as to achieve a desired magnetic coupling effect (represented by 160).
  • the system 100 and the coil 170 are then positioned in a substrate chamber 174 to control the induction environment.
  • the magnitude, polarity, and overall behavior of the electric field induced in the material or materials through which the magnetic field passes define the magnetic coupling effect.
  • the system 100 is positioned such that the coil 170 extends above and below by approximately equal amounts so as to be exposed to a magnetic field which is fairly uniform and unidirectional.
  • the substrate 100 is positioned adjacent the coil 170 such that the nearest loops of the coil 170 are located at a distance of 0.25cm from the top and bottom surfaces of the substrate 100.
  • a power source applies a time-varying electric field at a frequency and power setting to the inductive coil 170. This results in a current being generated within the film 150.
  • the magnitude of the current is a product of the electric field strength and the material conductivity, ⁇ .
  • a magnetic field of the same frequency is obtained according to Ampere's law, which is given by
  • VxH J + ⁇ (1)
  • Equation (2) indicates that the direction of the alternating currents oppose that of the conduction current in the coil 170, J. Heating is also obtained as a result of hysteresis, which occurs as a result of a nonzero time required for the material to magnetize along a given direction. Hysteresis losses are typically less prevalent than eddy current losses and increase with frequency.
  • the magnetic permeability of a material is largely a function of its unpaired electrons. When electrons accumulate in the valence band of an atom or molecule, it is energetically favorable for them to assume states with the same spin direction until all such states are filled, at which point they begin to fill states of the opposite spin direction, forming spin-up and spin-down pairs. If one or more unpaired electrons remain, the material has an overall spin magnetic moment that is polarizable along any direction by applying a magnetic field. The magnitude of this moment determines the permeability of a material and its relative usefulness in inductive heating applications.
  • Substances classified as diamagnetic have no unpaired electrons and thus are only weakly polarizable, less so than free space.
  • Paramagnetic materials have at least one unpaired electron per atom or molecule and thus a magnetic field results in a moderate degree of alignment.
  • the most versatile materials are the ferromagnetics, which can be polarized to varying degrees by adjusting the strength of the applied field and can often be made to polarize very strongly.
  • Ferromagnetic materials typically hold their alignment for a long but finite amount of time after the field has been removed, and typically consist of the elements iron, nickel, and cobalt.
  • Substances from any of these three classifications can be inductively heated, and combinations of materials from one or more groups can be used to achieve different degrees of heat generation.
  • a single film of ferromagnetic material including, but not limited to, a permalloy or other iron- containing ferromagnetic alloy is heated.
  • the electrical conductivity and magnetic permeability of a secondary material are also important in that they determine the frequency at which it can best be inductively heated as dictated by the electromagnetic skin effect.
  • the eddy current density decreases from that induced at the outer edge of the material according to
  • J r is the current density at a distance r from the surface
  • Jo is the current density at the surface
  • ⁇ x ' s the skin depth.
  • the skin depth, ⁇ , for a good electrical conductor is given approximately by
  • ⁇ is the electrical conductivity
  • ⁇ is the magnetic permeability
  • ⁇ is the chosen frequency for modulating the skin depth with respect to the dimensions along which the eddy currents propagate in order to achieve efficient inductive heating.
  • Equations (4) and (5) show that inductive heating increases with frequency according to one of two schemes.
  • the first scheme occurs at low frequencies where the power varies with/ 7 .
  • the second scheme occurs at higher frequencies where it levels off to follow/' 2 .
  • the process is optimized when the frequency is chosen such that the al ⁇ ratio is approximately four, with further increases in frequency producing relatively little benefit.
  • the process can therefore be configured such that the targeted material or materials are in an optimal state while the non-targeted material or materials are not.
  • FIG. 4 gives a comparison of the inductive heating properties of some common ferromagnetics as well as several important materials in the fields of microelectronics and microsystems in a table 400 using Equations (4) and (5).
  • the normalized power dissipation values show that the ferromagnetics are capable of converting magnetic energy to thermal energy far more efficiently than any of the microsystem materials.
  • the dimensions of the microsystem metals will be considerably smaller than the values used in this comparison, further decreasing their ability to absorb magnetic energy, and the ferromagnetics will exhibit additional heating due to hysteresis.
  • induction heating involves the heat transfer modes of conduction, convection, and radiation to varying degrees.
  • conduction heat energy moves within the device 110 and the structures 115 and 120 from a region of high temperature to a region of low temperature.
  • the rate at which the energy moves depends on a temperature gradient and is given by Fourier's law, written as
  • q COn v is the convective heat flux
  • a is the surface heat transfer coefficient
  • Ts is the surface temperature
  • T A is the ambient temperature.
  • the rate of convective heat loss can be reduced by increasing the ambient temperature or by using an ambient gas that reduces the surface heat transfer coefficient.
  • the heating of the film occurs under vacuum so as to reduce the number of ambient molecules present to absorb heat energy.
  • q ra d is the radiative heat flux
  • k ⁇ is the Stefan-Boltzmann constant
  • e s is the surface emissivity
  • Ts is the surface temperature
  • T A is the ambient temperature
  • the surface of the substrate 100 is polished prior to heating. This reduces the emissivity and, thus, reduces the energy loss by radiation.
  • the heat transfer process in a device can be modeled according to the Fourier equation
  • the solutions to the temperature distribution and the heat generation can be obtained by applying initial and boundary conditions.
  • a common initial condition assumes that the initial temperature distribution is a constant equal to the ambient temperature.
  • a boundary condition can be obtained using the conservation of energy principle at the surface of the device.
  • ⁇ is the thermal conductivity of the material
  • Eis the temperature distribution
  • n is a direction normal to the surface
  • q conv is the convective heat flux
  • q rad is the radiative heat flux
  • Q$ summarizes any additional surface losses such as those incurred if the material is quenched.
  • additional boundary conditions can be found based on geometrical symmetries.
  • solutions can be obtained for different materials of varying geometries, In microsystem applications, the model can require further refinement to account for phenomena typically disregarded on larger scales. Restating the process, a time- varying current is passed through the inductive coil 170 at an appropriate frequency and power setting, as described above, for a necessary time duration.
  • the magnetic flux produced by the coil 170 induces a current in the film 150, resulting in the generation of heat energy due to resistive and hysteresis losses as detailed earlier.
  • inductive coil 170 can be repeated to achieve different application specific characteristics.
  • the film 150 can be either removed or allowed to remain as part of the overall structure.
  • thermopneumatic valve structures require heat-generation capability during normal operation.
  • the heat generation is often accomplished using current-generated dissipation by attaching wires to the devices.
  • FIG. 5 shows an isometric view of a second system 200 including a second substrate 202, a heating element 205, an electronic device 215, and a mechanical component 220.
  • the second system 200 is further placed near a set of induction coils 270 positioned in a substrate chamber 274 to achieve a desired magnetic coupling effect represent by 260.
  • This arrangement essentially eliminates the need for external leads and facilitates implementation in locations where physical connections are undesirable or difficult to obtain.
  • the inductive coil 270 near the heating element 205 causes the element 205 to radiate thermal energy.
  • the element 205 can be located either on the surface of the device 200 or embedded under one or more layers.
  • inductively heat thin films 150 deposited or applied and patterned on a silicon wafer or to locally heat selected regions of an integrated microsystem device on a substrate 102 materials are first preferably prepared.
  • the substrate 102 or the wafer is first prepared with a thin thermal oxide layer.
  • the thin thermal oxide layer is generally used for structural support and substrate anchoring during the process.
  • LPCND low-pressure chemical vapor deposition
  • devices 110 and structures 115, 120 are positioned on the substrate 102, or inside the substrate 102.
  • devices and structures include single- and double-anchored cantilever beams, folded beams, Guckel rings, vernier strain gauges, sensors, gas preconcentrators, gas separation columns for chromatography, precision voltage or current reference circuitry, thermopneumatic valve structures and the like.
  • the devices 110 or structures 115, 120 with pre-selected thickness are first patterned. Specifically, the devices 110 and structure 115, 120 are patterned in a caustic or an alkaline solution such as potassium hydroxide using an oxide hardmask.
  • sputter etching reactive ion etching, ion beam etching, deep reactive ion etching, or other plasma or dry processing techniques
  • the substrate 102 is then covered with a sputter-deposited oxide 124 with another pre-selected thickness to prevent them from coming into contact with the thin film 150.
  • an inductive thin film 150 is chosen.
  • the permeability and its corresponding Curie temperature are considered.
  • cobalt can be used as an inductive thin film 150 because cobalt has a maximum permeability of approximately 250 times that of typical microsystem materials and its Curie temperature indicates efficient heating up to 1115°C, thereby allowing it to provide adequate thermal energy for grain regrowth in polysilicon.
  • the thin film 150 is typically a ferromagnetic material that consists of, but not limited to, one or more of the elements such as iron, nickel, or cobalt.
  • a diffusion barrier 124 (FIG. 2) or a plasma- enhanced chemical vapor deposition ("PECND") oxide film is deposited over the entire substrate 102 or wafer. Thereafter, the chosen film 150 with the pre-selected thickness is evaporated or sputter-deposited onto a side of the substrate 102 using techniques such as shadow masking or sputtering with a thin film depositor 178 (FIG. 3). In the previous example, a lOOnm-thick cobalt film can be evaporated onto one side of the wafer using the shadow mask technique. Optional positioning of magnets near the substrate 102 to align the cobalt domains can be performed.
  • Heat reducers 182 around the targeted devices 110 or structures 115, 120 are then optionally and regionally provided to the substrate 102.
  • Heat reducer examples include heat-sink, insulating layer, and thermal barrier layer.
  • the substrate 102 is covered with the films 150 such that the heat generated in the targeted areas remains concentrate due to the thermal conductivity of the substrate 102.
  • the substrate chamber 174 provides a low pressure ambient with minimal energy loss due to convection, among other things, thus stabilizing the annealing process and increasing the energy efficiency of the system.
  • the substrate chamber 174 contains a controlled ambient gas.
  • the ambient gas can be inert gas like nitrogen or argon for annealing.
  • Other ambient gases include oxygen, forming gas (a mixture of nitrogen and hydrogen), and ammonia, or others.
  • reactive gases can also be used.
  • the class of hydride gases such as silane, disilane, dichlorosilane, trichlorosilane, chlorosilane.
  • the substrate chamber 174 can also be a vacuum chamber, such as a Norton NRC-3117 vacuum system, equipped with a mechanical vacuum pump and a vacuum diffusion pump.
  • the mechanical pump such as a
  • the vacuum diffusion pump such as a Norton type 0162 oil diffusion pump, is capable of an ultimate pressure of approximately 5x10 " Torr.
  • the vacuum chamber can include a stainless steel baseplate with a plurality of feedthrough adapters that are configured to introduce electrical, fluidic, process gas, or mechanical manipulation mechanisms into the vacuum chamber.
  • Example coil configurations include a solenoidal coil or a spinal coil.
  • the coils 170 receive a varying current that fluxes at a frequency.
  • An example frequency is 5MHz.
  • the solenoidal coil is generally chosen to subject the substrate 102 to a strong and relatively uniform magnetic field 160 with a dominant component in the z-direction.
  • the substrate 102 is then positioned in the coils 170 such that the induced eddy currents are in the r- ⁇ plane, generally eliminating the dependence of the required frequency on the film thickness.
  • the annealing process is conducted at pressures below approximately 0.2 Torr, or any pressure that minimizes heat convection by the gas from the substrate
  • high purity gas such as nitrogen or argon
  • mass flow control such as a Unit series 1200 mass flow controller.
  • the annealing process then begins with controUably energizing the coil 170 by passing current from a current-voltage source 186 through the coil 170.
  • the energizing current can be short pulse, medium pulse, long pulse, short continuous or long continuous. The current is then applied to the coil 170 for a pre-determined duration of time.
  • the energized coil 170 then results in a magnetic flux 160 at the coil 170 thereby inducing a current in the thin film 150.
  • the induced currents then generate heat energy in the substrate 102 due to resistive and hysteresis losses.
  • the process of placing the substrate 102 with the thin film 150 in the vacuum chamber to be near the coil 170 can be repeated to achieve different application specific characteristics.
  • the thin film 150 is then removed from the substrate 102 in an acidic solution such as sulfuric peroxide solution.
  • an acidic solution such as sulfuric peroxide solution.
  • a substrate 102 such as p-type silicon wafers, is placed in a furnace with oxygen (O 2 ) or water vapor (H 2 O) ambient that oxidizes the substrate 102.
  • oxygen oxygen
  • H 2 O water vapor
  • structural anchors are put in place. For example, a patterned layer of thermal oxide that anchors the structures or devices can be deposited on the substrate 102.
  • a hexa-methyl-disilane ("HDMS") or an adhesion primer and a layer of photoresist are spun on the substrate 102.
  • the spinning can be performed on a spin station such as a Laurell Model WS-400-6NPP/LITE spinning station.
  • a Shipley S1813 photoresist is used.
  • the substrate 102 is then softbaked at a preset temperature for a specific amount of time. For example, for a p-type silicon wafer, a Cole Parmer Dataplate digital hot plate softbakes the wafer at 90°C for one minute.
  • the photoresist is subsequently patterned using a mask such as the
  • EN620 mask aligner exposing the photoresist to ultraviolet (“UN") light.
  • the UN light causes the exposed photoresist long polymer chains to break down into short chain polymers.
  • the photoresist is developed in a developer solution such as Shipley MF319. The developer dissolves away the broken down photoresist while leaving the unexposed photoresist intact.
  • the areas where no photoresist is left is then etched using a buffered acid, such as a 5:1 buffered hydrofluoric (“BHF”) acid.
  • BHF buffered hydrofluoric
  • a device 110 or structure 115 such as a polysilicon is then deposited to the substrate 102 at a predetermined temperature.
  • a predetermined temperature For example, 2 microns of chemical vapor deposition ("CND") polysilicon is deposited on the substrate 102 using Thermco TMX furnace at 625°C.
  • oxide is again deposited or sputtered on the structure using a Perkin-Elmer 2400-8J RF sputtering system, for example. Similar to the oxide deposition procedure discussed, both HMDS and photoresist are spun on the substrate 102. The spun substrate 102 is then softbaked, masked, developed and etched.
  • the polysilicon structure is finally etched in the areas where no oxide is present using another caustic (base) solution such as a 10: 1 potassium hydroxide (KOH).
  • base caustic
  • KOH potassium hydroxide
  • other etching techniques such as sputter etching, reactive ion etching, deep reactive ion etching, ion beam etching, plasma etching, and other plasma or dry processing techniques.
  • a thin film depositor 178 deposits a barrier material 124, such as an oxide layer, that separates the polysilicon device 110 or structure 115, 120 from the thin film 150.
  • a barrier material 124 such as an oxide layer
  • a Perkin-Elmer 2400-8 J RF sputtering system can deposit a 0.25 micron layer of sputtered SiO 2 on the substrate 102.
  • the oxide layer is not patterned.
  • a thin film 150 to be inductively heated is deposited or applied to the substrate 102.
  • a ferromagnetic material, such as Cobalt can be used as the thin film.
  • the process of applying the thin film 150 is similar to the deposition of oxide to the substrate 102. Both HMDS and photoresist are first spun on the substrate 102 with the device 110 or structure 115 anchored. The substrate 102 is again softbaked, photoresist masked, and developed. Thereafter, the thin film 150 is applied, deposited or sputtered on the substrate 102.
  • masked areas of the thin film 150 above the photoresist can be lifted using a solvent solution, such as acetone, with a Branson 3210 ultrasonic agitator leaving the thin film 150 on the substrate 102 only in the patterned regions.
  • a solvent solution such as acetone
  • the substrate 102 with the device 110 and the structure 115, 120 is then positioned in a substrate chamber 174, 274 and heated with a Lepel 7.5kW system.
  • the substrate 102 is typically mounted on thermally and electrically insulating contacts horizontally over the inductive coil 170 inside the substrate chamber 174.
  • the mount can be a dielectric, such as fused quartz or silica, configured to incorporate a minimal contact to the substrate 102.
  • Current is thereafter applied to the coil 170, which is positioned near (for example, surrounds or is adjacent to) the thin film. Once the current starts to energize the coil 170, the coil 170 generates an electromagnetic field having an electromagnetic flux as described earlier. The flux induces an eddy current in the thin film 150. Due to the resistive nature of the thin film 150, heat is generated in the thin film 150. Once the heat reaches a certain temperature, the substrate 102 is accordingly heated. As a result, the device 110 or the structure 115,
  • the inductive heating of thin films on a substrate 102 involves the post-CMOS integrated processing of MEMS elements on the same wafer or substrate 102.
  • a high density microelectronic device 105 a high density CMOS process for example, is first incorporated into a substrate 102.
  • the substrate 102 is a complete CMOS substrate.
  • the substrate 102 can be passivated by a deposition technique such as sputtering or plasma-enhanced chemical vapor deposition ("PECND").
  • Local interconnect for the post-CMOS device 110, 115, or 120 can be formed on the passivation layer or layers.
  • a spacer layer of sacrificial material is deposited and patterned for a sacrificial MEMS process.
  • a MEMS structural layer 115, 120 can then be formed on top of the spacer.
  • the spacer layer can be made from a low temperature doped silicon dioxide glass like phosphosilicate glass (“PSG”) or borophosphosilicate glass (“BPSG").
  • the layer thickness ranges from 3 ⁇ m to 30 ⁇ m.
  • the structural layer is then patterned and etched to form the device geometry appropriate for the design.
  • the structural layer 115, 120 can also be passivated for electrical and dopant isolation from any subsequent materials.
  • a suitable electrical and diffusion barrier 124 such as a low temperature silicon nitride will passivate the structural layer.
  • An inductive coupling material 150 is thereafter deposited and patterned to form localized regions where the inductive coupling is maximized.
  • the thin film 150 thickness ranges from 0.3 ⁇ m to 5 ⁇ m.
  • the thin film 150 is incorporated in the substrate 102.
  • Heat reducers 182 are used in areas that are designed to remain cool relative to the MEMS structural material 115, 120. Additionally, the thin film 150 is not patterned in the areas that are designed to remain cool during the annealing process.
  • the substrate 102 with the devices 110 and the structures 115, 120 covered with thin films 150, is subsequently placed in or near an inductive coil 170 within a chamber 174, 274.
  • the chamber 174, 274 is a vacuum chamber.
  • the coil 170 induces magnetic coupling denoted by 160.
  • the coupling further generates an eddy current in the thin film 150, which in turn generates heat in the substrate 102.
  • the substrate 102 is removed from the coil 170.
  • the inductive film 150 is removed from the substrate 102.
  • Material property changes induced in the thin film 150 may include an increase in electrical conductivity due to enhanced diffusion of dopants into the film 150 and a reduction in the mechanical stress and stress gradients in the structural film 115.
  • the passivation between 150 and 115 and 120 can also be removed.
  • the structures 115 and 120 can be released using a typical surface micromachining sacrificial etch process, resulting in the completion of the annealing process.

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Induction Heating (AREA)
  • Physical Vapour Deposition (AREA)
  • Thin Magnetic Films (AREA)

Abstract

L'invention concerne un procédé de chauffage au niveau local d'un système présentant un substrat. Ledit procédé consiste à appliquer un film mince sur le système, et à exciter par commande une bobine positionnée près du film mince. Les bobines excitées génèrent ainsi un flux magnétique. Le procédé consiste ensuite à induire un courant dans le film mince à l'aide du flux magnétique, chauffant ainsi le système.
PCT/US2003/006048 2002-03-01 2003-02-28 Chauffage par induction de films minces Ceased WO2003075368A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003222237A AU2003222237A1 (en) 2002-03-01 2003-02-28 Method and apparatus for induction heating of thin films

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US36066702P 2002-03-01 2002-03-01
US60/360,667 2002-03-01

Publications (2)

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WO2003075368A2 true WO2003075368A2 (fr) 2003-09-12
WO2003075368A3 WO2003075368A3 (fr) 2004-04-08

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US (1) US6878909B2 (fr)
AU (1) AU2003222237A1 (fr)
WO (1) WO2003075368A2 (fr)

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US20090039070A1 (en) * 2007-08-06 2009-02-12 Jung-Wen Tseng Semiconductor equipment and breakdown precautionary system and method thereof
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US6878909B2 (en) 2005-04-12
WO2003075368A3 (fr) 2004-04-08
AU2003222237A1 (en) 2003-09-16
US20030164371A1 (en) 2003-09-04
AU2003222237A8 (en) 2003-09-16

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