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WO2003067630A2 - Systeme comprenant des modules de conditionnement de puissance - Google Patents

Systeme comprenant des modules de conditionnement de puissance Download PDF

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Publication number
WO2003067630A2
WO2003067630A2 PCT/US2003/002869 US0302869W WO03067630A2 WO 2003067630 A2 WO2003067630 A2 WO 2003067630A2 US 0302869 W US0302869 W US 0302869W WO 03067630 A2 WO03067630 A2 WO 03067630A2
Authority
WO
WIPO (PCT)
Prior art keywords
power
interface
thermal management
power conditioning
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/002869
Other languages
English (en)
Other versions
WO2003067630A3 (fr
Inventor
Thomas William Kenny, Jr.
Goodson E. Kenneth
Juan G. Santiago
John J. Kim
Robert C. Chaplinsky
George Carl Everett, Jr.
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cooligy Inc
Original Assignee
Cooligy Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/072,137 external-priority patent/US6606251B1/en
Application filed by Cooligy Inc filed Critical Cooligy Inc
Priority to AU2003217287A priority Critical patent/AU2003217287A1/en
Publication of WO2003067630A2 publication Critical patent/WO2003067630A2/fr
Publication of WO2003067630A3 publication Critical patent/WO2003067630A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73257—Bump and wire connectors

Definitions

  • AC-DC and DC-DC converters are employed to transform a particular supply voltage from a convenient source into an appropriate form for consumption by, for example, the integrated circuit device.
  • system power electronics provide for a single, relatively high voltage (for example, 48 volt DC, or 110 volt AC), whereas the integrated circuit device may require very different supply voltages (for example, 1 to 5 volts, DC).
  • converters transform the power and provide the input voltage required by the device.
  • converters are located as close to the consuming device as possible so as to provide stable voltage during variations in power consumption by that device. (See, for example, U.S. Patents 5,901,040; 6,191,945; and 6,285,550).
  • thermal management systems i.e., systems that capture, remove and/or reject energy in the form of heat.
  • thermal management systems have employed such conventional techniques as heat sinks, fans, cold plates systems that employ cooling water, and/or combinations thereof for heat-capture, removal and rejection from, for example, an integrated circuit device.
  • heat sinks generally consist of metal plates with fins that transport heat from the consuming device to the surrounding air by natural convection. Heat sinks tend to be located or positioned directly on the integrated circuit device packaging. Heat sinks serve to increase the area of contact between the device and the surrounding air, thereby reducing the temperature rise for a given power.
  • FIGURE 1 the consuming device is an integrated circuit device.
  • the thermal management element is heat sink that is in contact with the consuming device.
  • the heat capture, removal and rejection via the heat sink may be relatively high.
  • the power conditioning module of this aspect of the invention may also include current sensor(s), disposed in the semiconductor substrate, to provide information that is representative of a current consumption of the integrated circuit and/or electrical circuit.
  • a controller coupled to the current sensor, may receive that information and, in response, may adjust the cooling of the integrated circuit and/or the power conditioning module.
  • the power conditioning module may also include temperature sensor(s), disposed in the semiconductor substrate, to provide information that is representative of a temperature of a region in proximity to the temperature sensor.
  • a controller may be coupled to the temperature sensor to receive that information and, in response, may adjust the cooling of the integrated circuit and/or the power conditioning module.
  • the present invention is a power conditioning and thermal management module adapted to couple to an integrated circuit device.
  • the power conditioning and thermal management module includes a power conditioning element having a first interface and a second interface, wherein the first interface opposes the second interface.
  • the power conditioning element includes a semiconductor substrate, a plurality of interface vias, disposed in the semiconductor substrate, and electrical circuitry to condition the power to be applied to e in egra e circui evice. e e ec rica circui ry inc u es a eas one vo age regulator anu at least one capacitor.
  • the electrical circuitry may be disposed on the first interface, second interface or both interfaces of the power conditioning element.
  • the power conditioning and thermal management module of this aspect of the invention further includes a thermal management element having a first interface and a second interface wherein the first interface opposes the second interface.
  • the thermal management element uses a fluid having a liquid phase to capture thermal energy.
  • the thermal management element includes a substrate, wherein the substrate includes at least a portion of a micro channel disposed therein and configured to permit fluid flow therethrough.
  • the thermal management element also may include a plurality of interface vias to provide electrical connection between the first interface and the second interface of the thermal management element.
  • the plurality of interface vias of the thermal management element may connect to a corresponding one of the plurality of interface vias of the power management element to provide electrical connection between the first interface of the power conditioning element and the second interface of the thermal management element.
  • the first interface of the thermal management element maybe physically bonded to the second interface of the power conditioning element.
  • the power conditioning and thermal management module of this aspect of the invention may also include a pump (for example, an electro-osmotic pump), adapted to connect to the micro channel, to produce the flow of the fluid in the micro channel.
  • a pump for example, an electro-osmotic pump
  • the power conditioning and thermal management module includes current sensor(s), disposed in the semiconductor substrate, to provide information that is representative of a current consumption of the integrated circuit and/or the electrical circuitry.
  • the power conditioning and thermal management module may also include a controller, coupled to the current sensor, to receive the information that is representative of the current consumption of the integrated circuit. In response to that n ormation, the controller may adjust the flow of the fluid in the m cro channe , m mis icg ⁇ iu, the controller may adjust a rate of flow of fluid output by the pump.
  • the power conditioning and thermal management module includes temperature sensor(s), disposed in the power conditioning and thermal management module, to provide information which is representative of the temperature of a region of the power conditioning and thermal management module or in a region of the integrated circuit.
  • a controller coupled to the temperature sensor, may receive the temperature indicative information and, in response thereto, may adjust the flow of the fluid in the micro channel. For example, the controller may adjust a rate of flow of fluid output by the pump.
  • the power conditioning and thermal management module includes at least one power pad disposed on the second interface of the thermal management element and at least one power via.
  • the power via is electrically connected to the power pad to provide electrical connection between the second interface of the thermal management element and at least one of the voltage regulator and capacitor.
  • the power via may be electrically connected to a power conduit disposed in the semiconductor substrate of the power management element.
  • the power conduit provides electrical connection between the power via and the electrical circuitry (i.e., at least one of the voltage regulator and capacitor).
  • the power conditioning and thermal management module includes at least one power via disposed in the substrate of the thermal management element, at least one power pad disposed on the second interface of the thermal management element, and at least one output power conduit, coupled to the electrical circuitry, to provide conditioned power to the integrated circuit device.
  • the power pad of this embodiment is electrically connected to the power via to provide electrical connection between the second interface of the thermal management element and the electrical circuitry.
  • the output power conduit may connect to an input power pad disposed on the first interface of the power conditioning element.
  • the input power pad corresponds to the power input pin/pad of the integrated circuit device.
  • the present invention is a power conditiomng anu uieiiutu management module that couples to an integrated circuit device.
  • the power conditioning and thermal management module has a first interface and a second interface wherein the first interface opposes the second interface.
  • the power conditioning and thermal management module includes a semiconductor substrate, a plurality of interface vias to provide electrical connection between the first interface and the second interface, and a first plurality of pads disposed on the first interface, each of the first plurality of pads is connected to a corresponding one of the interface vias on the first interface.
  • the power conditioning and thermal management module also includes a second plurality of pads disposed on the second interface, each of the second plurality of pads is connected to a corresponding one of the interface vias on the second interface.
  • the power conditioning and thermal management module includes electrical circuitry and a micro channel structure.
  • the electrical circuitry is disposed in the semiconductor substrate and conditions the power to be applied to the integrated circuit device.
  • the electrical circuitry may be disposed on the first interface, the second interface or both interfaces.
  • the electrical circuitry includes at least one voltage regulator and at least one capacitor.
  • the micro channel structure includes at least one micro channel disposed in the semiconductor substrate to capture thermal energy.
  • the power conditioning and thermal management module of this aspect of the invention may also include current sensor(s), temperature sensor(s), and a controller.
  • the current sensor(s), temperature sensor(s), and/or controller may be disposed in the power conditioning and thermal management module.
  • the controller maybe coupled to the current sensor(s) and/or temperature sensor(s), to receive the current or temperature indicative information and, in response thereto, may adjust the rate of capture of thermal energy by the micro channel structure.
  • the controller may adjust the flow of the fluid in the micro channel and/or a rate of flow of fluid output by the pump.
  • t e power con itioning anu. lucm ⁇ i management module includes at least one power pad disposed on the second interface and at least one power via.
  • the power pad is electrically connected to the power via to provide electrical connection between the second interface and at least one of the voltage regulator and capacitor.
  • the power via may be electrically connected to a power conduit disposed in the semiconductor substrate. The power conduit provides electrical connection between the power pad and at least one of the voltage regulator and capacitor.
  • FIGURE 6 is a block diagram representation of a top view of the interface of the power conditioning module according to one aspect of the present invention.
  • FIGURE 8 is a cross-sectional view of a power conditioning and thermal management module in accordance with one aspect of the present invention.
  • FIGURE 1 OB is a cross sectional view, along line AA, of the micro channel configuration of a thermal management element illustrated in FIGURE 10A;
  • FIGURE 11 is a block diagram representation of another embodiment of the power conditioning and thermal management module, incorporated in a dual-in-line package, facedown integrated circuit application;
  • FIGURE 12A is a block diagram representation of another embodiment of the power conditioning and thermal management module, incorporated in a dual-in-line package, face-up integrated circuit application;
  • FIGURE 12B is a block diagram representation of the embodiment of the power conditioning and thermal management module, incorporated in a dual-in-line package, face-up gra e circui app ica ion o m conjunc ion
  • FIGURE 13 is a cross-sectional view of another embodiment of the power conditioning and thermal management module, mounted on a printed circuit board, in accordance with the present invention
  • FIGURE 14 is a cross-sectional view of another embodiment of the power conditioning and thermal management module of the present invention.
  • FIGURE 17A is a block diagram representation and cross-sectional view of an embodiment of the integrated power conditioning and heat capture/rej ection module of FIGURE 16, in conjunction with a discrete heat capture/rejection module, incorporated in an integrated circuit application;
  • the semiconductor substrate 102 may be fabricated from a number of well known materials including, for example, silicon or germanium. In certain circumstances, it may be advantageous to use a material that is the same as, or has similar properties (for example, thermal expansion) to the material used for the substrate of device 200. Such a configuration may provide for enhanced operating reliability since the similar thermal expansion properties oi power conditioning module 100 and device 200 may minimize the potential for defects in the electrical connections between power conditioning module 100 and device 200 typically caused during operation because of differences in thermal expansion coefficients. Moreover, using the same material or materials permits the use of the same or similar fabrication techniques and facilities/equipment thereby potentially reducing manufacturing costs.
  • the interface vias 104a-104h may be fabricated using conventional processing techniques. Where the number of signals that travel to and from device 200 is large, it may be preferable to employ highly anisotropic etching to form narrow pathways in substrate 102 and to deposit (for example, using CVD or LPCVD techniques) a highly conductive material such as gold, copper, aluminum, or highly doped polysilicon into the pathways to facilitate a highly conductive interconnection.
  • highly anisotropic etching to form narrow pathways in substrate 102 and to deposit (for example, using CVD or LPCVD techniques) a highly conductive material such as gold, copper, aluminum, or highly doped polysilicon into the pathways to facilitate a highly conductive interconnection.
  • Kenny et al. Application The Kenny et al. Application is hereby incorporated, in its entirety, by reference herein.
  • the device 200 illustrated in the embodiment of FIGURE 12A may employ a conventional face-up, wire bond mounting configuration where wire bonds provide connection from device 200 to package 1300.
  • the interconnect vias are unnecessary since conventional wire bonding techniques provide the electrical connection to device 200.
  • this embodiment provides several significant advantages, including, for example, incorporation of power conditioning and heat capture elements into package 1300 thereby providing close proximity of power conditioning element 1100 to device 200.
  • this embodiment provides an advantage of providing intimate contact between device 200, power conditioning element 1100 and thermal management element 1200 so that energy (in the form of heat) generated by device 200 and/or power conditioning element 1100 may be efficiently captured (by the fluid in micro channels 1220) are removed from package 1300.
  • sensor(s) 1290 are integrated with the voltage regulators in power conditioning element 1100. It should be noted that controller 1280 may also determine the power requirements and/or consumption of device 200 indirectly from the power consumed during operation of device 200. The controller 1280 may then use that information to determine or implement an appropriate course of action, for example, by adjusting the heat capture and removal capabilities of micro channel heat exchanger 1210 or heat rejection capabilities of the system, as discussed above.
  • pump 1230 is disposed between thermal capture and rej ection module 1400 and heat rejection element 1410.
  • Thepump 1230 may be an electro-osmotic pumping device as described in detail in the Kenny et al. Application. Many different types of configurations and designs of pump 1230 are acceptable including those described and illustrated in the Kenny et al. Application, which are hereby incorporated by reference.
  • the power conditioning element and the micro channel structure of the thermal management element are fabricated in the same substrate - rather than two substrates 102a and 102b, as described above and illustrated in FIGURES 8 and 18.
  • micro channel structure 1210 and power conditioning element 1100 are fabricated in the same substrate.
  • the assembly costs may be reduced because the thermal management element and the power conditioning element need not be assembled from two separate substrates before interfacing with the consuming device and another substrate (for example, a printed circuit board).
  • the capture and removal of heat from the consuming device may be enhanced, relative to the embodiment of FIGURE 9, because of the proximity of the micro channels to the heat generating circuitry disposed on the consuming device.
  • the capture and removal of heat from electrical circuitry 112 of power conditioning element 1100 may be sufficient and, as such, this embodiment may not require additional heat removal, capture and rej ection capabilities from, for example a heat sink and/or fan.
  • micro channel structure 1210 of thermal management element 1200 may be fabricated using conventional micro channel fabrication techniques and/or those techniques described and illustrated in the Kenny et al. Application, which are hereby incorporated by reference. Thereafter, electrical circuitry 112 of power conditioning element 1100 maybe fabricated using conventional CMOS or BJT design and fabrication techniques. In tins embodiment, the interface, power and ground vias may be fabricated before or after the formation of the micro channel structure. The pads (if any) that connect to the vias may be fabricated after fabrication of electrical circuitry 112 and micro channels 1220.
  • electrical circuitry 112 of power conditioning element 1100 may be subjected to micro channel processing without damage, electrical circuitry 112 may be fabricated before fabrication of the micro channel structure.
  • the interface, power and ground vias maybe fabricated before or after the formation of the micro channel structure.
  • the pads (if any) that connect to the vias may be fabricated after the other elements of power conditioning and thermal management module 1000.
  • the power conditioning element and micro channel structure of thermal management element 1200 are fabricated in one substrate.
  • the entire micro channel structure, or a portion of that structure maybe fabricated on e ac s e o ev ce . re erence to an , micro channels z ⁇ of micro channel structure 1210 may be fabricated entirely in device 200 (FIGURE 19B) or partially in device 200 and power conditioning element 1100 (FIGURE 19C).
  • FIGURE 19A The discussion above with respect to FIGURE 19A is fully and equally applicable to power conditioning and thermal management modules illustrated in FIGURES 19B and 19C. For the sake of brevity, that discussion will not be repeated.
  • Another aspect of the present invention is the use of the module and/or elements described herein (for example, power conditioning module 100, power conditioning and thermal management module 1000, thermal capture and rejection module 1400, heat rejection element 1410 and thermal capture element 1420) as building blocks in designing a system having local power conditioning functionality as well as heat capture, removal and/or rejection capabilities.
  • device 200 is disposed on printed circuit board 400
  • thermal capture element 1420 is disposed on device 200 to facilitate capture of localized heat generated by device 200.
  • the power conditioning and thermal management module 1000 is disposed on thermal capture element 1420.
  • power conditioning element 1100 is in close proximity to device 200. Power and ground connections to and from power conditioning element 1100 may be accomplished using a wire bond configuration described herein. (See, for example, FIGURES 4 and 7).
  • t cont nue re erence to , t e pump no s own may be an electro- osmotic type pump(s) located in thermal management module 1200 and/or thermal capture element 1420.
  • the pump need not be located in thermal management module 1200 or thermal capture element 1420 but rather maybe a "stand alone" device.
  • the pump may include a plurality of pumping mechanisms, including mechanisms having configurations as described in the Kenny et al. Application.
  • FIGURE 21 Another example of using modules and/or elements as building blocks is illustrated in FIGURE 21.
  • power conditioning and thermal management module 1000 is disposed on device 200 and thermal capture element 1420 is disposed on power conditioning element 1100 of power conditioning and thermal management module 1000.
  • heat rejection element 1410 is disposed on thermal capture element 1420 to enhance the rejection of the heat captured by thermal management element 1200 (generated primarily by device 200) and thermal capture element 1420 (generated primarily by power conditioning element 1100).
  • the power conditioning and thermal management functions may be incorporated (in whole or in part) into other modules or elements, or even the consuming device itself. In this regard, these function(s) may be combined in consuming device to facilitate a more compact and cost effective system.
  • s ou e no e a power con on ng an erma managemen mo u e may be disposed on the back side of device 200 or power conditioning element 1100 and/or thermal management element 1200 maybe disposed on the both the front and back sides of device 200.
  • power conditioning element 1100 maybe disposed on the front side of device 200 and thermal management element 1200 may be disposed on the backside.
  • FIGURE 24 Another aspect of the present invention is a system including a plurality of consuming devices, each having a power conditioning and thermal management module that receives power from a primary power supply and a working fluid from a fluidic pumping mechanism.
  • primary power supply 3100 provides initial power conditioning of an external power source (not shown).
  • the output of primary power supply 3100 is provided to each of the power conditioning elements HOOa-c of power con itioning and thermal management module lOOOa-c, respectively.
  • the power conditioning elements 1 lOOa-c provide localized power conditioning for the consuming device 200a-c, respectively.
  • the power conditioning elements HOOa-c may be any one of the embodiments described above and illustrated in FIGURES 8-19.
  • the primary power supply 3100 provides the initially conditioned power to each power conditioning elements 11 OOa-c by way of power bus 3110.
  • the power bus 3110 may be routed in parallel to each of power conditioning elements 1200a-c.
  • the primary power supply 3100 may include discrete components, similar to that illustrated in FIGURE 1 , or may be a power conditioning module 1100, similar to that described above with respect to FIGURE 2. Moreover, primary power supply 3100 may also include additional power supply circuitry positioned more locally to the devices 200a-c. The additional power supply circuitry may provide additional initial conditioning of the power before being supplied to power conditioning elements 1 lOOa-c. With continued reference to FIGURE 24, fluidic pumping mechanism 3200 provides a working fluid to each of the thermal management elements 1 lOOa-c of power conditioning and thermal management module 1 OOOa-c, respectively. The thermal management elements 11 OOa-c captures and removes heat generated by devices 200a-c and/or power conditioning elements 11 OOa-c.
  • the thermal management elements 11 OOa-c may be any one of the embodiments described above and illustrated in FIGURES 8-19.
  • system 3000 of FIGURE 24 may also include local heat rejection elements (not shown) that are disposed on or near devices 200a- c.
  • System 3000 may also, or alternatively include a global heat rejection element (not shown) that rejects heat for one or more of the thermal management elements 11 OOa-c.
  • the heat rejection element(s) may include the features of the heat rejection element and thermal rejection module as illustrated in FIGURES 2-19 and described above.
  • the fluidic pump mechanism exchanges the working fluid with each thermal management element 1200a-c by way of fluid bus 3210. That is, pumping mec ⁇ amsm -5/uu provides cool fluid to each thermal management element 1200a-c using fluid bus 3210; and fluid bus 3210 provides a path for the heated fluid from thermal management element 1200a-c to fluidic pump mechanism 3200.
  • the fluid bus 3210 may be routed in parallel or series to each of thermal management elements 1200a-c.
  • system 3000 of FIGURE 24 may be implemented using power conditioning module 100 illustrated in FIGURES 2-7, and described above. Under this circumstance, the thermal management operations or functions maybe performed in any manner, including those described above and illustrated in FIGURES 2-7, 20 and 21. Thus, depending on the type of thermal management technique employed, a fluidic pump mechanism 3200 and fluid bus 3210 may be unnecessary.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
  • Power Sources (AREA)

Abstract

Dans l'un des aspects, l'invention concerne une technique et un système destinés à conditionner la puissance pour un dispositif consommateur. A cette fin, un module de conditionnement de puissance, attaché à un dispositif à circuit intégré, conditionne la puissance à appliquer au dispositif à circuit intégré. Le module de conditionnement de puissance comprend un substrat semi-conducteur comportant une première interface et une deuxième interface, la première interface se trouvant en face de la deuxième. Le module de conditionnement de puissance comprend également une pluralité de vias d'interface qui assurent la connexion électrique entre la première et la deuxième interfaces, et un premier ensemble de plaquettes disposées sur la deuxième interface. Chacune des plaquettes est connectée au via d'interface correspondant sur la première ou la deuxième interface. Le module de conditionnement de puissance comprend aussi un circuit électrique disposé à l'intérieur du substrat semi-conducteur et servant à conditionner la puissance à appliquer au dispositif à circuit intégré. Le circuit électrique peut être disposé sur la première interface, la deuxième interface ou les deux. En outre, le circuit électrique comprend au moins un régulateur de tension et au moins un condensateur.
PCT/US2003/002869 2002-02-07 2003-01-31 Systeme comprenant des modules de conditionnement de puissance Ceased WO2003067630A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003217287A AU2003217287A1 (en) 2002-02-07 2003-01-31 System including power conditioning modules

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/072,137 2002-02-07
US10/072,137 US6606251B1 (en) 2002-02-07 2002-02-07 Power conditioning module
US10/114,005 2002-03-27
US10/114,005 US6678168B2 (en) 2002-02-07 2002-03-27 System including power conditioning modules

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PCT/US2003/002868 Ceased WO2003067730A2 (fr) 2002-02-07 2003-01-31 Module de conditionnement de puissance

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9451112B2 (en) 2011-05-04 2016-09-20 Samsung Electronics Co., Ltd. Image forming apparatus and method for controlling the same
CN120475688A (zh) * 2025-07-15 2025-08-12 电子科技大学 一种用于异构集成射频前端的雪花型散热结构

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JP3477781B2 (ja) * 1993-03-23 2003-12-10 セイコーエプソン株式会社 Ｉｃカード

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9451112B2 (en) 2011-05-04 2016-09-20 Samsung Electronics Co., Ltd. Image forming apparatus and method for controlling the same
CN120475688A (zh) * 2025-07-15 2025-08-12 电子科技大学 一种用于异构集成射频前端的雪花型散热结构

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AU2003217287A1 (en) 2003-09-02
AU2003217286A8 (en) 2003-09-02
TWI239438B (en) 2005-09-11
TW200302960A (en) 2003-08-16
WO2003067730A3 (fr) 2004-01-29
AU2003217286A1 (en) 2003-09-02
WO2003067730A2 (fr) 2003-08-14
AU2003217287A8 (en) 2003-09-02
WO2003067630A3 (fr) 2003-12-31

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