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WO2002037683A3 - Phase lock loop circuit - Google Patents

Phase lock loop circuit Download PDF

Info

Publication number
WO2002037683A3
WO2002037683A3 PCT/US2001/045766 US0145766W WO0237683A3 WO 2002037683 A3 WO2002037683 A3 WO 2002037683A3 US 0145766 W US0145766 W US 0145766W WO 0237683 A3 WO0237683 A3 WO 0237683A3
Authority
WO
WIPO (PCT)
Prior art keywords
phase lock
lock loop
destress
loop circuit
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2001/045766
Other languages
French (fr)
Other versions
WO2002037683A2 (en
Inventor
Benjamin Tang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Primarion Inc
Original Assignee
Primarion Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Primarion Inc filed Critical Primarion Inc
Priority to AU2002220120A priority Critical patent/AU2002220120A1/en
Publication of WO2002037683A2 publication Critical patent/WO2002037683A2/en
Anticipated expiration legal-status Critical
Publication of WO2002037683A3 publication Critical patent/WO2002037683A3/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0998—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator using phase interpolation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
    • H03K3/0231—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/03—Astable circuits
    • H03K3/0315—Ring oscillators
    • H03K3/0322—Ring oscillators with differential cells
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
    • H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A phase lock loop destress circuit (100) is described. The PLL circuit includes a loop destress logic circuit (180) and a coarse tune digital-to-analog converter (190), which are coupled to a summer and driver (140), which in turn is coupled to a voltage controlled oscillator (150). The loop destress logic circuit is configured to automatically select a digital word for use in coarse tuning the voltage controlled oscillator.
PCT/US2001/045766 2000-11-01 2001-11-01 Phase lock loop circuit Ceased WO2002037683A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002220120A AU2002220120A1 (en) 2000-11-01 2001-11-01 Phase lock loop circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US24494400P 2000-11-01 2000-11-01
US60/244,944 2000-11-01

Publications (2)

Publication Number Publication Date
WO2002037683A2 WO2002037683A2 (en) 2002-05-10
WO2002037683A3 true WO2002037683A3 (en) 2003-05-15

Family

ID=22924719

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/045766 Ceased WO2002037683A2 (en) 2000-11-01 2001-11-01 Phase lock loop circuit

Country Status (2)

Country Link
AU (1) AU2002220120A1 (en)
WO (1) WO2002037683A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2498946A (en) * 2012-01-31 2013-08-07 Texas Instruments Ltd Fast start-up circuit for phase locked loop (PLL)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4568888A (en) * 1983-11-08 1986-02-04 Trw Inc. PLL Fast frequency synthesizer with memories for coarse tuning and loop gain correction
EP0308285A1 (en) * 1987-08-26 1989-03-22 Tonna Electronique Device comprising a phase-locked loop
US5604465A (en) * 1995-06-07 1997-02-18 International Business Machines Corporation Adaptive self-calibration for fast tuning phaselock loops
EP0828348A2 (en) * 1996-09-10 1998-03-11 Phoenix VLSI Consultants Ltd. Phase-tuned ring oscillator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4568888A (en) * 1983-11-08 1986-02-04 Trw Inc. PLL Fast frequency synthesizer with memories for coarse tuning and loop gain correction
EP0308285A1 (en) * 1987-08-26 1989-03-22 Tonna Electronique Device comprising a phase-locked loop
US5604465A (en) * 1995-06-07 1997-02-18 International Business Machines Corporation Adaptive self-calibration for fast tuning phaselock loops
EP0828348A2 (en) * 1996-09-10 1998-03-11 Phoenix VLSI Consultants Ltd. Phase-tuned ring oscillator

Also Published As

Publication number Publication date
WO2002037683A2 (en) 2002-05-10
AU2002220120A1 (en) 2002-05-15

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Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
REG Reference to national code

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