WO2002037285A1

WO2002037285A1 - Semiconductor integrated circuit, receiver apparatus using the same, receiver apparatus manufacturing method and repairing method, and video providing method

Info

Publication number: WO2002037285A1
Application number: PCT/JP2001/009279
Authority: WO
Inventors: Katsuki Hazama; Katsumi Kuwayama
Original assignee: Thine Electronics, Inc.
Priority date: 2000-10-30
Filing date: 2001-10-23
Publication date: 2002-05-10
Also published as: TW560188B; JPWO2002037285A1

Abstract

In a receiver or the like for reproducing encrypted video signals, a semiconductor integrated circuit wherein the number of the components used therein has been reduced and wherein, after completion of the receiver hardware, information can be written into a nonvolatile memory and the written information cen be rewritten. This semiconductor integrated circuit is one for use in an apparatus for receiving encrypted video signals and has an interface circuit for effecting a serial communication with the exterior and also has a memory control circuit for controlling the nonvolatile memory to write and/or read a first information to be transmitted to the exterior by the interface circuit and a second information to be used to decrypt the encrypted video signals.

Description

TECHNICAL FIELD The present invention relates to a semiconductor integrated circuit, a receiving device using the same, a method of manufacturing and repairing the receiving device, and an image providing method.

The present invention generally relates to a semiconductor integrated circuit, and more particularly to a semiconductor integrated circuit used for receiving or transmitting an encrypted image signal. The present invention also relates to a receiving-side device such as a receiver using a semiconductor integrated circuit for reception, and a method of manufacturing and repairing the receiving-side device. Further, the present invention relates to an image providing method using such a receiver. Background art

A standard called DDC (display data channel) related to the connection between a transmitting device such as a personal computer and a receiving device such as a monitor / projector is defined as follows. It is specified so that the optimal signal can be obtained for the above devices.

A receiver conforming to the DDC standard has an electrically erasable programmable read-only memory (EEPR〇M) in which information called ED ID (extended display identification data) is stored. The ED ID contains information such as the type of receiver, display resolution, clock frequency, manufacturer name, and serial number. In addition, a two-wire serial EEPROM is generally used as an EE PROM for storing an ED ID, and data is transmitted and received by serial communication according to the I ² C bus method (the I ² C path is a Philips Registered trademark).

In this serial communication, the SDA (serial data) terminal and the S Two terminals called CL (serial clock) terminals are used to control the EEPROM built into the receiver and transmit and receive information. When the SDA terminal and the SCL terminal of the receiver are connected to a personal computer via a cable, the personal computer can read EDID stored in the EEPROM. As a result, the information about the optimal signal for the receiver is provided to the personal computer, while the image signal transmitted from the personal computer or the like to the receiver is shifting from an analog signal to a digital signal. Deterioration has hardly occurred. For this reason, there is a need to protect copyrighted works from illegal copying of image signals. As one of means for this, encryption of an image signal transmitted from a personal computer or the like to a receiver has been performed. Among them, currently, a method called HDCP (high-b and width digital content protection) is becoming a standard.

FIG. 1 is a block diagram showing an image transmission system using a conventional receiver of the HDCP scheme. As shown in FIG. 1, the image transmission system includes a host computer 100 and a receiver 200. The receiver 200 holds encryption key information in the HDCP scheme (hereinafter, also referred to as “encryption key”). The encryption key includes a “public key” notified from the receiver 200 to the host computer 100 by the DDC, and a “private key” that must not be known to the general public.

The host computer 100 includes a graphic accelerator 11 for generating an image signal for high-speed drawing, and an encryption LSI 100 based on the HDCP method. The encryption LSI 10 encrypts an image signal using the storage unit 12 for storing the encryption key and the encryption key stored in the storage unit 12. And a DV I transmitter interface circuit 14 for transmitting an image signal. In the HDCP system, the digital visual interface (DVI) standard is generally used for transmitting and receiving image signals. Therefore, the circuits for transmitting and receiving image signals are compliant with the DVI standard. Be compliant.

On the other hand, the receiver 200 decodes an image signal encrypted by the HDCP scheme using the serial EEPROM 21 that stores the ED ID, the EEPROM 22 that stores the encryption key, and the encryption key. It includes a semiconductor integrated circuit (decoding LSI) 230 to be converted, a liquid crystal panel 240, and a timing controller 241.

The decryption LS 1230 includes a master interface circuit 231 for controlling the EE PROM 222, an HDC P decryption circuit 235, and an interface circuit for transmitting and receiving an encryption key and the like: A DVI receiver interface circuit 237 for receiving image signals.

The liquid crystal panel 240 displays an image based on the decoded image signal. Further, the timing controller 241 controls the timing of inputting an image signal to the signal line of the liquid crystal panel.

Further, the receiver 200 has an SCL terminal 54 and an SDA terminal 55 connected to the EEP ROM 221 and the interface circuit 236, and an image terminal 56 connected to the DV I receiver interface circuit 237. It transmits and receives signals to and from external devices through the DV I cable 50 connected to these terminals. The DVI cable 50 includes an SCL signal line 51, an SDA signal line 52, and an image signal line 53 used for transmitting and receiving data according to the DDC standard.

When the system is started, the host computer 100 transmits the ED ID stored in the EE PROM 221 of the receiver 200 and the EE PROM 2 The public key stored in 22 can be read. In the host computer 100, the graphic accelerator 11 generates an image signal suitable for the receiver 200 based on the received EDID. When the receiver 200 is authenticated based on the received public key, the HDCP encryption circuit 13 encrypts the image signal using the encryption key, and the DVI transmitter interface circuit 14 This is transmitted to the receiver 200.

In the receiver 200, the master interface circuit 231 reads out the No. key from the EPROM 223 and supplies it to the HDCP decoding circuit 235. The HDCP decoding circuit 235 uses the encryption key to decode the image signal received by the DVI receiver interface circuit 237. The decoded image signal is displayed on the liquid crystal panel 240 under the control of the timing controller 24 1.

In such an image transmission system, the secret key must not be known by an unspecified majority of the {@} symbols including the public key and the secret key stored in the EE PROM 222 of the receiver 200. Therefore, an EDID that can be freely read by a personal computer or the like and an encryption key for which reading must be restricted cannot be stored in the same EPROM. For this reason, conventionally, only the EDID is stored in the serial EPROM 221, which is connected to the signal line for the DDC, and a separate EPROM 222 is provided for storing the encryption key. The decoding LSI 230 that decodes the image signal reads the encryption key by controlling the EEP ROM 222, and provides only the public key to the signal line for DDC in response to a request from a personal computer or the like. I was

By the way, although the EE PROM 222 that stores the encryption key is not connected to the SCL terminal 54 and the SDA terminal 55 that are DDC terminals, Since it is a general-purpose EEPROM, its contents can be easily read by using a ROM reader / writer. Therefore, if the encryption key is stored in the EE PROM 222 as plain text, there is a general risk that the contents will be revealed. In order to prevent the encryption key from being read, a method has been proposed in which the space between the EE PROM 222 and the decryption LSI 230 is sealed with a mold resin or the like.

However, even if such a method is adopted, two EEPROMs, an EEPROM for storing the ED ID and an EPROM for storing the key, are still required, and the cost associated with the increase in the number of parts is increased. Rising is inevitable. In addition, since two types of information, the ED ID and the encryption key, must be stored separately in each EE PROM, the process of storing the information and the test process become complicated in the manufacturing process of the receiver. It was costly. Furthermore, if the key is written in plain text in the EEPROM and sealed with resin or the like so that it cannot be read, the EEPROM can be rewritten even if it becomes necessary to rewrite the EEPROM due to a failure or the like. There was a disadvantage that it became impossible. DISCLOSURE OF THE INVENTION Therefore, in view of the above, a first object of the present invention is to reduce the number of components used in a receiving device such as a receiver for receiving an encrypted image signal. Another object of the present invention is to provide a semiconductor integrated circuit capable of writing information in a nonvolatile memory again after completion of hardware. A second object of the present invention is to provide a semiconductor integrated circuit capable of improving security in a transmitting device that transmits an image signal to a receiving device. Further, a third object of the present invention is to provide a receiving-side device using the above-described semiconductor integrated circuit for reception. You. In addition, a fourth object of the present invention is to realize an image providing method using a receiver.

In order to solve the above problems, a semiconductor integrated circuit according to a first aspect of the present invention is a semiconductor integrated circuit for use in a device that receives an encrypted image signal, and includes a semiconductor integrated circuit, An interface circuit for communication, and first information transmitted to the outside by the interface circuit, and second information used for decrypting the encrypted image signal, and Z or And a memory control circuit for controlling the nonvolatile memory to read.

Further, a semiconductor integrated circuit according to a second aspect of the present invention is a semiconductor integrated circuit for use in a device for receiving an encrypted image signal, wherein the semiconductor integrated circuit has an encrypted image stored in a nonvolatile memory. An encryption key decryption circuit for decrypting the encryption key, and an image signal decryption circuit for decrypting the image signal using the encryption key decrypted by the encryption key decryption circuit are provided. .

Further, a semiconductor integrated circuit according to a third aspect of the present invention is a semiconductor integrated circuit for use in a device that encodes an image signal and transmits the signal to a device on the receiving side, and performs predetermined signal processing on the image signal. An image processing circuit to be applied, a selection circuit for selecting one of an image signal to which predetermined signal processing has not been applied and an image signal to which predetermined signal processing has been applied, and an image selected by the selection circuit A decision is made as to whether or not to authenticate the receiving device based on an encryption circuit for encrypting the signal and the encryption key received from the receiving device. The control circuit controls the selection circuit and the encryption circuit so as to encrypt and output the image signal which has not been subjected to the signal processing of the image processing, and if the receiving apparatus is not authenticated, the image subjected to the predetermined signal processing is Do not encrypt the signal In comprising a control circuit for controlling the selection circuit and the encryption circuit to output. A receiving-side device according to one aspect of the present invention is a device that receives an encrypted image signal, wherein the first device performs serial communication with the outside, and a second device that receives the encrypted image signal. Non-volatile memory for storing second means, first information transmitted to the outside by the first means, and second information used to decode the image signal received by the second means; One aspect of the present invention, comprising: a memory device; and third means for decoding the image signal received by the second means using the second information stored in the nonvolatile memory. An apparatus for receiving an encrypted image signal, comprising: a first means for performing serial communication with the outside; a second means for receiving an encrypted image signal; and a non-volatile memory. Using the first means. Inputting the first information about the device and the second information used for decoding the image signal received by the second means to the device by performing serial communication with the device (a) And a step (b) of writing the first and second information input in the step (a) to the nonvolatile memory.

An image providing method according to one aspect of the present invention includes first means for inputting an encryption key, and second means for receiving an encrypted image signal, and receiving an encrypted image signal. Providing an image using a receiver that displays an image by using the encryption key input to the receiver by the first means, based on the encryption key input to the receiver by the first means. (A) determining whether or not to authenticate the receiver based on the encryption key; and if the receiver is authenticated in step (a), the image signal received by the second means is converted to a first signal. (B) decoding using the encryption key input to the receiver by the means, and displaying an image based on the decoded image signal. According to the present invention, in the semiconductor integrated circuit for reception, since the EDID and the encryption key are stored in one non-volatile memory, it is possible to reduce the number of components used in a device on the receiving side such as a receiver. At the same time, it is possible to simplify the information writing process and the test process in the manufacturing process of the receiving device. Also, since the information can be written to or rewritten in the nonvolatile memory after the hardware is completed, manufacturing of the receiving device is easy, and even if a failure occurs after shipment, the receiving device can be repaired. Can be. Further, by using the receiver having the first means for inputting the encryption key, it is possible to realize an image providing method for providing an image only to a specific user having the encryption key.

Further, according to the present invention, in the semiconductor integrated circuit for transmission, it is determined whether or not to authenticate the device on the receiving side. If the device is not authenticated, processing such as deteriorating the image quality is performed. It can improve security without needing help. BRIEF DESCRIPTION OF THE FIGURES

The advantages and features of the present invention will become apparent when considered in conjunction with the following detailed description and the drawings. In these figures, the same reference numbers refer to the same components.

FIG. 1 is a block diagram showing a conventional image transmission system using a receiver.

FIG. 2 is a block diagram showing an image transmission system using the receiving device according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing an image transmission system using a modification of the receiving-side device according to the first embodiment of the present invention.

FIG. 4 shows a non-volatile device in the receiving-side device according to the first embodiment of the present invention. 5 is a flowchart showing an operation of writing an EDID to a functional memory. FIG. 5 is a flowchart showing an operation of writing an encryption key into a non-volatile memory in the device on the receiving side according to the first embodiment of the present invention.

FIG. 6 is a flowchart showing a method for providing an image using the receiving device according to the first embodiment of the present invention.

FIG. 7 is a block diagram showing an image transmission system using a device on the receiving side according to the second embodiment of the present invention.

FIG. 8 is a flowchart showing a method for providing an image using the receiving device according to the second embodiment of the present invention.

FIG. 9 is a block diagram showing an image transmission system using the device on the transmission side according to the first embodiment of the present invention.

FIG. 10 is a block diagram showing an image transmission system using a device on the transmission side according to the second embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION

FIG. 2 is a block diagram showing an image transmission system using the device on the receiving side according to the first embodiment of the present invention. In the following embodiments, a case will be described in which a receiver having a display device such as a liquid crystal panel is used as a receiving device. May be connected.

As shown in FIG. 2, the image transmission system includes a host computer 100 and a receiver 300. The receiver 300 holds an encryption key according to the HDCP scheme. The encryption key includes a public key notified from the receiver 300 to the personal computer 100 by the DDC and a secret key that must not be known to an unspecified majority.

Host computer 100 generates image signals for high-speed drawing A graphic accelerator 11 and an encryption LSI 10. The encryption LSI 10 includes a storage unit 12 for storing an encryption key, an HDCP decoding circuit 13 for encrypting an image signal using the encryption key stored in the storage unit 12, and a DV I / O. And a DVI transmitter interface circuit 14 for transmitting an image signal in accordance with the standard. .

The host computer 100 is connected to a receiver 300 via a DVI cable 50 including an SCL signal line 51, an SDA signal line 52, and an image signal line 53.

The receiver 300 is composed of an EPPROM 20 as a non-volatile memory for storing the ED ID and an encryption key, and a semiconductor integrated circuit for decrypting an image signal encoded by the HDCP method using an encryption key. (Decryption LSI) 30, a liquid crystal panel 40 as a device that displays an image based on the decoded image signal, and a timing controller 4 that controls the timing of inputting the image signal to the signal line of the liquid crystal panel. Includes 1 and. As the non-volatile memory, a general PROM, an SRAM with a built-in battery, and the like can be used in addition to a serial EEPROM, a parallel EEPROM, and a flash EPROM. In addition to the LCD panel 40, devices for displaying images include PDPs (plasma display panels) and CRTs (cathode ray tubes).

The decryption LSI 30 includes a master interface circuit 31 for controlling the EEPROM 20, an encryption key decryption circuit 32, an encryption key encryption circuit 33, a cache memory 34, and an interface for transmitting and receiving an encryption key and the like. It has a face circuit 36, an HDCP decoding circuit 35 for decoding image signals, and a DVI receiver interface circuit 37 for receiving image signals. Note that the decoding LSI 30 may include a nonvolatile memory such as the EEPROM 20. Or 110? Decoding circuit 3 5 Alternatively, the DVI receiver interface circuit 37 and other circuits may be formed in separate semiconductor integrated circuits.

The interface circuit 36 controls transmission and reception of information such as an ED ID and a No. key. Also, the interface circuit 36 operates as a slave device in communication using the I ² C path method. The interface circuit 36 is connected to the SCL terminal 54 and the SDA terminal 55, and transmits and receives signals to and from the outside via the SCL signal line 51 and the SDA signal line 52.

The cache memory 34 temporarily stores information to be written to the EE PROM 20 and temporarily stores information read from the EE PROM 20. As the cache memory 34, a static random access memory (SRAM) is used.

The encryption key encryption circuit 3 encrypts the encryption key input in plain text. The encrypted key code is stored in the EEP ROM 20 by the master interface circuit 31. When the encrypted encryption key is input to the decryption LSI 30, the encryption key encryption circuit 33 is unnecessary.

The encryption key decryption circuit 32 decrypts the encrypted encryption key into plaintext. The decrypted encryption key is used when decrypting the encrypted image signal.

The master interface circuit 31 controls transmission and reception of signals to and from the EEPR @ M 20, and writes and reads information to and from the EEPROM 200. The master interface circuit 31 compares the information to be written to the EEPROM 20 with the information to be written to the EEPROM 20 (verify), and sets an operation mode for improving the reliability of the contents written to the EEPROM 20. Have. This operation mode can be set in the test mode of the decryption LSI 30. When the encrypted encryption key is stored in the EEPROM 20, the encryption key decryption circuit 32 decrypts the encrypted encryption key into plain text, and the master interface circuit 31 decrypts the encrypted encryption key. The encrypted encryption key is compared with the entered key. The master interface circuit 31 calculates an error detection code or an error correction code and verifies the information written to the EE PROM 20 to check whether the information has been correctly written to the EE PROM 20. May be.

Alternatively, as shown in FIG. 3, in the receiver 400, a microcomputer 61 having a built-in flash and an EPROM 62 may be used. The microcomputer 61 transmits and receives signals to and from the interface circuit 36 or the cache memory 34, and writes and reads information to and from the built-in EEPOM 62. In that case, it is not necessary for the decoding LSI 60 to incorporate a master interface circuit.

Referring to FIG. 1 again, the HDCP decryption circuit 35 decrypts the image signal received by the DVI receiver interface circuit 37 using the encryption key according to the HDCP scheme.

The DV interface receiver circuit 37 is connected to the image terminal 56 and receives a digital image signal via the image signal line 53. The DVI receiver interface circuit 37 conforms to the DVI standard.

For three image signal channels, RGB (red, green, and blue), serial data transmitted after being encoded is converted into parallel data.

In communication using the I ² C path, slave addresses are assigned to each slave device. For example, generally, for transmission and reception of ED ID, an address “A0h” is assigned for reading and an address “Alh” is assigned for writing. Also, by HD CP method The receiver is assigned address “76 h” for reading and address “77 h” for writing. The interface circuit 36 in the present embodiment includes the slave address “7 Ah” and the slave address “7 Bh” assigned to the receiver according to the HDCP system, as well as the slave address assigned to the ED ID response. It is designed to respond when "A0h" and "A lh" are specified.

On the other hand, transmitters using the HDCP system used on the host side of the receiver include the address “78h” and “79hj” for transmission and reception of key codes and the like according to the HDCP system, and the physical layer of the transmitter. Addresses Γ70 h ”and“ 71 h ”are allocated for the setting of.

Next, an operation of writing an EDID according to the DDC standard in the receiving apparatus according to the present embodiment will be described with reference to FIGS. In the EE PROM 20 that stores EDID, it is common to use a VSYNC signal (vertical synchronizing signal), which is one of the image control signals, to prevent the malfunction. Also in the present embodiment, the VSYNC signal is used in conjunction with the control of writing and reading of EDID.

FIG. 4 is a flowchart showing an operation of writing an EDID to the nonvolatile memory in the receiving apparatus according to the present embodiment. This write operation is performed after the hardware of the receiving device is completed.

In step S101, when an external device such as the host computer 100 transmits EDID by specifying the slave address A1h, the decoding LSI 30 of the receiver 300 receives the SCL terminal 54 and the SDA terminal 55 The ED ID is received using.

In step S102, the interface circuit 36 stores the received ED ID in the cache memory 34. In step S103, the master interface circuit 31 writes the content stored in the cache memory 34 into the EEPROM 20. Alternatively, the master interface circuit 31 may write the EDID to the EEPROM 20 in parallel while reading the EDID from the cache memory 34.

Next, an operation of writing an encryption key by the HDCP method in the receiving apparatus according to the present embodiment will be described with reference to FIGS. FIG. 5 is a flowchart showing an operation of writing an encryption key according to the HDCP method into the nonvolatile memory in the receiving apparatus according to the present embodiment. This write operation is also performed after the hardware of the receiving device is completed.

In step S201, when an external device such as the host computer 100 transmits the encryption key by specifying the slave address 77h, the decryption LSI 30 of the receiver 300 sends the SCL terminal 5 4 And the encryption key is received using SDA terminal 55.

In step S202, the interface circuit 36 temporarily stores the received encryption key in the cache memory 34.

In step S203, the decryption LSI 30 determines whether encryption is necessary for the encryption key stored in the cache memory 34. That is, if the encryption key is stored as plain text in EEPR @ M20, the encryption key may be leaked in general. In order to store the encryption key with high reliability, the receiver manufacturer can encrypt the encryption key and store it in the EEPROM 20. For this encryption, an encryption key encryption circuit 33 built in the decryption LSI 30 may be used, or a previously encrypted encryption key may be transmitted to the decryption LSI 30. May be. If the encryption key is to be encrypted in the decryption LSI 30, the encryption key encryption circuit 33 encrypts the encryption key in step S20, and then proceeds to step S205. By setting the mode for encrypting the encryption key in this way, the encryption key can be stored in the receiver with high reliability.

Here, in the encryption of the 鍵 key, an encryption strength equal to or higher than the encryption strength of the image signal encryption is required. In addition, a method that is difficult to be understood by general users is used as a method of shifting to a mode in which an encryption key is encrypted, and by not disclosing the method, the encryption algorithm can be kept secret. For example, when a special command is input to the decryption LSI 30, the encryption key encryption circuit 33 may be activated to shift to the encryption key encryption mode. Even for such special commands, security equal to or greater than the encryption strength when encrypting image signals is required.

On the other hand, when an encryption key that has been encrypted in advance is received, or when an encryption key that does not have high security and can be stored as plain text is received, the process directly proceeds to step S205. In step S205, the master interface circuit 31 writes the encryption key to the EE PROM 20.

Note that the data format used when writing the ED ID and the encryption key to the EE PROM 20 may be any data format that can be read by the decryption LSI 30, and is different from the one defined in the DDC standard. No problem. For example, a data format including an error detection code or an error correction code may be used.

According to this embodiment, the EEPROM for storing the ED ID and the encryption key described above can be integrated into one. In addition, HDCP By encrypting the encryption key, there is no need to mold the EE PRO M20 in which the encryption key is stored and the decryption LSI 30 with a mold. In the manufacturing process of the receiver, writing of the EDID and the signal key can be performed using the SCL terminal 54 and the SDA terminal 55 after the hardware is completed. If a defect is found in the contents of the EEPROM 20 after the receiver is shipped, the ED ID and encryption key can be written as a repair work.

Next, a method for providing an image using the receiving device according to the present embodiment will be described with reference to FIGS. FIG. 6 is a flowchart showing a method for providing an image using the receiving device according to the present embodiment.

First, in step S301, the power of the receiver 300 is turned on. In step S401, the power of the host computer 100 is turned on. When the power of the receiver 300 is turned on, the receiver 300 is turned on. Reads the ED ID and the encryption key written in the EE PROM 20 in the step S302, stores them in the cache memory 34, and prepares to respond to the request from the host computer 100. This preparation operation may be performed not only at the time of turning on the power but also under control of a microcomputer or the like.

In step S402, the host computer 100 requests the transmission of the ED ID by designating the addresses A0h and A1h of the ED ID through the SCL terminal 54 and the SDA terminal 55. In response, in step S303, the receiver 300 uses the information stored in the cache memory 34, and through the interface circuit 36, as if the decoding LSI 30 were dedicated to the ED ID. It acts as if it were an EE PROM and sends the ED ID to the host computer 100. Host In step S403, the computer 100 receives the ED ID and decodes information about the receiver 300.

Note that the decoding LSI 30 of the receiver 300 is supplied from the host computer 100 via the DVI cable when the host computer 100 requests transmission of the ED ID even if the power is not turned on. It must be powered by an external power supply and send an ED ID. Generally, the host computer supplies a power supply voltage of 5 V, but the operating voltage of the decrypted LSI is 3.3 V, and a step-down circuit is required in the receiver. Also, the available current is approximately 50 mA, and this current value will be exceeded if the decoding LSI is operated at full capacity. Therefore, in order to transmit EDID when the power of the receiver is not turned on, it is necessary to consider current consumption.

The receiver 300 determines in step S304 whether the encryption key has been encrypted. That is, when the encryption key is read from the EEPROM 20, the decryption LSI 30 of the receiver 300 automatically recognizes whether or not the encryption key is encrypted. If it is determined that the encryption key is encrypted, in step S305, the encryption key decryption circuit 32 decrypts the encryption key. In step S306, the decrypted encryption key is stored in the cache memory. Save to 34. On the other hand, if it is determined that the encryption key has not been encrypted, the encryption key is stored in the cache memory 34 in step S306.

When the host computer 100 requests information such as a public key in the HDCP scheme using the SCL terminal 54 and the SDA terminal 55 in step S404, the receiver 300 in step S307 executes the cache The information such as the public key is transmitted to the host computer 10 via the interface circuit 36 by using the information stored in the memory 34. This Here, the interface circuit 36 does not transmit the secret key according to the HDCP scheme to the host computer 100 in plain text, and reduces the risk that the secret key according to the HDCP scheme is made public.

Upon receiving the public key from the receiver 300 in step S405, the host computer 100 determines whether or not to authenticate the receiver 300 based on the public key in step S406. To determine Specifically, the host computer 100 performs an operation using a random number and a secret key based on the received public key and the host-side public key, and if the operation results match, the image is received. Authenticate machine 300.

When the receiver 300 is authenticated, the host computer 100 encrypts the image signal in step S407, and in step S408, converts the encrypted image signal. Transmit to receiver 300.

The receiver 300 receives the encrypted image signal in step S308. That is, the DVI receiver interface circuit 37 receives the digital image signal of each of the RGB channels transmitted as serial data via the image signal line 53, and converts the digital image signal into parallel data. Next, in step S309, the HDCP decryption circuit 35 of the decryption LSI 30 uses the HDCP-method key stored in the cache memory 34 to encrypt the parallel data. Is decrypted.

In step S310, the decoded digital image signal is output to the liquid crystal panel 40 via the timing controller 41, and an image is displayed.

In the present embodiment, as an example of information used for transmitting an image signal, an encryption key used for encrypting and decrypting the image signal has been described. However, the information used when transmitting and receiving image signals is not limited to encryption keys. The information may be information for setting the receiver in an optimal state in order to perform the operation. Such information includes image output timing setting information, PLL (phase locked loop) setting information, information used for image size and color correction, and the like.

Next, a receiving-side device according to a second embodiment of the present invention will be described. The receiving-side apparatus according to the present embodiment further includes means for externally inputting information such as an encryption key.

FIG. 7 is a block diagram showing an image transmission system using a device on the receiving side according to the second embodiment of the present invention. Here, as a means for externally inputting information such as an encryption key, a receiver / writer 21 for reading / writing an IC card is provided in the receiver 500. When the IC card on which a predetermined key is recorded is inserted into the receiver 300, the master-interface circuit 38 of the decryption LSI 70 takes precedence over the EEPROM 20 and the card reader Z writer. The encryption key read by 21 is stored in the cache memory 34. Other configurations are the same as those of the receiving-side device according to the first embodiment of the present invention.

As a means for externally inputting information such as an encryption key, an infrared detection unit for reading information from a signal transmitted by an infrared remote control may be provided instead of the card reader / writer 21. good. In this case, the viewer can input information such as an encryption key to the receiver by operating the remote controller or the like.

Next, a method for providing an image using the receiving device according to the present embodiment will be described with reference to FIGS. 7 and 8. FIG. According to this image providing method, of the monitors (receivers) connected to a set-top box or the like having the same function as the host computer, only the monitor to which a specific encryption key is supplied is provided. Enables output of images. FIG. 8 is a flowchart illustrating a method for providing an image using the receiving device according to the present embodiment. .

First, in step S501, the viewer promises to pay a fee for the desired content and a fee to the content provider such as image information. In response, in step S601, the provider distributes the IC card in which the public key has been written to the viewer. In step S602, the provider transmits the content for such a viewer.

When the viewer inserts the IC card into the monitor in step S502, in step S503, the set-top box reads the public key written on the IC card and converts it into a public key. Based on this, it is determined whether to authenticate this monitor. When the monitor is authenticated, in step S504, the transmitted content is received by the monitor and displayed on the monitor screen. Here, for details of the operation in step S503 and step S504, see the operation shown in steps S302 to S310 and step S402 to 408 in FIG. The same is true. According to this method of providing images, only the viewers who paid for the contents can receive the contents.

In this image providing method, an IC card is used as a medium for inputting a public key, but a viewer may transmit a public key to a monitor using a numeric keypad provided in a remote controller of a receiver. Alternatively, the public key may be input to the monitor using the game console and the OSD (open software script). In addition, a small content provider or viewer may distribute the public key using a telephone line.

Next, a transmitting-side device according to the first embodiment of the present invention will be described. Until now, HDCP technology has been used in personal computers. It was assumed that In order for a personal computer to encrypt and transmit image signals, the public key is communicated between the DVI transmitter interface circuit of the personal computer and the DVI receiver interface circuit of the monitor. You must decide whether to authenticate the monitor. After that, the personal computer starts encrypting the image signal, and the monitor starts decrypting the image signal. This series of control operations is called HDCP downstream.

Here, the personal computer does not need to encrypt the image signal when a word processor or spreadsheet software is running, but needs to encrypt the image signal only when playing a DVD disc. Occurs. If the monitor does not support the HDCP system, it must perform processing such as displaying a DVD disk that cannot be played back, and performing playback with reduced image quality. Such control operation is performed in cooperation with the operation software and the HDCP control circuit built in the graphic accelerator, and is called an HDCP-type up stream.

As described above, in the conventional transmitting-side device, transmission control of an image signal cannot be performed only by the transmitting-side encryption LSI and the receiving-side decryption LSI, and the assistance of external software is required. There was a problem with security. The transmitting device according to the present embodiment has solved such a problem.

FIG. 9 is a block diagram showing an image transmission system using the device on the transmission side according to the first embodiment of the present invention. The device on the receiving side is the same as the receiver 300 shown in FIG. The transmitting device 600 is stored in an image signal reproducing circuit 601 for reproducing an image signal from a DVD disk or the like, a storage unit 602 for storing an encryption key, and a storage unit 602. Use the encryption key And an encryption LSI 80 for encrypting the image signal reproduced by the image signal reproducing circuit 600 and transmitting the encrypted image signal to the receiver 300.

The encryption LSI 80 includes an image processing circuit 81 that performs predetermined signal processing on the image signal, an image signal output from the image signal reproduction circuit 61, and an image signal output from the image processing circuit 81. A selection circuit 82 for selecting one of the following; an encryption circuit 83 for encrypting the image signal selected by the selection circuit 82; and a physical for transmitting the image signal encrypted by the encryption circuit 83. A layer circuit 84 and an encryption control circuit 85 are built in.

The encryption control circuit 85 determines whether or not to authenticate the device on the receiving side based on the received encryption key.If the device on the receiving side is authenticated, predetermined signal processing is performed. The selection circuit 82 and the encryption circuit 83 are controlled so as to encrypt and output an image signal that does not exist, and if the device on the receiving side is not authenticated, the image signal on which predetermined signal processing has been performed is processed. The selection circuit 82 and the encryption circuit 83 are controlled so as to output without encryption.

Next, the operation of the transmission-side device according to the present embodiment will be described in detail. When the transmission-side device 600 is powered on, the encryption control circuit 85 is connected to the power supply line 57 of the DVI cable 50. Power is supplied to some circuits of the receiver 300 via the, and EDID is read from the EEPROM of the receiver 300. As a result, an optimal image signal for the receiver 300 can be known. If EDID cannot be read, or if it is determined that the receiver does not support HDCP even though EDID can be read, the encryption control circuit 85 cannot transmit the content that requires protection. Judge. When the encryption control circuit 85 determines that the receiver 300 supports the HDCP system, the encryption control circuit 85 controls the encryption circuit 83 and the HDCP decryption circuit of the receiver 300 to use the HDCP system. Start authentication of the receiver. In particular, The encryption control circuit 85 performs an operation using a random number and a secret key based on the received public key and the host-side public key, and authenticates the receiver when the operation results match.

When the receiver is authenticated, the encryption control circuit 85 controls the selection circuit 82 so as to select the image signal output from the image reproduction circuit 61, and the encryption circuit 83 transmits the image signal to the encryption circuit 83. Start encryption. Note that the encryption control circuit 85 detects whether or not the power of the receiver 300 is turned on by the hot plug signal line 58, and until the power of the receiver 300 is turned on. The transmission of the image signal may not be performed.

On the other hand, if the authentication of the receiver is not completed within the predetermined time, the encryption control circuit 85 activates the image processing circuit 81 and converts the image signal output from the image processing circuit 81. The selection circuit 82 is controlled so as to make a selection, and the encryption circuit 83 outputs the image signal as plain text. The image processing circuit 81 performs processing to lower the resolution of the input image signal, performs processing to mix noise into the input image signal, and indicates that the content cannot be transmitted in place of the input image signal. For example, an image signal representing the comment of the above is output. As a result, if the receiving device is not authenticated, a low-quality image that does not need to be protected is displayed on the screen of the receiver 300, or a comment indicating that the content cannot be transmitted is displayed. Or you can.

Next, a transmitting-side device according to a second embodiment of the present invention will be described. In the present embodiment, the selection circuit is arranged after the encryption circuit, which is different from the device shown in FIG.

FIG. 10 is a block diagram showing an image transmission system using a transmission-side device according to the second embodiment of the present invention. The device on the receiving side is the same as the receiver 300 shown in FIG. The encryption LSI 90 included in the transmitting device 700 includes an encryption circuit 91 for encrypting the image signal output from the image reproduction circuit 61, and an encryption circuit 91 for encrypting the image signal output from the image reproduction circuit 61. An image processing circuit 92 that performs predetermined signal processing on the output image signal, and one of an image signal output from the encryption circuit 91 and an image signal output from the image processing circuit 92 is selected. And a physical layer circuit 94 for transmitting the image signal selected by the selection circuit 93, and an encryption control circuit 95.

The encryption control circuit 95 determines whether to authenticate the receiver 300 based on the received encryption key, and if the receiver 300 is authenticated, performs predetermined signal processing. The selection circuit 93 is controlled so as to encrypt and output the unprocessed image signal. If the receiver 300 is not authenticated, the image signal subjected to the predetermined signal processing is not encrypted. The selection circuit 93 is controlled so as to output with.

Next, the operation of the transmitting apparatus according to the present embodiment will be described in detail. When the encryption control circuit 95 determines that the receiver 300 supports the HDCP system, the encryption control circuit 95 Controls the HDCP decryption circuit of the device 300 to start HDCP-based receiver authentication. When the receiver is authenticated, the encryption control circuit 95 causes the encryption circuit 91 to start encrypting the image signal output from the image reproduction circuit 61 and outputs the image signal from the encryption circuit 91. The selection circuit 93 is controlled so as to select an image signal to be output.

On the other hand, if the authentication of the receiver is not completed within the predetermined time, the encryption control circuit 95 activates the image processing circuit 9 2 ′, and the image signal output from the image processing circuit 9 2 The selection circuit 93 is controlled so as to select. As a result, if the receiving device is not authenticated, a low-quality image that does not need to be protected is displayed on the screen of the receiver 300, or the content is not displayed. It is possible to display a comment indicating that the message cannot be sent. As described above, the present invention has been described based on the embodiment. However, the present invention is not limited to the above embodiment, and can be freely modified and changed within the scope described in the claims. . Industrial applicability

INDUSTRIAL APPLICABILITY The present invention is used in a device on the transmission side such as a computer that encrypts and transmits an image signal, and a device on the reception side such as a monitor and a projector that receives and decrypts the encrypted image signal. Is possible. Further, the present invention can be used in a business of providing an image using such a receiver.

Claims

The scope of the claims

1. A semiconductor integrated circuit for use in a device for receiving an encrypted image signal,

An interface circuit for performing serial communication with the outside;

Non-volatile memory for writing and / or reading first information transmitted to the outside by the interface circuit and second information used for decoding an encrypted image signal A memory control circuit for controlling the

A semiconductor integrated circuit comprising:

2. The semiconductor integrated circuit according to claim 1, wherein the first information includes extended display identification data (EDID) regarding the device.

3. The semiconductor integrated circuit according to claim 1, wherein the second information includes an encryption key used to decrypt an image signal.

4. The semiconductor integrated circuit according to claim 3, further comprising an encryption key decryption circuit for decrypting the encrypted encryption key stored in the nonvolatile memory.

5. The semiconductor integrated circuit according to claim 4, further comprising an encryption key encryption circuit for encrypting an encryption key supplied from outside.

6. The semiconductor integrated circuit according to claim 5, wherein the encryption key encryption circuit encrypts the encryption key with an encryption strength equal to or greater than the encryption strength of the image signal.

7. The semiconductor integrated circuit according to claim 5, wherein the encryption key encryption circuit is activated when a predetermined command is input to the semiconductor integrated circuit.

8. The memory control circuit calculates an error detection code or an error correction code and checks the information written to the nonvolatile memory to check whether the information has been correctly written to the nonvolatile memory. Do The semiconductor integrated circuit according to claim 1.

9. The semiconductor integrated circuit according to claim 1, further comprising the nonvolatile memory.

10. The semiconductor integrated circuit according to claim 1, further comprising a memory for temporarily storing contents stored in the nonvolatile memory.

1 1. A receiving circuit for receiving an encrypted image signal,

2. The semiconductor integrated circuit according to claim 1, further comprising: an image signal decoding circuit that decodes an image signal received by the receiving circuit, using second information stored in the nonvolatile memory. .

12. The semiconductor integrated circuit according to claim 11, wherein the image signal decoding circuit decodes an image signal encrypted by a method compliant with HDCP (high bandwidth digital content protection).

13. A semiconductor integrated circuit for use in a device for receiving an encrypted image signal,

An encryption key decryption circuit for decrypting an encrypted encryption key stored in the nonvolatile memory;

An image signal decryption circuit for decrypting an image signal using the encryption key decrypted by the encryption key decryption circuit;

A semiconductor integrated circuit comprising: .

14. A semiconductor integrated circuit for use in a device that encrypts an image signal and transmits it to a receiving device,

An image processing circuit that performs predetermined signal processing on the image signal;

A selection circuit that selects one of an image signal that has not been subjected to predetermined signal processing and an image signal that has been subjected to predetermined signal processing;

An encryption circuit for encrypting the image signal selected by the selection circuit; It is determined whether or not to authenticate the receiving device based on the encryption key received from the receiving device.If the receiving device is authenticated, an image that has not been subjected to predetermined signal processing is determined. The selection circuit and the encryption circuit are controlled so as to encrypt and output the signal, and if the device on the receiving side is not authenticated, the image signal on which predetermined signal processing has been performed is not encrypted. A control circuit for controlling the selection circuit and the encryption circuit so as to output the selected data;

A semiconductor integrated circuit comprising:

15. A semiconductor integrated circuit for use in a device that encrypts an image signal and transmits it to a receiving device,

An encryption circuit for encrypting the image signal;

A selection circuit for selecting one of the encrypted image signal and the image signal subjected to predetermined signal processing;

It is determined whether or not to authenticate the receiving device based on the encryption key received from the receiving device, and if the receiving device is authenticated, predetermined signal processing has not been performed. The selection circuit is controlled so as to encrypt and output the image signal, and if the device on the receiving side is not authenticated, the image signal subjected to the predetermined signal processing is output without encryption. A control circuit for controlling the selection circuit;

A semiconductor integrated circuit comprising:

1 6. A device for receiving an encrypted image signal,

A first means for serial communication with the outside;

A second means for receiving the encrypted image signal;

First information transmitted to the outside by the first means, and second information used to decode the image signal received by the second means. A non-volatile memory for storing the information of (2);

A third means for decoding the image signal received by the second means using the second information stored in the non-volatile memory. '

17. The device of claim 16, wherein the non-volatile memory stores extended display identification data (EDID) for the device as first information. .

18. The device according to claim 16, wherein the non-volatile memory stores an encryption key used for decrypting an image signal as second information.

1 9. The non-volatile memory uses the encrypted encryption key as the second information.

19. The device according to claim 18, wherein the device further comprises encryption key decryption means for decrypting an encrypted key stored in the non-volatile memory.

20. The apparatus according to claim 19, further comprising an encryption key encrypting means for encrypting an externally supplied symbol key.

2 1. Non-volatile memory power Serial E EPROM (Electrically Erasable programmable read-only memory) 請求 ^-^

22. The apparatus according to claim 16, further comprising a microcomputer for controlling said nonvolatile memory.

23. The apparatus according to claim 16, further comprising a memory for temporarily storing contents stored in the nonvolatile memory.

24. The apparatus according to claim 16, wherein the third means decrypts the encrypted image signal in a manner compliant with HDCP (high bandwidth digital content protection).

25. An apparatus for receiving an encrypted image signal, the first means for inputting an encryption key,

A second means for receiving the encrypted image signal;

Third means for decrypting the image signal received by the second means, using the encryption key input by the first means,

An apparatus comprising:

26. The apparatus according to claim 25, wherein said first means reads information stored in an IC card.

27. The apparatus according to claim 25, wherein said first means reads information from a signal transmitted by an infrared remote controller.

28. Manufacture a device that has a first means for performing serial communication with the outside, a second means for receiving an encrypted image signal, and a non-volatile memory, and which receives an encrypted image signal. A way to

By performing serial communication using the first means, first information about the device and second information used to decode the image signal received by the second means are obtained. Step (a) for inputting to the device;

(B) writing the first and second information input in step (a) to the nonvolatile memory;

A method comprising:

29. The method of claim 28, further comprising the step of encrypting the second information between step (a) and step (b).

30. The method according to claim 28, further comprising the step of confirming the information written in said non-volatile memory in step (b) by performing serial communication using said first means.

3 1. The first means of serial communication with the outside, and the encrypted image signal A method for repairing a device for receiving an encrypted image signal, comprising: a second means for receiving the encrypted image signal;

By performing serial communication using the first means, first information about the device and second information used for decoding an image signal received by the second means are obtained. (A) inputting to the device;

Rewriting information stored in the non-volatile memory using the first and second information input in step (a).

32. The method of claim 31, further comprising the step of decoding the second information between step (a) and step (b).

33. A receiver having a first means for inputting an encryption key and a second means for receiving an encrypted image signal, and receiving the encrypted image signal and displaying an image. A method of providing an image using

(A) determining whether or not to authenticate the receiver based on the encryption key input to the receiver by the first means;

When the receiver is authenticated in step (a), the image signal received by the second means is decrypted using the encryption key input to the receiver by the first means, and the decryption is performed. (B) displaying an image based on the obtained image signal;

A method comprising: