WO2002019539A1 - Decodeur a sortie ponderee - Google Patents
Decodeur a sortie ponderee Download PDFInfo
- Publication number
- WO2002019539A1 WO2002019539A1 PCT/JP2001/007576 JP0107576W WO0219539A1 WO 2002019539 A1 WO2002019539 A1 WO 2002019539A1 JP 0107576 W JP0107576 W JP 0107576W WO 0219539 A1 WO0219539 A1 WO 0219539A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- information
- circuit
- reception value
- soft
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2903—Methods and arrangements specifically for encoding, e.g. parallel encoding of a plurality of constituent codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6566—Implementations concerning memory access contentions
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP01961290A EP1315302A4 (en) | 2000-08-31 | 2001-08-31 | SOFT-OUTPUT DECODER |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000-263120 | 2000-08-31 | ||
| JP2000263120A JP2002076933A (ja) | 2000-08-31 | 2000-08-31 | 軟出力復号装置及び軟出力復号方法、並びに、復号装置及び復号方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2002019539A1 true WO2002019539A1 (fr) | 2002-03-07 |
| WO2002019539A9 WO2002019539A9 (fr) | 2002-11-28 |
Family
ID=18750708
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2001/007576 Ceased WO2002019539A1 (fr) | 2000-08-31 | 2001-08-31 | Decodeur a sortie ponderee |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7180968B2 (ja) |
| EP (1) | EP1315302A4 (ja) |
| JP (1) | JP2002076933A (ja) |
| WO (1) | WO2002019539A1 (ja) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003174650A (ja) * | 2001-09-27 | 2003-06-20 | Canon Inc | 画像符号化装置、可変長符号化装置、制御装置およびそれらの方法 |
| US7137059B2 (en) * | 2002-11-20 | 2006-11-14 | Broadcom Corporation | Single stage implementation of min*, max*, min and /or max to perform state metric calculation in SISO decoder |
| US7089481B2 (en) * | 2002-07-22 | 2006-08-08 | Agere Systems Inc. | High speed arithmetic operations for use in turbo decoders |
| GB0229320D0 (en) * | 2002-12-17 | 2003-01-22 | Koninkl Philips Electronics Nv | Signal processing method and apparatus |
| DE602004018489D1 (de) * | 2003-05-16 | 2009-01-29 | Thomson Licensing | Demodulierung und wiederholungsdecodierung von mehrschichtigen signalen |
| JP4320661B2 (ja) * | 2003-06-30 | 2009-08-26 | 三菱電機株式会社 | 光受信装置および光受信方法 |
| TWI228654B (en) * | 2003-07-11 | 2005-03-01 | Mediatek Inc | Non-binary Viterbi data processing system and method |
| KR100723876B1 (ko) * | 2005-05-12 | 2007-05-31 | 한국전자통신연구원 | 멀티레벨변조신호 기반의 검파 장치, 반복 수신 장치 및이를 이용한 방법 |
| US7395461B2 (en) * | 2005-05-18 | 2008-07-01 | Seagate Technology Llc | Low complexity pseudo-random interleaver |
| US20070011557A1 (en) * | 2005-07-07 | 2007-01-11 | Highdimension Ltd. | Inter-sequence permutation turbo code system and operation methods thereof |
| US7797615B2 (en) * | 2005-07-07 | 2010-09-14 | Acer Incorporated | Utilizing variable-length inputs in an inter-sequence permutation turbo code system |
| US7856579B2 (en) * | 2006-04-28 | 2010-12-21 | Industrial Technology Research Institute | Network for permutation or de-permutation utilized by channel coding algorithm |
| US7386823B2 (en) * | 2005-07-20 | 2008-06-10 | Springsoft, Inc. | Rule-based schematic diagram generator |
| US7526715B2 (en) * | 2005-10-17 | 2009-04-28 | Ramot At Tel Aviv University Ltd. | Probabilistic error correction in multi-bit-per-cell flash memory |
| US7590925B2 (en) * | 2006-09-05 | 2009-09-15 | Mediatek Inc. | Apparatus and method for detecting puncture position in a symbol stream encoded by punctured convolutional coding scheme |
| US20080320365A1 (en) * | 2007-06-20 | 2008-12-25 | Texas Instruments Incorporated | Providing an initial syndrome to a crc next-state decoder independently of its syndrome feedback loop |
| US8271861B2 (en) * | 2008-05-09 | 2012-09-18 | Marvell International Ltd. | Symbol vector-level combining receiver for incremental redundancy HARQ with MIMO |
| US10022468B2 (en) * | 2009-02-02 | 2018-07-17 | Kimberly-Clark Worldwide, Inc. | Absorbent articles containing a multifunctional gel |
| US8516333B1 (en) * | 2009-11-19 | 2013-08-20 | Viasat, Inc. | Pre-interleaving for forward error correction codes |
| JP6632876B2 (ja) * | 2015-12-04 | 2020-01-22 | シナプティクス・ジャパン合同会社 | バッファメモリ装置及び表示駆動デバイス |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62243431A (ja) * | 1986-04-16 | 1987-10-23 | Hitachi Ltd | 最尤復号器 |
| JPH052842A (ja) * | 1991-06-25 | 1993-01-08 | Sony Corp | 軟判定復号回路 |
| JP2000068862A (ja) * | 1998-08-19 | 2000-03-03 | Fujitsu Ltd | 誤り訂正符号化装置 |
| EP1128589A1 (fr) * | 2000-02-14 | 2001-08-29 | Mitsubishi Electric Information Technology Centre Europe B.V. | Critère d'interruption pour un décodeur turbo |
| JP2001285084A (ja) * | 2000-03-31 | 2001-10-12 | Sony Corp | 符号化装置、符号化方法及び符号化プログラムが記録された記録媒体、並びに、復号装置、復号方法及び復号プログラムが記録された記録媒体 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5983384A (en) | 1997-04-21 | 1999-11-09 | General Electric Company | Turbo-coding with staged data transmission and processing |
-
2000
- 2000-08-31 JP JP2000263120A patent/JP2002076933A/ja not_active Withdrawn
-
2001
- 2001-08-31 WO PCT/JP2001/007576 patent/WO2002019539A1/ja not_active Ceased
- 2001-08-31 US US10/111,724 patent/US7180968B2/en not_active Expired - Fee Related
- 2001-08-31 EP EP01961290A patent/EP1315302A4/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62243431A (ja) * | 1986-04-16 | 1987-10-23 | Hitachi Ltd | 最尤復号器 |
| JPH052842A (ja) * | 1991-06-25 | 1993-01-08 | Sony Corp | 軟判定復号回路 |
| JP2000068862A (ja) * | 1998-08-19 | 2000-03-03 | Fujitsu Ltd | 誤り訂正符号化装置 |
| EP1128589A1 (fr) * | 2000-02-14 | 2001-08-29 | Mitsubishi Electric Information Technology Centre Europe B.V. | Critère d'interruption pour un décodeur turbo |
| JP2001285084A (ja) * | 2000-03-31 | 2001-10-12 | Sony Corp | 符号化装置、符号化方法及び符号化プログラムが記録された記録媒体、並びに、復号装置、復号方法及び復号プログラムが記録された記録媒体 |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP1315302A4 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US20030061003A1 (en) | 2003-03-27 |
| WO2002019539A9 (fr) | 2002-11-28 |
| EP1315302A4 (en) | 2007-05-23 |
| US7180968B2 (en) | 2007-02-20 |
| EP1315302A1 (en) | 2003-05-28 |
| JP2002076933A (ja) | 2002-03-15 |
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