WO2002017595A3 - Global network computers - Google Patents
Global network computers Download PDFInfo
- Publication number
- WO2002017595A3 WO2002017595A3 PCT/US2001/041849 US0141849W WO0217595A3 WO 2002017595 A3 WO2002017595 A3 WO 2002017595A3 US 0141849 W US0141849 W US 0141849W WO 0217595 A3 WO0217595 A3 WO 0217595A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- personal computer
- global network
- network computers
- network
- computers
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/02—Network architectures or network communication protocols for network security for separating internal from external traffic, e.g. firewalls
- H04L63/0209—Architectural arrangements, e.g. perimeter networks or demilitarized zones
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
- H04L69/329—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the application layer [OSI layer 7]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer And Data Communications (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001293215A AU2001293215A1 (en) | 2000-08-25 | 2001-08-23 | Global network computers |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US22766000P | 2000-08-25 | 2000-08-25 | |
US60/227,660 | 2000-08-25 | ||
US30882601P | 2001-08-01 | 2001-08-01 | |
US60/308,826 | 2001-08-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002017595A2 WO2002017595A2 (en) | 2002-02-28 |
WO2002017595A3 true WO2002017595A3 (en) | 2002-10-03 |
Family
ID=26921637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/041849 WO2002017595A2 (en) | 2000-08-25 | 2001-08-23 | Global network computers |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2001293215A1 (en) |
WO (1) | WO2002017595A2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006505846A (en) * | 2002-11-06 | 2006-02-16 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Storing BIOS in persistent system memory |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998026366A2 (en) * | 1996-11-29 | 1998-06-18 | Ellis Frampton E Iii | Global network computers |
WO1999032972A1 (en) * | 1997-12-19 | 1999-07-01 | Ellis Frampton E Iii | Firewall security protection of parallel processing in a global computer networking environment |
-
2001
- 2001-08-23 AU AU2001293215A patent/AU2001293215A1/en not_active Abandoned
- 2001-08-23 WO PCT/US2001/041849 patent/WO2002017595A2/en active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998026366A2 (en) * | 1996-11-29 | 1998-06-18 | Ellis Frampton E Iii | Global network computers |
WO1999032972A1 (en) * | 1997-12-19 | 1999-07-01 | Ellis Frampton E Iii | Firewall security protection of parallel processing in a global computer networking environment |
Non-Patent Citations (1)
Title |
---|
"Ein-Chip-Firewall: Der Sheriff kommt ins Haus", ELEKTRONIKNET, 31 March 1999 (1999-03-31), XP002164257 * |
Also Published As
Publication number | Publication date |
---|---|
WO2002017595A2 (en) | 2002-02-28 |
AU2001293215A1 (en) | 2002-03-04 |
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