[go: up one dir, main page]

WO2002043135A1 - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method Download PDF

Info

Publication number
WO2002043135A1
WO2002043135A1 PCT/JP2001/010097 JP0110097W WO0243135A1 WO 2002043135 A1 WO2002043135 A1 WO 2002043135A1 JP 0110097 W JP0110097 W JP 0110097W WO 0243135 A1 WO0243135 A1 WO 0243135A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor chip
resin coat
semiconductor device
stopper
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2001/010097
Other languages
French (fr)
Japanese (ja)
Inventor
Takeshi Ikeda
Hiroshi Miyagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NSC Co Ltd
Original Assignee
Nigata Semitsu Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nigata Semitsu Co Ltd filed Critical Nigata Semitsu Co Ltd
Publication of WO2002043135A1 publication Critical patent/WO2002043135A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H10W74/121
    • H10W42/20
    • H10W42/276
    • H10W70/68
    • H10W70/63
    • H10W72/931
    • H10W74/00
    • H10W90/754

Definitions

  • the present invention relates to a semiconductor device and a method for manufacturing the same, and is suitable for use in a device that generates electromagnetic waves, such as a television receiver, a radio receiver, or a mobile portable terminal.
  • a device that generates electromagnetic waves such as a television receiver, a radio receiver, or a mobile portable terminal.
  • the electronic components of these devices are composed of a circuit in which passive elements such as resistors, capacitors, and coils, and semiconductor chips are mounted on a substrate.
  • passive elements such as resistors, capacitors, and coils
  • semiconductor chips are mounted on a substrate.
  • research is being actively conducted to integrate the semiconductor chip itself and to mount the semiconductor chip and its peripheral circuits on a substrate at a high density.
  • an unnecessary electromagnetic field may be emitted from the circuit to the outside.
  • a high frequency circuit used in a television receiver or the like is mounted on a semiconductor chip
  • the peripheral circuit receives unnecessary noise of a high frequency component emitted from the semiconductor chip, the image quality of the television screen deteriorates. It can happen.
  • a high-frequency signal emitted from a semiconductor chip is affected by a peripheral circuit unit, so that sound quality of reproduced sound may be degraded.
  • the semiconductor chip when a circuit that generates an electromagnetic field is mounted on a substrate as a semiconductor chip, the semiconductor chip must be made of a conductive material in order to prevent the semiconductor chip from emitting an electromagnetic field that causes noise to the outside.
  • the creation of walls around the chip necessitates the need to electromagnetically shield the semiconductor chip.
  • FIGS. 1A and 1B are diagrams showing a configuration example of a semiconductor device having a plurality of semiconductor chips.
  • FIG. 1A is a perspective view of the semiconductor device, and FIG. FIG.
  • the semiconductor device shown in FIG. 1 has three semiconductor chips 3 mounted on one print substrate 1. These semiconductor chips 3 are electrically connected to the print substrate 1 by, for example, bonding wires 4. In addition, the respective semiconductor chips 3 are connected via wiring, peripheral circuits, and the like (not shown). Conventionally, for such a semiconductor device, each semiconductor chip 3 is electromagnetically shielded by covering the outer periphery of the semiconductor chip 3 with a metal case 2 as shown in FIG. 1 (b). . Further, there is a type in which each semiconductor chip 3 is electromagnetically shielded by partitioning a metal wall for each region where the individual semiconductor chips 3 are present on the print substrate 1.
  • FIG. 2 is a cross-sectional view illustrating another configuration example of the semiconductor device.
  • the semiconductor device shown in FIG. 2 has one semiconductor chip 3 mounted on one print substrate 1 and is connected to another circuit outside the substrate by wiring, for example.
  • the entire printed substrate 1 is covered with a metal case 2 in order to prevent an electromagnetic field generated from the semiconductor chip from being emitted to a circuit portion outside the substrate.
  • the entire printed circuit board 1 including the circuit 3 and its peripheral circuits was electromagnetically shielded.
  • a metal case is used to realize electromagnetic shielding. Therefore, in the case of a semiconductor device in which a plurality of semiconductor chips that generate an electromagnetic field are mounted on one substrate, it is necessary to provide a configuration in which a large wall is provided around each semiconductor chip. There is a problem that it is difficult to mount circuits and the like on a substrate at high density.
  • the present invention has been made to solve such a problem, and when forming an electromagnetic shield, a semiconductor chip constituting a semiconductor device and its peripheral circuits can be mounted at a high density. It is another object of the present invention to realize a further reduction in the size and thickness of a semiconductor device. Another object of the present invention is to reduce the manufacturing cost of a semiconductor device including a shield. Disclosure of the invention
  • the semiconductor device of the present invention is characterized in that a semiconductor chip is sealed with an insulating first resin coat, and the first resin coat is covered with a second resin coat containing a conductive material. I do.
  • a substrate on which at least one semiconductor chip is mounted, an insulating first resin coat sealing the semiconductor chip, and a conductive resin covering the first resin coat. And a second resin coat containing a material.
  • a concave or convex stopper for suppressing resin outflow is formed around a portion where the semiconductor chip is mounted.
  • the stopper is formed over the entire periphery of the semiconductor chip, and the wiring between the semiconductor chip mounted in the inner region of the stopper and the outer region of the stopper is formed in a plurality of layers. It may be performed via an intermediate wiring layer or a back wiring layer of the formed substrate.
  • the stopper may be discretely formed around the semiconductor chip.
  • the method for manufacturing a semiconductor device includes a first step of sealing a semiconductor chip with an insulating first resin coat; And a second step of covering with a second resin coat containing a conductive material.
  • a first step of forming a concave or convex stopper for suppressing resin outflow around a portion where a semiconductor chip is mounted on a substrate A second step of mounting the semiconductor chip in an inner region of the topper and electrically connecting the semiconductor chip to the substrate, and a second step of sealing the semiconductor chip mounted on the substrate with an insulating first resin coat. And a fourth step of covering the first resin coat with a second resin coat containing a conductive material.
  • the semiconductor chip can be electromagnetically shielded without providing a large metal case or wall around the semiconductor chip or the entire substrate.
  • the semiconductor chip and its peripheral circuits can be mounted at a high density, and the semiconductor device can be further reduced in size, weight, and thickness.
  • the shield can be formed only by performing double coating of the resin, and a troublesome process of mounting a metal case or the like on the substrate by soldering or the like is not required.
  • the manufacturing cost of the semiconductor device can be significantly reduced.
  • a concave or convex stopper for suppressing resin outflow is formed around a portion where the semiconductor chip is mounted, so that the viscosity is low and the fluidity is high. Even when the resin is coated, the resin can be uniformly coated to a predetermined shape and a predetermined size.
  • the stopper is formed over the entire periphery of the semiconductor chip, and the wiring between the semiconductor chip mounted in the inner region of the stopper and the outer region of the stopper is formed as an intermediate wiring of a substrate formed of a plurality of layers.
  • Layer or backside wiring In the case where the process is performed via a layer, wiring can be performed without providing an opening in the first and second resin coats, and the entire semiconductor chip can be reliably shielded.
  • the stopper is formed discretely around the semiconductor chip, it becomes possible to provide a wiring pattern between the stopper and the wiring between the semiconductor chip and its peripheral circuit portion is formed on the substrate. It is not necessary to use an intermediate wiring layer or the like, and the number of through holes and the number of stacked substrates can be reduced. As a result, the wiring can be simplified, and the device can be further reduced in size, weight, and thickness.
  • FIG. 1 is a cross-sectional view illustrating a configuration example of a conventional semiconductor device.
  • FIG. 2 is a cross-sectional view showing another configuration example of the conventional semiconductor device.
  • FIG. 3 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the first embodiment.
  • FIG. 4 is a diagram illustrating a configuration example of the stove according to the first embodiment, and is a plan view of the semiconductor device according to the present embodiment.
  • FIG. 5 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the second embodiment.
  • FIG. 6 is a diagram illustrating a configuration example of the stopper according to the second embodiment, and is a plan view of the semiconductor device according to the present embodiment.
  • FIG. 7 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the third embodiment.
  • FIG. 3 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the first embodiment.
  • the semiconductor chip 3 mounted on the uppermost layer of the printed board 1 is electrically connected to the electrodes 5 on the printed board 1 by, for example, bonding wires 4.
  • the semiconductor chip 3 and the bonding tracker 4 are entirely made of an insulating first resin coat 6 so as to protect them from dust and moisture and to be insulated from external shocks and vibrations. It is sealed.
  • the outside of the first resin coat 6 is covered with a conductive material, for example, a second resin coat 7 containing ferrite or other metal powder.
  • a conductive material for example, a second resin coat 7 containing ferrite or other metal powder.
  • the second resin coat 7 is formed so as to completely cover the semiconductor chip 3.
  • the semiconductor chip 3 is electromagnetically shielded by the second resin coat 7. can do.
  • the electromagnetic waves emitted from the semiconductor chip 3 are shielded by the second resin coat 7 to prevent them from being emitted as high-frequency noise to the outside, thereby suppressing image disturbance and noise. it can.
  • the second resin coat 7 it is possible to prevent an electromagnetic wave emitted outside from penetrating the second resin coat 7 and entering the inside of the semiconductor chip 3.
  • the first resin coat 6 and the second resin coat 7 it is necessary to prevent the resin from flowing out more than necessary.
  • a method of controlling this by adjusting the viscosity of the resin may be considered, but in the present embodiment, in order to be able to cope with a resin of any viscosity, on the printed circuit board 1, A stopper 10 composed of a concave depression is provided around a portion where the semiconductor chip 3 is mounted. By providing the stopper 10 in this way, the filled resin is prevented from flowing out of the stopper 10, and the first resin coat 6 and the second resin coat 7 are removed by the stopper 10. It can be formed in a prescribed prescribed shape and a prescribed size. At this time, the first resin coat 6 and the second resin coat 7 can be formed to have a desired thickness by adjusting the amount of the resin to be filled.
  • FIG. 4 is a diagram showing a configuration example of the stopper 10 and shows a plan view of the semiconductor device according to the present embodiment.
  • FIG. 3 shows a cross section taken along line AA in FIG.
  • FIG. 4 shows a state in which the semiconductor chip 3 and the bonding wire 4 are not yet sealed by the first resin coat 6 and the second resin coat 7 for the sake of explanation.
  • the entire periphery of the semiconductor chip 3 is formed by a concave portion of the stopper 10. By doing so, even when the semiconductor chip 3 is sealed with a resin having low viscosity, it is possible to prevent the resin from flowing out of the stop 10.
  • a rectangular shape is shown as the shape of the stopper 10.
  • the shape is not limited to this, and may be, for example, a circular shape or an elliptical shape.
  • the stopper 10 Since the stopper 10 is formed all around the semiconductor chip 3, the wiring between the semiconductor chip 3 and a peripheral circuit (not shown) disposed on the same uppermost layer of the substrate is the same as the uppermost wiring. It cannot be connected using layers. Therefore, in the present embodiment, as shown in FIG. 3, the wiring is transferred from the electrode 5 to the intermediate wiring layer 9 inside the printed circuit board 1 through the through hole 8, and the through hole is formed outside the stopper 10. The wiring is returned to the top layer wiring again via 8 'and electrode 5'.
  • the gap between the inside and the outside of the stopper 10 can be reduced. Can be wired. Further, at this time, the first resin coat 6 and the second resin coat 7 do not need to be provided with openings for wiring, so that the entire semiconductor chip 3 can be reliably shielded.
  • the wiring between the semiconductor chip 3 and its peripheral circuits is realized by using the intermediate wiring layer 9 of the print substrate 1, but wiring is performed by using the back surface of the print substrate 1. You may do it.
  • a printed board 1 including a through hole 8 and an intermediate wiring layer 9 is formed by stacking a plurality of boards.
  • a stopper 10 is formed by performing, for example, etching using a mask pattern on a predetermined portion of the printed substrate 1 formed as described above.
  • the stop 10 is provided after the print substrate 1 having a plurality of layers is formed.However, a substrate on which the stop 10 is formed is prepared in advance, and this and other substrates are prepared.
  • the print substrate 1 having the stopper 10 may be formed by laminating layers.
  • the semiconductor chip 3 is mounted in a region surrounded by the stopper 10, and the semiconductor chip 3 is electrically connected to the print substrate 1 by bonding wires 4. Then, after the semiconductor chip 3 and the bonding wires 4 are sealed with the first resin coat 6, the semiconductor chip 3 and the bonding wires 4 are covered with the second resin coat 7 to form the semiconductor device of the present embodiment.
  • the insulating first resin coat 6 that seals the semiconductor chip 3 for moisture proof and the like is replaced with the second resin coat having conductivity. Since the semiconductor chip 3 is further covered, the semiconductor chip 3 can be electromagnetically shielded without providing a large metal case or wall around the semiconductor chip 3. As a result, for example, when a semiconductor device having a plurality of semiconductor chips 3 mounted on one print substrate 1 is configured, it is not necessary to provide a large metal case or the like around each semiconductor chip 3.
  • the semiconductor chip and its peripheral circuits can be mounted on the printed circuit board 1 at high density.
  • a semiconductor device when a semiconductor device is composed of a printed board 1 on which a semiconductor chip 3 having a high-frequency circuit is mounted and another circuit or board, it is necessary to cover the entire printed board 1 with a large metal case. This can contribute to a reduction in the size, weight, and thickness of the semiconductor device.
  • various components can be contained in one chip. In this case, the chip itself may be shielded by the second resin coat 7. Therefore, according to the present embodiment, a troublesome process of mounting a metal case on the printed circuit board 1 by soldering or the like is not required. It also has the advantage that the manufacturing cost can be reduced.
  • the coating is performed using a resin containing metal powder. Like that. Thereby, not only can the semiconductor chip 3 be electromagnetically shielded, but also the moisture resistance and dust resistance can be further improved.
  • FIG. 5 is a cross-sectional view (a BB cross-sectional view in FIG. 6) illustrating a configuration example of a semiconductor device according to the second embodiment.
  • FIG. 6 shows a configuration example of the stopper 20 according to the second embodiment.
  • FIG. 3 is a plan view of the semiconductor device according to the present embodiment.
  • FIG. 6 shows a state in which the semiconductor chip 3 and the bonding wire 4 are not yet sealed by the first resin coat 6 and the second resin coat 7 for convenience of explanation.
  • the shape surrounding the semiconductor chip 3 is different from that of the first embodiment.
  • the stopper 20 is formed only in a part of. If the first resin coat 6 and the second resin coat 7 have a certain degree of viscosity, the resin may flow out of the gap between the stoppers 20 even if the stoppers 20 are provided discretely. However, the resin can be formed in a predetermined shape and a predetermined size.
  • a wiring pattern can be provided between the stoppers 20 and 20. This eliminates the need for wiring between the semiconductor chip 3 and its peripheral circuits using the intermediate wiring layer 9 of the printed circuit board 1 and the like, and reduces the number of through holes and the number of stacked printed circuit boards 1. can do.
  • wiring from the electrode 5 electrically connected to the semiconductor chip 3 by the bonding wire 4 to the peripheral circuit portion can be performed using the same wiring layer. Therefore, as shown in FIG. 5, it is not necessary to provide the through-hole 8 and the intermediate wiring layer 9 used in FIG. 3, so that the wiring can be simplified, and the size and weight of the device can be further reduced. The thickness can be reduced.
  • FIG. 7 is a cross-sectional view illustrating a configuration example of a semiconductor device according to the third embodiment.
  • the stopper provided around the semiconductor chip 3 has a structure opposite to that of the concave stoppers 10 and 20 described in the first and second embodiments.
  • the stoppers 30 and 31 having a convex structure are used.
  • the first stopper 30 is a stopper for the first resin coat 6, and the taller second stopper 31 is a stopper for the second resin coat 7. It is.
  • the stoppers 30 and 31 are discretely formed around the semiconductor chip 3 as shown in FIG. Therefore, it is unnecessary to provide a through-hole or an intermediate wiring layer for connecting the semiconductor chip 3 and its peripheral circuit portion.
  • the stoppers 30 and 31 are discretely formed here, they may be formed over the entire circumference of the semiconductor chip 3 as shown in FIG.
  • the semiconductor chip 3 can be electromagnetically shielded without providing a metal case or a wall around the semiconductor chip 3. It is possible to realize high-density mounting of semiconductor chips, and furthermore, downsizing and weight reduction and thinning of semiconductor devices. It should be noted that the shapes and structures of the respective parts shown in the above-described embodiment are merely examples of specific examples in practicing the present invention, and these limit the technical scope of the present invention. It must not be interpreted. That is, the present invention can be implemented in various forms without departing from the spirit or main features thereof.
  • the print substrate 1 is shown as a substrate on which the semiconductor chip 3 is mounted, but various substrates can be used for this.
  • a ceramic substrate such as alumina or aluminum nitride, a glass substrate, or a tape-like carrier film may be used.
  • a method of electrically connecting the semiconductor chip 3 to the substrate a method other than the bonding wire method may be used.
  • ferrite / metal powder is used as the material to be included in the second resin coat 7 having conductivity, but the material is not limited to this.
  • the circuit to be shielded is a circuit that handles signals in the high frequency band
  • the use of ferrite and other metallic materials with high electrical conductivity, such as copper and aluminum will reduce the generation of high frequency component noise. Can be deterred.
  • the use of a material having a high magnetic susceptibility such as permalloy can effectively suppress the generation of noise of low frequency components.
  • the present invention is useful for realizing further miniaturization and thinning of a semiconductor device by configuring a semiconductor chip and its peripheral circuits at a high density when forming an electromagnetic shield. is there. Further, the present invention is useful for reducing the manufacturing cost of a semiconductor device including a shield.

Landscapes

  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

A semiconductor chip (3) mounted on a substrate (1) is sealed with an insulating first resin coat (6), which is then coated with a second resin coat (7) containing a conductive material. Thus, the semiconductor chip (3) is electromagnetically shielded without providing the periphery of the semiconductor chip (3) with a large metallic case or wall.

Description

明 細 書 半導体装置およびその製造方法 技術分野  Description Semiconductor device and method for manufacturing the same

本発明は半導体装置およびその製造方法に関し、 例えば、 テレビジョ ン受信機やラジオ受信機、 あるいは移動体携帯端末などの電磁波の発生 を伴う装置などに用いて好適なものである。 背景技術  The present invention relates to a semiconductor device and a method for manufacturing the same, and is suitable for use in a device that generates electromagnetic waves, such as a television receiver, a radio receiver, or a mobile portable terminal. Background art

現在、 コンピュータ関連機器、 デジタル家電、 携帯端末などの進展が 目覚しく、 これらの機器の小型化、 薄型化が進んでいる。 通常、 これら 機器の電子部品は、 抵抗、 コンデンサ、 コイル等の受動素子と半導体チ ップとを基板上に搭載した回路により構成されている。 そして、 機器の 小型化、 薄型化を更に進めるために、 半導体チップ自身を高集積化した り、 半導体チップとその周辺回路とを基板上に高密度に実装する研究が 盛んに行われている。  At present, advances in computer-related equipment, digital home appliances, and mobile terminals are remarkable, and these devices are becoming smaller and thinner. Usually, the electronic components of these devices are composed of a circuit in which passive elements such as resistors, capacitors, and coils, and semiconductor chips are mounted on a substrate. In order to further reduce the size and thickness of the device, research is being actively conducted to integrate the semiconductor chip itself and to mount the semiconductor chip and its peripheral circuits on a substrate at a high density.

ここで、 コンデンサやコイル等を用いた回路が構成されている場合、 当該回路からその外部へと不要な電磁場が放出されることがある。 また Here, when a circuit using a capacitor, a coil, or the like is configured, an unnecessary electromagnetic field may be emitted from the circuit to the outside. Also

、 近年では、 回路の I C化が進み、 それまでコンデンサやコイル等を用 いて半導体チップの外部で実装されていた回路が、 半導体チップの内部 に取り込まれるようになってきている。 この場合は、 そのような半導体 チップから外部へと不要な電磁場が放出されることになる。 In recent years, the use of ICs in circuits has progressed, and circuits that had been mounted outside of the semiconductor chip using capacitors, coils, and the like are now being incorporated into the semiconductor chip. In this case, an unnecessary electromagnetic field is emitted to the outside from such a semiconductor chip.

このように、 半導体チップなどの回路から外部に不要な電磁場が放出 されると、 電子機器がその影響を受けて、 雑音障害や発振を起こすこと がある。 特に、 コンデンサやコイル等を用いて高周波成分の信号を扱う 回路を実装した場合には、 当該回路からその外部へと不要な電磁場が洩 れやすくなり、 それが高周波成分のノイズとなって現れる。 When unnecessary electromagnetic fields are emitted from a circuit such as a semiconductor chip to the outside in this way, electronic devices are affected by the electromagnetic field and may cause noise interference or oscillation. In particular, handle high frequency component signals using capacitors, coils, etc. When a circuit is mounted, unnecessary electromagnetic fields tend to leak from the circuit to the outside, and this appears as high frequency component noise.

例えば、 テレビジョン受信機等に使用される高周波回路を半導体チッ プで実装する場合、 当該半導体チップから放出された高周波成分の不要 なノイズを周辺回路部が受けると、 テレビ画面の画質が劣化してしまう ことがある。 また、 例えばラジオ受信機等においては、 半導体チップよ り発せられる高周波信号の影響を周辺回路部が受けることにより、 再生 音声の音質が劣化してしまう ことがある。  For example, when a high frequency circuit used in a television receiver or the like is mounted on a semiconductor chip, if the peripheral circuit receives unnecessary noise of a high frequency component emitted from the semiconductor chip, the image quality of the television screen deteriorates. It can happen. Also, for example, in a radio receiver or the like, a high-frequency signal emitted from a semiconductor chip is affected by a peripheral circuit unit, so that sound quality of reproduced sound may be degraded.

そのため、 電磁場を発生する回路を半導体チップとして基板上に実装 する場合には、 その半導体チップからノイズの元となる電磁場を外部へ 放出しないようにするために、 導電性のある材料を用いて半導体チップ の周りに壁を作ることにより、 半導体チップを電磁的に遮蔽する必要が 生じてくる。  Therefore, when a circuit that generates an electromagnetic field is mounted on a substrate as a semiconductor chip, the semiconductor chip must be made of a conductive material in order to prevent the semiconductor chip from emitting an electromagnetic field that causes noise to the outside. The creation of walls around the chip necessitates the need to electromagnetically shield the semiconductor chip.

従来、 この電磁的なシールドは、 対象とする回路の外周を金属製のケ ースで覆う ことにより行われていた。 したがって、 当該対象とする回路 が半導体チップとして I C化されている場合には、 その半導体チップの 外周を金属製のケースで覆う ことによって不要な電磁場を遮蔽していた 図 1 は、 1つの基板上に複数の半導体チップを備えた半導体装置の構 成例を示す図であり、 図 1 ( a ) は半導体装置の斜視図を示し、 図 1 ( b ) は図 1 ( a ) 中の C一 C断面図を示している。  Conventionally, this electromagnetic shielding has been performed by covering the outer periphery of the target circuit with a metal case. Therefore, when the target circuit is an IC as a semiconductor chip, unnecessary electromagnetic fields are shielded by covering the outer periphery of the semiconductor chip with a metal case. FIGS. 1A and 1B are diagrams showing a configuration example of a semiconductor device having a plurality of semiconductor chips. FIG. 1A is a perspective view of the semiconductor device, and FIG. FIG.

図 1 に示す半導体装置は、 1つのプリ ン ト基板 1上に 3つの半導体チ ップ 3 を搭載している。 これらの半導体チップ 3は、 例えばボンディ ン グワイヤ 4によってプリ ント基板 1 と電気的に接続されている。 また、 それぞれの半導体チップ 3の間は、 図示しない配線や周辺回路等を介し て接続されている。 このような半導体装置に対して、 従来は、 図 1 ( b ) に示すように、 半導体チップ 3の外周を金属製のケース 2で覆う ことによってそれぞれ の半導体チップ 3を電磁的にシールドしていた。 また、 プリ ント基板 1 上において、 個々の半導体チップ 3が存在する領域ごとに金属製の壁で 間仕切りをすることによってそれぞれの半導体チップ 3 を電磁的にシ一 ルドするものもあった。 The semiconductor device shown in FIG. 1 has three semiconductor chips 3 mounted on one print substrate 1. These semiconductor chips 3 are electrically connected to the print substrate 1 by, for example, bonding wires 4. In addition, the respective semiconductor chips 3 are connected via wiring, peripheral circuits, and the like (not shown). Conventionally, for such a semiconductor device, each semiconductor chip 3 is electromagnetically shielded by covering the outer periphery of the semiconductor chip 3 with a metal case 2 as shown in FIG. 1 (b). . Further, there is a type in which each semiconductor chip 3 is electromagnetically shielded by partitioning a metal wall for each region where the individual semiconductor chips 3 are present on the print substrate 1.

図 2は、 半導体装置の他の構成例を示す断面図である。 この図 2 に示 す半導体装置は、 1つのプリ ン ト基板 1上に 1つの半導体チップ 3 を搭 載しており、 例えばこれが基板外の他の回路と配線により接続される。 このような半導体装置においては、 半導体チップから発せられた電磁場 が基板外部の回路部に放出されるのを防ぐために、 プリ ント基板 1 の全 体を金属製のケース 2で覆う ことにより、 半導体チップ 3およびその周 辺回路を含むプリント基板 1 の全体を電磁的にシ一ルドしていた。  FIG. 2 is a cross-sectional view illustrating another configuration example of the semiconductor device. The semiconductor device shown in FIG. 2 has one semiconductor chip 3 mounted on one print substrate 1 and is connected to another circuit outside the substrate by wiring, for example. In such a semiconductor device, the entire printed substrate 1 is covered with a metal case 2 in order to prevent an electromagnetic field generated from the semiconductor chip from being emitted to a circuit portion outside the substrate. The entire printed circuit board 1 including the circuit 3 and its peripheral circuits was electromagnetically shielded.

上述のように、 従来の半導体装置では、 電磁的なシールドを実現する ために金属製のケースが用いられていた。 そのため、 電磁場を発生する 半導体チップを 1つの基板上に複数搭載した半導体装置の場合は、 個々 の半導体チップ毎にその周囲に大きな壁を設けた構成が必要となり、 複 数の半導体チップやその周辺回路等を基板上へ高密度に実装することを 困難にしているという問題があった。  As described above, in a conventional semiconductor device, a metal case is used to realize electromagnetic shielding. Therefore, in the case of a semiconductor device in which a plurality of semiconductor chips that generate an electromagnetic field are mounted on one substrate, it is necessary to provide a configuration in which a large wall is provided around each semiconductor chip. There is a problem that it is difficult to mount circuits and the like on a substrate at high density.

また、 電磁場を発生する半導体チップを搭載した基板と他の回路ある いは他の基板とを接続して構成した半導体装置の場合は、 その基板の全 体を大きな金属壁によりシールドする構成が必要となるため、 構成がか なり大規模になってしまうという問題があった。  In addition, in the case of a semiconductor device configured by connecting a substrate on which a semiconductor chip that generates an electromagnetic field is mounted to another circuit or another substrate, it is necessary to shield the entire substrate with a large metal wall. Therefore, there was a problem that the configuration became considerably large.

また、 金属製のケースや壁を半田付けなどによって基板上に取り付け る工程が必要となるため、 半導体装置の製造コス 卜が大きくなるという 問題もあった。 本発明は、 このような問題を解決するために成されたものであり、 電 磁的なシールドを構成する場合において、 半導体装置を構成する半導体 チップやその周辺回路等を高密度に実装できるようにし、 半導体装置の 更なる小型化、 薄型化を実現できるようにすることを目的とする。 また、 本発明は、 シールドを含む半導体装置の製造コス トを削減でき るようにすることをも目的としている。 発明の開示 In addition, since a step of mounting a metal case or wall on a substrate by soldering or the like is required, there has been a problem that the manufacturing cost of the semiconductor device is increased. The present invention has been made to solve such a problem, and when forming an electromagnetic shield, a semiconductor chip constituting a semiconductor device and its peripheral circuits can be mounted at a high density. It is another object of the present invention to realize a further reduction in the size and thickness of a semiconductor device. Another object of the present invention is to reduce the manufacturing cost of a semiconductor device including a shield. Disclosure of the invention

本発明の半導体装置は、 半導体チップを絶縁性の第 1 の樹脂コートで 封止し、 当該第 1 の樹脂コート上を導電性の材料を含む第 2 の樹脂コー 卜で覆ったことを特徴とする。  The semiconductor device of the present invention is characterized in that a semiconductor chip is sealed with an insulating first resin coat, and the first resin coat is covered with a second resin coat containing a conductive material. I do.

本発明の他の態様では、 少なく とも 1つの半導体チップを搭載する基 板と、 上記半導体チップを封止する絶縁性の第 1 の樹脂コートと、 上記 第 1 の樹脂コー トを覆う導電性の材料を含む第 2の樹脂コートとを備え ることを特徴とする。  According to another aspect of the present invention, there is provided a substrate on which at least one semiconductor chip is mounted, an insulating first resin coat sealing the semiconductor chip, and a conductive resin covering the first resin coat. And a second resin coat containing a material.

本発明のその他の態様では、 上記半導体チップが搭載される部分の周 囲に、 樹脂の流出を抑止するための凹型または凸型のス トツパを形成し たことを特徴とする。  In another aspect of the present invention, a concave or convex stopper for suppressing resin outflow is formed around a portion where the semiconductor chip is mounted.

こ こで、 上記ス トツパを上記半導体チップの周囲の全てにわたって形 成し、 上記ス トツバの内部領域に搭載される上記半導体チップと上記ス トツパの外部領域との間の配線を、 複数層で形成された基板の中間配線 層または裏側配線層を介して行うようにしても良い。  Here, the stopper is formed over the entire periphery of the semiconductor chip, and the wiring between the semiconductor chip mounted in the inner region of the stopper and the outer region of the stopper is formed in a plurality of layers. It may be performed via an intermediate wiring layer or a back wiring layer of the formed substrate.

また、 上記ス トツパを上記半導体チップの周囲に離散的に形成しても 良い。  Further, the stopper may be discretely formed around the semiconductor chip.

また、 本発明による半導体装置の製造方法は、 半導体チップを絶縁性 の第 1 の樹脂コートで封止する第 1 の工程と、 上記第 1 の樹脂コート上 を導電性の材料を含む第 2 の樹脂コートで覆う第 2の工程とを有するこ とを特徴とする。 Further, the method for manufacturing a semiconductor device according to the present invention includes a first step of sealing a semiconductor chip with an insulating first resin coat; And a second step of covering with a second resin coat containing a conductive material.

本発明の他の態様では、 基板上で半導体チップが搭載される部分の周 囲に、 樹脂の流出を抑止するための凹型または凸型のス トツパを形成す る第 1 の工程と、 上記ス トッパの内部領域に上記半導体チップを搭載し て上記基板と電気的に接続する第 2の工程と、 上記基板上に搭載された 上記半導体チップを絶縁性の第 1 の樹脂コートで封止する第 3の工程と 、 上記第 1 の樹脂コート上を導電性の材料を含む第 2 の樹脂コートで覆 う第 4の工程とを有することを特徴とする。  In another aspect of the present invention, a first step of forming a concave or convex stopper for suppressing resin outflow around a portion where a semiconductor chip is mounted on a substrate; A second step of mounting the semiconductor chip in an inner region of the topper and electrically connecting the semiconductor chip to the substrate, and a second step of sealing the semiconductor chip mounted on the substrate with an insulating first resin coat. And a fourth step of covering the first resin coat with a second resin coat containing a conductive material.

本発明は上記技術手段より成るので、 半導体チップの周りあるいは基 板の全体に大きな金属製のケースや壁を設けることなく、 当該半導体チ ップを電磁的にシールドすることができる。 これにより、 半導体チップ やその周辺回路等を高密度に実装することができ、 半導体装置の更なる 小型軽量化、 薄型化を図ることができる。  Since the present invention includes the above technical means, the semiconductor chip can be electromagnetically shielded without providing a large metal case or wall around the semiconductor chip or the entire substrate. As a result, the semiconductor chip and its peripheral circuits can be mounted at a high density, and the semiconductor device can be further reduced in size, weight, and thickness.

また、 本発明によれば、 樹脂のコーティ ングを二重に行うだけでシー ルドを形成することができ、 金属製のケース等を半田付けなどによって 基板上に取り付ける面倒な工程が不要となるため、 半導体装置の製造コ ス 卜を大幅に削減することができる。  Further, according to the present invention, the shield can be formed only by performing double coating of the resin, and a troublesome process of mounting a metal case or the like on the substrate by soldering or the like is not required. Thus, the manufacturing cost of the semiconductor device can be significantly reduced.

また、 本発明の他の特徴によれば、 半導体チップが搭載される部分の 周囲に、 樹脂の流出を抑止するための凹型または凸型のス トツパを形成 したので、 粘度が低く流動性が高い樹脂をコ一ティ ングする場合でも、 樹脂を所定の形状および所定の大きさに均一にコ一ティ ングすることが できる。  According to another feature of the present invention, a concave or convex stopper for suppressing resin outflow is formed around a portion where the semiconductor chip is mounted, so that the viscosity is low and the fluidity is high. Even when the resin is coated, the resin can be uniformly coated to a predetermined shape and a predetermined size.

この場合において、 ス トツパを半導体チップの全周にわたって形成し 、 ス トッパの内部領域に搭載される半導体チップとス トッパの外部領域 との間の配線を、 複数層で形成された基板の中間配線層または裏側配線 層を介して行うようにした場合には、 第 1、 第 2の樹脂コートに開口部 を設けなくても配線を行う ことができ、 半導体チップの全体を確実にシ 一ルドすることができる。 In this case, the stopper is formed over the entire periphery of the semiconductor chip, and the wiring between the semiconductor chip mounted in the inner region of the stopper and the outer region of the stopper is formed as an intermediate wiring of a substrate formed of a plurality of layers. Layer or backside wiring In the case where the process is performed via a layer, wiring can be performed without providing an opening in the first and second resin coats, and the entire semiconductor chip can be reliably shielded.

また、 ス トツパを半導体チップの周囲に離散的に形成した場合には、 ス トツパ間に配線パターンを設けることが可能となるので、 半導体チッ プとその周辺回路部との間の配線を基板の中間配線層等を用いて行う必 要がなくなり、 スルーホール数や基板の積層数を削減することができる 。 これにより、 配線を簡素化することができるとともに、 装置の更なる 小型軽量化、 薄型化を図ることができる。 図面の簡単な説明  Also, if the stopper is formed discretely around the semiconductor chip, it becomes possible to provide a wiring pattern between the stopper and the wiring between the semiconductor chip and its peripheral circuit portion is formed on the substrate. It is not necessary to use an intermediate wiring layer or the like, and the number of through holes and the number of stacked substrates can be reduced. As a result, the wiring can be simplified, and the device can be further reduced in size, weight, and thickness. BRIEF DESCRIPTION OF THE FIGURES

図 1 は、 従来の半導体装置の構成例を示す断面図である。  FIG. 1 is a cross-sectional view illustrating a configuration example of a conventional semiconductor device.

図 2は、 従来の半導体装置の他の構成例を示す断面図である。  FIG. 2 is a cross-sectional view showing another configuration example of the conventional semiconductor device.

図 3は、 第 1 の実施形態による半導体装置の構成例を示す断面図であ る。  FIG. 3 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the first embodiment.

図 4は、 第 1 の実施形態によるス トツバの構成例を示す図であり、 本 実施形態による半導体装置の平面図である。  FIG. 4 is a diagram illustrating a configuration example of the stove according to the first embodiment, and is a plan view of the semiconductor device according to the present embodiment.

図 5は、 第 2の実施形態による半導体装置の構成例を示す断面図であ る。  FIG. 5 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the second embodiment.

図 6 は、 第 2の実施形態によるス トッパの構成例を示す図であり、 本 実施形態による半導体装置の平面図である。  FIG. 6 is a diagram illustrating a configuration example of the stopper according to the second embodiment, and is a plan view of the semiconductor device according to the present embodiment.

図 7は、 第 3の実施形態による半導体装置の構成例を示す断面図であ る。 発明を実施するための最良の形態  FIG. 7 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the third embodiment. BEST MODE FOR CARRYING OUT THE INVENTION

以下、 本発明の一実施形態を図面に基づいて説明する。 (第 1 の実施形態) Hereinafter, an embodiment of the present invention will be described with reference to the drawings. (First Embodiment)

図 3 は、 第 1 の実施形態による半導体装置の構成例を示す断面図であ る。 図 3 において、 プリント基板 1 の最上層に搭載された半導体チップ 3は、 例えばボンディ ングワイヤ 4によってプリ ント基板 1上の電極 5 と電気的に接続されている。 この半導体チップ 3およびボンディ ングヮ ィャ 4は、 それらを埃や湿気から保護するとともに、 外部からの衝撃や 振動に絶え得るようにするために、 全体が絶縁性の第 1の樹脂コー ト 6 で封止されている。  FIG. 3 is a cross-sectional view illustrating a configuration example of the semiconductor device according to the first embodiment. In FIG. 3, the semiconductor chip 3 mounted on the uppermost layer of the printed board 1 is electrically connected to the electrodes 5 on the printed board 1 by, for example, bonding wires 4. The semiconductor chip 3 and the bonding tracker 4 are entirely made of an insulating first resin coat 6 so as to protect them from dust and moisture and to be insulated from external shocks and vibrations. It is sealed.

本実施形態では、 この第 1の樹脂コ一 ト 6の外側を、 導電性を有する 材料、 例えばフェライ トあるいはその他の金属粉を含む第 2の樹脂コー ト 7で覆うようにしている。 これにより、 この第 2の樹脂コート 7は半 導体チップ 3 を完全に覆うように形成されるため、 これを例えば接地す ることにより、 半導体チップ 3 を第 2の樹脂コート 7 によって電磁的に シールドすることができる。  In the present embodiment, the outside of the first resin coat 6 is covered with a conductive material, for example, a second resin coat 7 containing ferrite or other metal powder. As a result, the second resin coat 7 is formed so as to completely cover the semiconductor chip 3. By grounding the second resin coat 7, the semiconductor chip 3 is electromagnetically shielded by the second resin coat 7. can do.

これにより、 半導体チップ 3から発せられた電磁波を第 2の樹脂コー ト 7で遮蔽し、 高周波ノイズとして外部へと放出されるのを防止して、 画像の乱れや雑音の発生を抑制することができる。 もちろん、 このよう な第 2の樹脂コート 7 を設けることによって、 外部で発せられた電磁波 が第 2の樹脂コート 7 を透過して半導体チップ 3の内部へと侵入するこ とも防止することができる。  As a result, the electromagnetic waves emitted from the semiconductor chip 3 are shielded by the second resin coat 7 to prevent them from being emitted as high-frequency noise to the outside, thereby suppressing image disturbance and noise. it can. Of course, by providing such a second resin coat 7, it is possible to prevent an electromagnetic wave emitted outside from penetrating the second resin coat 7 and entering the inside of the semiconductor chip 3.

上記第 1 の樹脂コート 6および第 2の樹脂コート 7 を形成する際には 、 樹脂が必要以上に流れ出ないようにする必要がある。 これを樹脂の粘 度を調整することによってコント口一ルする方法も考えられるが、 本実 施形態では、 どのような粘度の樹脂にも対応できるようにするために、 プリ ント基板 1上で半導体チップ 3が搭載される部分の周囲に凹型の窪 みから成るス トッパ 1 0を設けている。 このようにス トッパ 1 0 を設けることにより、 充填した樹脂がス トツ パ 1 0の外部へ流れ出るのを防ぎ、 第 1 の樹脂コート 6および第 2の樹 脂コート 7 を上記ス トツバ 1 0によって規定された所定の形状おょぴ所 定の大きさで形成することができる。 このとき、 充填する樹脂の量を調 整することにより、 第 1 の樹脂コート 6および第 2の樹脂コート 7 を所 望の厚さで形成することも可能である。 When forming the first resin coat 6 and the second resin coat 7, it is necessary to prevent the resin from flowing out more than necessary. A method of controlling this by adjusting the viscosity of the resin may be considered, but in the present embodiment, in order to be able to cope with a resin of any viscosity, on the printed circuit board 1, A stopper 10 composed of a concave depression is provided around a portion where the semiconductor chip 3 is mounted. By providing the stopper 10 in this way, the filled resin is prevented from flowing out of the stopper 10, and the first resin coat 6 and the second resin coat 7 are removed by the stopper 10. It can be formed in a prescribed prescribed shape and a prescribed size. At this time, the first resin coat 6 and the second resin coat 7 can be formed to have a desired thickness by adjusting the amount of the resin to be filled.

図 4は、 上記ス トッパ 1 0の構成例を示す図であり、 本実施形態によ る半導体装置の平面図を示している。 なお、 上記図 3は、 この図 4中に 示す A— A断面を示している。 また、 この図 4では説明の都合上、 半導 体チップ 3およびボンディ ングワイヤ 4が第 1 の樹脂コート 6および第 2の樹脂コ一ト 7 によって未だ封止されていない状態を示している。 図 4に示すように、 本実施形態では、 半導体チップ 3の周囲を全てス トツパ 1 0の凹部により形成している。 このようにすることにより、 粘 度が小さい樹脂を用いて半導体チップ 3 を封止する場合でも、 ス トツパ 1 0の外部に樹脂が流れ出てしまう不都合を防止することができる。 な お、 ここではス トッパ 1 0の形状として矩形を示しているが、 これに限 定されるものではなく、 例えば円形、 楕円形などであっても良い。  FIG. 4 is a diagram showing a configuration example of the stopper 10 and shows a plan view of the semiconductor device according to the present embodiment. FIG. 3 shows a cross section taken along line AA in FIG. Further, FIG. 4 shows a state in which the semiconductor chip 3 and the bonding wire 4 are not yet sealed by the first resin coat 6 and the second resin coat 7 for the sake of explanation. As shown in FIG. 4, in the present embodiment, the entire periphery of the semiconductor chip 3 is formed by a concave portion of the stopper 10. By doing so, even when the semiconductor chip 3 is sealed with a resin having low viscosity, it is possible to prevent the resin from flowing out of the stop 10. Here, a rectangular shape is shown as the shape of the stopper 10. However, the shape is not limited to this, and may be, for example, a circular shape or an elliptical shape.

このように、 半導体チップ 3の周囲全てにス トッパ 1 0が形成される ことにより、 半導体チップ 3 とそれと同じ基板最上層に配置された図示 しない周辺回路等との間の配線は、 同じ最上配線層を用いて接続するこ とができない。 そこで、 本実施形態では、 図 3 に示すように、 電極 5か らスル一ホール 8 を介してプリント基板 1 の内部にある中間配線層 9 に 配線を移し、 ス トッパ 1 0の外側でスルーホール 8 ' および電極 5 ' を 介して再び最上層の配線に戻すようにしている。  Since the stopper 10 is formed all around the semiconductor chip 3, the wiring between the semiconductor chip 3 and a peripheral circuit (not shown) disposed on the same uppermost layer of the substrate is the same as the uppermost wiring. It cannot be connected using layers. Therefore, in the present embodiment, as shown in FIG. 3, the wiring is transferred from the electrode 5 to the intermediate wiring layer 9 inside the printed circuit board 1 through the through hole 8, and the through hole is formed outside the stopper 10. The wiring is returned to the top layer wiring again via 8 'and electrode 5'.

このように構成することにより、 半導体チップ 3の周囲に凹型のス ト ッパ 1 0 を形成した場合であっても、 ス トッパ 1 0の内側と外側との間 を配線することができる。 また、 このとき、 第 1 の樹脂コート 6および 第 2の樹脂コート 7 に配線用の開口部を設けなくても良いので、 半導体 チップ 3の全体を確実にシールドすることができる。 With this configuration, even when the concave stopper 10 is formed around the semiconductor chip 3, the gap between the inside and the outside of the stopper 10 can be reduced. Can be wired. Further, at this time, the first resin coat 6 and the second resin coat 7 do not need to be provided with openings for wiring, so that the entire semiconductor chip 3 can be reliably shielded.

なお、 ここでは、 半導体チップ 3 とその周辺回路等との間の配線を、 プリ ント基板 1 の中間配線層 9 を用いて実現しているが、 プリ ント基板 1 の裏面を利用して配線するようにしても良い。  Here, the wiring between the semiconductor chip 3 and its peripheral circuits is realized by using the intermediate wiring layer 9 of the print substrate 1, but wiring is performed by using the back surface of the print substrate 1. You may do it.

次に、 上記のような構造を有する半導体装置の製造方法について以下 に説明する。  Next, a method for manufacturing a semiconductor device having the above-described structure will be described below.

最初に、 複数の基板を積層することによって、 スルーホール 8や中間 配線層 9を含むプリ ント基板 1 を形成する。 次に、 このように形成した プリ ント基板 1 の所定個所に対して、 例えばマスクパターンを用いたェ ツチングを行う ことにより、 ス トッパ 1 0 を形成する。  First, a printed board 1 including a through hole 8 and an intermediate wiring layer 9 is formed by stacking a plurality of boards. Next, a stopper 10 is formed by performing, for example, etching using a mask pattern on a predetermined portion of the printed substrate 1 formed as described above.

なお、 ここでは複数層を有するプリ ント基板 1 を形成した後でス トツ パ 1 0を設けるようにしたが、 あらかじめス トッパ 1 0 を形成した基板 を用意しておき、 これと他の基板とを積層していく ことによって、 ス ト ッパ 1 0を有するプリ ン ト基板 1 を形成するようにしても良い。  In this case, the stop 10 is provided after the print substrate 1 having a plurality of layers is formed.However, a substrate on which the stop 10 is formed is prepared in advance, and this and other substrates are prepared. The print substrate 1 having the stopper 10 may be formed by laminating layers.

次に、 ス トッパ 1 0で囲まれた領域内に半導体チップ 3 を搭載し、 そ れをボンディ ングワイヤ 4によってプリ ン ト基板 1 と電気的に接続する 。 そして、 上記半導体チップ 3およびボンディ ングワイヤ 4を第 1 の樹 脂コート 6で封止した後、 その上を第 2の樹脂コート 7で覆う ことによ り、 本実施形態の半導体装置を形成する。  Next, the semiconductor chip 3 is mounted in a region surrounded by the stopper 10, and the semiconductor chip 3 is electrically connected to the print substrate 1 by bonding wires 4. Then, after the semiconductor chip 3 and the bonding wires 4 are sealed with the first resin coat 6, the semiconductor chip 3 and the bonding wires 4 are covered with the second resin coat 7 to form the semiconductor device of the present embodiment.

以上詳しく説明したように、 本実施形態によれば、 防湿などのために 半導体チップ 3 を封止した絶縁性の第 1 の樹脂コ一ト 6 を、 導電性を持 たせた第 2の樹脂コート 7で更に覆うようにしたので、 半導体チップ 3 の周りに大きな金属製のケースや壁を設けることなく、 当該半導体チッ プ 3 を電磁的にシールドすることができる。 これにより、 例えば 1つのプリ ント基板 1上に複数の半導体チップ 3 を搭載した半導体装置を構成する場合、 個々の半導体チップ 3毎にその 周囲に大きな金属製ケース等を設ける必要がなくなり、 複数の半導体チ ップとその周辺回路等をプリ ン ト基板 1上に高密度に実装することがで きる。 As described above in detail, according to the present embodiment, the insulating first resin coat 6 that seals the semiconductor chip 3 for moisture proof and the like is replaced with the second resin coat having conductivity. Since the semiconductor chip 3 is further covered, the semiconductor chip 3 can be electromagnetically shielded without providing a large metal case or wall around the semiconductor chip 3. As a result, for example, when a semiconductor device having a plurality of semiconductor chips 3 mounted on one print substrate 1 is configured, it is not necessary to provide a large metal case or the like around each semiconductor chip 3. The semiconductor chip and its peripheral circuits can be mounted on the printed circuit board 1 at high density.

また、 例えば高周波回路を有する半導体チップ 3 を搭載したプリ ント 基板 1 と他の回路や基板とにより半導体装置を構成する場合も、 そのプ リ ント基板 1 の全体を大きな金属製ケースで覆う必要がなくなり、 半導 体装置の小型軽量化、 薄型化に貢献することができる。 特に、 最近では 、 I C化が進んで様々な部品が 1 つのチップ内に収められるようになつ てきているが、 この場合はそのチップ自体を第 2の樹脂コート 7によつ てシールドすれば良いので、 装置規模を格段に小さくすることができる また、 本実施形態によれば、 金属製のケースを半田付けなどによって プリ ン ト基板 1上に取り付ける面倒な工程が不要となるため、 半導体装 置の製造コス トを削減することができるというメリ ッ トも有する。  Also, for example, when a semiconductor device is composed of a printed board 1 on which a semiconductor chip 3 having a high-frequency circuit is mounted and another circuit or board, it is necessary to cover the entire printed board 1 with a large metal case. This can contribute to a reduction in the size, weight, and thickness of the semiconductor device. In particular, recently, with the progress of IC technology, various components can be contained in one chip. In this case, the chip itself may be shielded by the second resin coat 7. Therefore, according to the present embodiment, a troublesome process of mounting a metal case on the printed circuit board 1 by soldering or the like is not required. It also has the advantage that the manufacturing cost can be reduced.

また、 絶縁性を持つ第 1 の樹脂コート 6の外側を金属そのものから成 る材料でコーティ ングすることも可能であるが、 本実施形態では、 金属 粉入りの樹脂を用いてコ一ティ ングするようにしている。 これにより、 半導体チップ 3を電磁的にシールドすることができるだけでなく、 耐湿 性および耐埃性なども更に向上させることができる。  Further, it is possible to coat the outside of the first resin coat 6 having an insulating property with a material composed of a metal itself, but in the present embodiment, the coating is performed using a resin containing metal powder. Like that. Thereby, not only can the semiconductor chip 3 be electromagnetically shielded, but also the moisture resistance and dust resistance can be further improved.

(第 2 の実施形態) (Second embodiment)

次に、 本発明の第 2の実施形態について説明する。 図 5は、 第 2の実 施形態による半導体装置の構成例を示す断面図 (図 6 中の B— B断面図 ) である。 また、 図 6は、 第 2の実施形態によるス トッパ 2 0の構成例 を示す図であり、 本実施形態による半導体装置の平面図を示している。 なお、 図 6では説明の都合上、 半導体チップ 3およびボンディ ングワイ ャ 4が第 1 の樹脂コート 6および第 2の樹脂コート 7によって未だ封止 されていない状態を示している。 Next, a second embodiment of the present invention will be described. FIG. 5 is a cross-sectional view (a BB cross-sectional view in FIG. 6) illustrating a configuration example of a semiconductor device according to the second embodiment. FIG. 6 shows a configuration example of the stopper 20 according to the second embodiment. FIG. 3 is a plan view of the semiconductor device according to the present embodiment. FIG. 6 shows a state in which the semiconductor chip 3 and the bonding wire 4 are not yet sealed by the first resin coat 6 and the second resin coat 7 for convenience of explanation.

図 6 に示すように、 第 2の実施形態では、 半導体チップ 3の全周にわ たってス 卜ッパ 1 0 を形成していた第 1 の実施形態と異なり、 半導体チ ップ 3 を囲む形状の一部にのみス トッパ 2 0 を形成している。 第 1 の樹 脂コート 6および第 2の樹脂コー ト 7の粘度がある程度ある場合は、 ス トツパ 2 0 を離散的に設けても、 ス トッパ 2 0の隙間から外部に樹脂が 流れ出てしまう ことはなく、 所定の形状および所定の大きさで樹脂を形 成することができる。  As shown in FIG. 6, in the second embodiment, unlike the first embodiment in which the stopper 10 is formed over the entire periphery of the semiconductor chip 3, the shape surrounding the semiconductor chip 3 is different from that of the first embodiment. The stopper 20 is formed only in a part of. If the first resin coat 6 and the second resin coat 7 have a certain degree of viscosity, the resin may flow out of the gap between the stoppers 20 even if the stoppers 20 are provided discretely. However, the resin can be formed in a predetermined shape and a predetermined size.

また、 このようにス トッパ 2 0 を離散的に設けた場合、 そのス トッパ 2 0 とス トッパ 2 0 との間に配線パターンを設けることが可能となる。 これにより、 半導体チップ 3 とその周辺回路等との間の配線をプリ ント 基板 1 の中間配線層 9等を用いて行う必要がなくなり、 スルーホールの 数やプリ ン卜基板 1 の積層数を削減することができる。  When the stoppers 20 are discretely provided, a wiring pattern can be provided between the stoppers 20 and 20. This eliminates the need for wiring between the semiconductor chip 3 and its peripheral circuits using the intermediate wiring layer 9 of the printed circuit board 1 and the like, and reduces the number of through holes and the number of stacked printed circuit boards 1. can do.

すなわち、 本実施形態によれば、 ボンディ ングワイヤ 4によって半導 体チップ 3 と電気的に接続された電極 5から、 それと同じ配線層を用い て周辺回路部への配線を行う ことができる。 したがって、 図 5 に示すよ うに、 図 3で使用していたスルーホール 8や中間配線層 9などは設ける 必要がなくなり、 配線を簡素化することができるとともに、 装置の更な る小型軽量化、 薄型化を図ることができる。  That is, according to the present embodiment, wiring from the electrode 5 electrically connected to the semiconductor chip 3 by the bonding wire 4 to the peripheral circuit portion can be performed using the same wiring layer. Therefore, as shown in FIG. 5, it is not necessary to provide the through-hole 8 and the intermediate wiring layer 9 used in FIG. 3, so that the wiring can be simplified, and the size and weight of the device can be further reduced. The thickness can be reduced.

(第 3の実施形態) (Third embodiment)

次に、 本発明の第 3の実施形態について説明する。 図 7 は、 第 3の実 施形態による半導体装置の構成例を示す断面図である。 図 7 に示すように、 本実施形態では、 半導体チップ 3の周囲に設ける ス トツバの構造として、 第 1、 第 2の実施形態で説明した凹型構造のス トツパ 1 0, 2 0 とは逆に、 凸型構造のス トッパ 3 0 , 3 1 を用いる。 ここで、 第 1 のス トッパ 3 0は、 第 1 の樹脂コート 6用のス トッパであ り、 これより背の高い第 2のス トッパ 3 1 は、 第 2の樹脂コート 7用の ス トツパである。 Next, a third embodiment of the present invention will be described. FIG. 7 is a cross-sectional view illustrating a configuration example of a semiconductor device according to the third embodiment. As shown in FIG. 7, in the present embodiment, the stopper provided around the semiconductor chip 3 has a structure opposite to that of the concave stoppers 10 and 20 described in the first and second embodiments. The stoppers 30 and 31 having a convex structure are used. Here, the first stopper 30 is a stopper for the first resin coat 6, and the taller second stopper 31 is a stopper for the second resin coat 7. It is.

この第 3の実施形態においては、 図 6 に示したのと同様に、 半導体チ ップ 3の周囲にス トッパ 3 0, 3 1 を離散的に形成している。 そのため 、 半導体チップ 3 とその周辺回路部とを接続するためにスルーホールや 中間配線層を設けることは不要である。 なお、 ここではス トッパ 3 0 , 3 1 を離散的に形成しているが、 図 4のように半導体チップ 3の全周に 渡って形成するようにしても良い。  In the third embodiment, the stoppers 30 and 31 are discretely formed around the semiconductor chip 3 as shown in FIG. Therefore, it is unnecessary to provide a through-hole or an intermediate wiring layer for connecting the semiconductor chip 3 and its peripheral circuit portion. Although the stoppers 30 and 31 are discretely formed here, they may be formed over the entire circumference of the semiconductor chip 3 as shown in FIG.

このように凸型構造のス トッパ 3 0 , 3 1 を構成した場合も、 半導体 チップ 3の周りに金属製のケースや壁を設けることなく、 当該半導体チ ップ 3 を電磁的にシールドすることができ、 半導体チップの高密度実装 、 ひいては半導体装置の小型軽量化、 薄型化を実現することができる。 なお、 上記実施形態において示した各部の形状および構造は、 何れも 本発明を実施するにあたっての具体化の一例を示したものに過ぎず、 こ れらによって本発明の技術的範囲が限定的に解釈されてはならないもの である。 すなわち、 本発明はその精神、 またはその主要な特徴から逸脱 することなく、 様々な形で実施することができる。  Even when the stoppers 30 and 31 having the convex structure are configured as described above, the semiconductor chip 3 can be electromagnetically shielded without providing a metal case or a wall around the semiconductor chip 3. It is possible to realize high-density mounting of semiconductor chips, and furthermore, downsizing and weight reduction and thinning of semiconductor devices. It should be noted that the shapes and structures of the respective parts shown in the above-described embodiment are merely examples of specific examples in practicing the present invention, and these limit the technical scope of the present invention. It must not be interpreted. That is, the present invention can be implemented in various forms without departing from the spirit or main features thereof.

例えば、 上記実施形態では、 半導体チップ 3 を搭載する基板としてプ リ ント基板 1 を示しているが、 これには様々な基板を用いることが可能 である。 例えば、 アルミナ、 窒化アルミなどのセラミ ック製の基板ゃガ ラス基板を用いても良いし、 テープ状のキャリアフィルムなどに適用し ても良い。 また、 半導体チップ 3 を基板上に電気的に接続する方法として、 ボン ディ ングワイヤ方式以外の方式を用いても良い。 For example, in the above embodiment, the print substrate 1 is shown as a substrate on which the semiconductor chip 3 is mounted, but various substrates can be used for this. For example, a ceramic substrate such as alumina or aluminum nitride, a glass substrate, or a tape-like carrier film may be used. Further, as a method of electrically connecting the semiconductor chip 3 to the substrate, a method other than the bonding wire method may be used.

また、 上記実施形態では、 導電性を有する第 2 の樹脂コート 7に含ま せる材料としてフェライ トゃ金属粉を用いているが、 これに限定される ものではない。 例えば、 シ一ルドしょうとする回路が高周波帯の信号を 扱う回路の場合は、 フェライ トの他に銅、 アルミニウムなどの電気伝導 度の大きな金属材料を用いることよって、 高周波成分のノイズの発生を 抑止することができる。 また、 低周波帯ではパーマロイなどの帯磁率の 大きな材料を用いることにより、 低周波成分のノィズの発生を有効に抑 止することができる。  In the above embodiment, ferrite / metal powder is used as the material to be included in the second resin coat 7 having conductivity, but the material is not limited to this. For example, if the circuit to be shielded is a circuit that handles signals in the high frequency band, the use of ferrite and other metallic materials with high electrical conductivity, such as copper and aluminum, will reduce the generation of high frequency component noise. Can be deterred. In addition, in the low frequency band, the use of a material having a high magnetic susceptibility such as permalloy can effectively suppress the generation of noise of low frequency components.

また、 上記実施形態では、 電磁場を発生する回路、 例えば高周波回路 を有する半導体チップ自体をシールドする例を挙げたが、 自らは電磁場 を発生しない半導体チップを第 2の樹脂コート 7で覆うことによりシ一 ルドするようにしても良い。 このようにすれば、 外部で発生された電磁 場を第 2の樹脂コー ト 7で遮断して、 当該第 2の樹脂コー ト 7 によって シールドされた半導体チップが外部からノイズの影響を受けないように することができる。 産業上の利用可能性  Further, in the above-described embodiment, an example has been described in which a circuit that generates an electromagnetic field, for example, a semiconductor chip having a high-frequency circuit is shielded. However, a semiconductor chip that does not generate an electromagnetic field by itself is covered by a second resin coat 7. It may be allowed to be ignored. In this way, the externally generated electromagnetic field is cut off by the second resin coat 7 so that the semiconductor chip shielded by the second resin coat 7 is not affected by external noise. Can be Industrial applicability

本発明は、 電磁的なシールドを構成する場合において、 半導体装置を 構成する半導体チップやその周辺回路等を高密度に実装し、 半導体装置 の更なる小型化、 薄型化を実現するのに有用である。 また、 本発明は、 シールドを含む半導体装置の製造コス トを削減するのに有用である。  INDUSTRIAL APPLICABILITY The present invention is useful for realizing further miniaturization and thinning of a semiconductor device by configuring a semiconductor chip and its peripheral circuits at a high density when forming an electromagnetic shield. is there. Further, the present invention is useful for reducing the manufacturing cost of a semiconductor device including a shield.

Claims

請 求 の 範 囲 The scope of the claims 1 . 半導体チップを絶縁性の第 1 の樹脂コートで封止し、 当該第 1の樹 脂コート上を導電性の材料を含む第 2の樹脂コートで覆ったことを特徴 とする半導体装置。 1. A semiconductor device wherein a semiconductor chip is sealed with an insulating first resin coat, and the first resin coat is covered with a second resin coat containing a conductive material. 2 . 少なく とも 1つの半導体チップを搭載する基板と、  2. a substrate on which at least one semiconductor chip is mounted; 上記半導体チップを封止する絶縁性の第 1 の樹脂コートと、 上記第 1 の樹脂コートを覆う導電性の材料を含む第 2の樹脂コートと を備えることを特徴とする半導体装置。  A semiconductor device comprising: an insulating first resin coat that seals the semiconductor chip; and a second resin coat containing a conductive material that covers the first resin coat. 3 . 上記半導体チップが搭載される部分の周囲に、 樹脂の流出を抑止す るための凹型または凸型のス トッパを形成したことを特徴とする請求の 範囲第 1項に記載の半導体装置。  3. The semiconductor device according to claim 1, wherein a concave or convex stopper for suppressing resin outflow is formed around a portion where the semiconductor chip is mounted. . 上記ス トツパを上記半導体チップの周囲の全てにわたって形成し、 上記ス トツパの内部領域に搭載される上記半導体チップと上記ス トツパ の外部領域との間の配線を、 複数層で形成された基板の中間配線層また は裏側配線層を介して行う ことを特徴とする請求の範囲第 3項に記載の 半導体装置。  The above-mentioned stopper is formed over the entire periphery of the above-mentioned semiconductor chip, and the wiring between the above-mentioned semiconductor chip mounted in the inner region of the above-mentioned stopper and the outer region of the above-mentioned stopper is formed by a substrate formed of a plurality of layers. 4. The semiconductor device according to claim 3, wherein the step is performed via an intermediate wiring layer or a back wiring layer. 5 . 上記ス トッパを上記半導体チップの周囲に離散的に形成したことを 特徴とする請求の範囲第 3項に記載の半導体装置。  5. The semiconductor device according to claim 3, wherein said stopper is formed discretely around said semiconductor chip. 6 . 半導体チップを絶縁性の第 1 の樹脂コートで封止する第 1の工程と 上記第 1 の樹脂コート上を導電性の材料を含む第 2の樹脂コートで覆 う第 2の工程とを有することを特徴とする半導体装置の製造方法。 6. A first step of sealing the semiconductor chip with an insulating first resin coat and a second step of covering the first resin coat with a second resin coat containing a conductive material. A method for manufacturing a semiconductor device, comprising: 7 . 基板上で半導体チップが搭載される部分の周囲に、 樹脂の流出を抑 止するための凹型または ώ型のス トツパを形成する第 1 の工程と、 上記ス トッパの内部領域に上記半導体チップを搭載して上記基板と電 気的に接続する第 2の工程と、 7. A first step of forming a concave or ώ-shaped stopper around the portion where the semiconductor chip is mounted on the substrate to prevent resin from flowing out; After mounting the chip, A second step of pneumatically connecting, 上記基板上に搭載された上記半導体チップを絶縁性の第 1 の樹脂コー 卜で封止する第 3の工程と、  A third step of sealing the semiconductor chip mounted on the substrate with an insulating first resin coat; 上記第 1 の樹脂コート上を導電性の材料を含む第 2の樹脂コートで覆 う第 4の工程とを有することを特徴とする半導体装置の製造方法。  A fourth step of covering the first resin coat with a second resin coat containing a conductive material.
PCT/JP2001/010097 2000-11-22 2001-11-19 Semiconductor device and its manufacturing method Ceased WO2002043135A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-356672 2000-11-22
JP2000356672A JP2002164479A (en) 2000-11-22 2000-11-22 Semiconductor device and manufacturing method thereof

Publications (1)

Publication Number Publication Date
WO2002043135A1 true WO2002043135A1 (en) 2002-05-30

Family

ID=18828869

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2001/010097 Ceased WO2002043135A1 (en) 2000-11-22 2001-11-19 Semiconductor device and its manufacturing method

Country Status (2)

Country Link
JP (1) JP2002164479A (en)
WO (1) WO2002043135A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110690198A (en) * 2018-07-05 2020-01-14 三星电子株式会社 Semiconductor package
CN113594151A (en) * 2021-06-25 2021-11-02 苏州汉天下电子有限公司 Semiconductor package and method of manufacturing the same
US12048088B2 (en) 2021-11-17 2024-07-23 Gn Hearing A/S Circuit board

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5625340B2 (en) * 2009-12-07 2014-11-19 富士通セミコンダクター株式会社 Semiconductor device and manufacturing method thereof
EP2940726B1 (en) * 2012-12-28 2017-08-09 Fuji Electric Co., Ltd. Semiconductor device
JP6566625B2 (en) 2014-11-06 2019-08-28 キヤノン株式会社 Electronic component, electronic module, manufacturing method thereof, and electronic device
CN117652208A (en) * 2021-07-29 2024-03-05 富士胶片株式会社 Electronic devices and manufacturing methods
WO2023189291A1 (en) * 2022-03-29 2023-10-05 富士フイルム株式会社 Method for manufacturing printed circuit board
EP4514074A1 (en) * 2023-08-23 2025-02-26 Heraeus Electronics GmbH & Co. KG Method for printing an electrically conductive layer on a surface of 3d electronic assembly and associated 3d electronic assembly

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5037366A (en) * 1973-08-06 1975-04-08
JPS59159547A (en) * 1983-03-03 1984-09-10 Matsushita Electric Ind Co Ltd Protecting method for semiconductor element
JPH024249U (en) * 1988-06-21 1990-01-11
JPH05235203A (en) * 1992-02-26 1993-09-10 Matsushita Electric Works Ltd Semiconductor device
US5656857A (en) * 1994-05-12 1997-08-12 Kabushiki Kaisha Toshiba Semiconductor device with insulating resin layer and substrate having low sheet resistance
JPH11135685A (en) * 1997-10-28 1999-05-21 Hitachi Ltd Semiconductor module and resin sealing method therefor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5037366A (en) * 1973-08-06 1975-04-08
JPS59159547A (en) * 1983-03-03 1984-09-10 Matsushita Electric Ind Co Ltd Protecting method for semiconductor element
JPH024249U (en) * 1988-06-21 1990-01-11
JPH05235203A (en) * 1992-02-26 1993-09-10 Matsushita Electric Works Ltd Semiconductor device
US5656857A (en) * 1994-05-12 1997-08-12 Kabushiki Kaisha Toshiba Semiconductor device with insulating resin layer and substrate having low sheet resistance
JPH11135685A (en) * 1997-10-28 1999-05-21 Hitachi Ltd Semiconductor module and resin sealing method therefor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110690198A (en) * 2018-07-05 2020-01-14 三星电子株式会社 Semiconductor package
CN110690198B (en) * 2018-07-05 2023-05-23 三星电子株式会社 Semiconductor package
CN113594151A (en) * 2021-06-25 2021-11-02 苏州汉天下电子有限公司 Semiconductor package and method of manufacturing the same
CN113594151B (en) * 2021-06-25 2024-05-14 苏州汉天下电子有限公司 Semiconductor package and method of manufacturing the same
US12048088B2 (en) 2021-11-17 2024-07-23 Gn Hearing A/S Circuit board

Also Published As

Publication number Publication date
JP2002164479A (en) 2002-06-07

Similar Documents

Publication Publication Date Title
US10490511B2 (en) Microelectronic assembly with electromagnetic shielding
KR102246040B1 (en) Circuit module
US9793223B2 (en) Semiconductor package and method of manufacturing the same
US10319685B2 (en) EMI shielded integrated circuit packages and methods of making the same
US20070246825A1 (en) High frequency module using metal-wall and method of manufacturing the same
US7745911B2 (en) Semiconductor chip package
TWI605564B (en) Package structure and its manufacturing method
WO2004010499A1 (en) Module component
KR20150121244A (en) Electromagnetic interference enclosure for radio frequency multi-chip integrated circuit packages
JP5750528B1 (en) Circuit board with built-in components
WO2008027888A2 (en) Radio frequency and electromagnetic interference shielding
US7915715B2 (en) System and method to provide RF shielding for a MEMS microphone package
US10861757B2 (en) Electronic component with shield plate and shield plate of electronic component
WO2002043135A1 (en) Semiconductor device and its manufacturing method
JP2005136272A (en) Semiconductor device for mounting high-frequency components
JPH03120746A (en) Semiconductor device package and semiconductor device package mounting wiring circuit board
CN112825318A (en) Electronic component module
KR101053296B1 (en) Electronic device with electromagnetic shielding
JP4494714B2 (en) Printed wiring board
JP5577716B2 (en) Circuit module and method for manufacturing circuit module
JP2025041962A (en) Electronic device and chip packaging method
US20220310317A1 (en) Electronic component module
JP2940478B2 (en) Shielded surface mount components
KR100698570B1 (en) Package device with electromagnetic interference shield
JP2010010550A (en) Mounting structure of electronic part

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): CN KR US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase