WO2001023900A1 - Test language conversion method - Google Patents
Test language conversion method Download PDFInfo
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- WO2001023900A1 WO2001023900A1 PCT/US2000/026189 US0026189W WO0123900A1 WO 2001023900 A1 WO2001023900 A1 WO 2001023900A1 US 0026189 W US0026189 W US 0026189W WO 0123900 A1 WO0123900 A1 WO 0123900A1
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- test
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- stil
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318314—Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318307—Generation of test inputs, e.g. test vectors, patterns or sequences computer-aided, e.g. automatic test program generator [ATPG], program translations, test program debugging
Definitions
- This invention relates to a test data conversion method for testing semiconductor devices by automatic test equipment, and more particularly, to a method of converting digital test vectors written in STIL (Standard Test Interface Language) to digital test vectors of a test language unique to the automatic test equipment.
- STIL Standard Test Interface Language
- a semiconductor IC device to be tested In testing semiconductor devices such as ICs and LSIs by automatic test equipment (ATE) or an IC tester, a semiconductor IC device to be tested is provided with test signals or test patterns produced by an IC tester at its appropriate pins at predetermined test timings.
- the IC tester receives output signals from the IC device under test in response to the test signals.
- the output signals are strobed or sampled by strobe signals generated by the IC tester with predetermined timings to be compared with expected data to determine whether the IC device functions correctly or not.
- timings of the test signals and strobe signals are defined relative to a start timing of each test cycle of IC tester.
- an IC tester generates test patterns and strobes, i.e., test vector, based on digital test vector data described in a language (format) unique to the tester.
- test patterns and strobes i.e., test vector
- Such languages for automatic test equipment are different from manufacturer to manufacturer.
- STIL Standard Test Interface Language
- ATE automatic test equipment
- the STIL test language has recently become a standard. At present, however, most ATE systems do not use STIL as a native language. Such native languages provided by test equipment manufacturers are not compatible to one another. Accordingly, there is a need to effectively convert STIL to the ATE native language.
- an object of the present invention to provide a method of converting digital test vectors of one cycle based test language to another cycle based test language with high efficiency and accuracy.
- STIL Standard Test Interface Language
- the method of converting test vectors in an original cycle based test language into a target cycle based test language comprising the following steps of: reading available waveforms defined in the target test language and forming a set of templates depicting the waveforms where each template corresponds to a waveform of the target test language and includes data showing at least a starting value of a segment of waveform and a number of subsequent edges in the waveform; reading the test vectors of the original test language and decomposing a waveform in the test vectors in the original test language into a set of constituent events where each event includes data showing at least a starting value and a number of subsequent edges of the waveform; comparing the template derived from the waveform in the target test language and the set of events derived from the original test language; storing the waveform data in the target test language when a match is detected in the comparison step and retrieving corresponding parameters of the waveform in the test vectors of original test language and storing the parameters in combination with the matched waveform data; and repeating the above steps for
- the step of comparing the template and the set of events includes a step of changing different levels of test vectors, in the order of a signal level, a wavekind level where the signal is configured by a plurality of wavekinds, a character level where the wavekind is configured by a plurality of characters.
- the set of events derived from the original test language is stored in a table format having columns assigned to the data showing the number of subsequent edges and the starting value.
- the table storing the set of events is optimized by studying the starting value of a particular event based on an ending state produced by the previous event, thereby simplifying the data in the table.
- Figure 1 is a diagram showing an example of format in STIL which describes signals or signal groups in the digital test vectors which constitute intended test vectors.
- Figure 2 is a diagram showing an example of format in
- STIL which describes timings of edge in each of the signals constituting the waveforms.
- Figure 3 is a diagram showing an example of format in STIL which describes patterns of vectors in each of the signals constituting the waveforms.
- Figure 4 is a diagram showing an example of format in STIL which describes a flow of patterns in the test vectors constituting the intended waveforms.
- FIG. 5 is a diagram showing an example of format in TDL (Test Description Language) which is a test language native to ATE system developed by the assignee of this invention.
- TDL Test Description Language
- Figure 6A is a schematic diagram showing a basic principle of test language conversion in accordance with the present invention
- Figure 6B is a schematic diagram showing an example of functional configuration in the test language conversion of the present invention.
- Figure 7 is a diagram showing an example of STIL construct and an equivalent TDL representation, and a template of waveform based on the TDL representation.
- Figure 8 is a diagram showing other examples of STIL constructs, waveforms corresponding to the STIL constructs, and the TDL representations.
- Figure 9 is a diagram showing further examples of STIL constructs, waveforms corresponding to the STIL constructs, and the TDL representations for explaining the optimization waveforms .
- Figures 10A and 10B are tables showing examples of array depicting starting values and number of edges which represent decomposed events in the STIL test vectors for conducting the pattern match of the present invention.
- Figure 11 is a flow diagram showing an example of procedure in the wavekind matching of the present invention in the different levels of test vectors.
- Figure 12 is a flow diagram showing an example of procedure in the wavekind matching of the present invention from the previous cycle to the next cycle.
- Figure 13 is a diagram showing a basic idea of converting the STIL test vectors to multi-clock test signals of TDL when types of DUT pin are appropriate to such multi- clock signals.
- Figure 14 is a waveform diagram showing a basic idea of converting the STIL test vectors to the pin multiplexing test vectors of TDL. Detailed Descriptions of the Preferred Embodiments
- the STIL (Standard Test Interface Language) testing language defines pattern and timing information for device testing using a cycle-based representation.
- the format used does not represent the language of any ATE systems, but has been constructed to provide the maximum flexibility in designing test programs .
- STIL has only recently been adopted as a standard and is not yet in widespread use.
- a number of STIL-based applications have been proposed in recent years, including general test flow, scan test methodology and ATPG (automatic test pattern generator) .
- ATPG automatic test pattern generator
- TDL Test Description Language
- Figures 1-4 showing examples of format in STIL for describing the digital test vectors.
- Figure 1 shows formats of signals and signal groups
- Figure 2 shows formats of timings of edges in each signal.
- Figure 3 shows an example of STIL format describing patterns of test vectors
- Figure 4 shows an example of STIL format describing the flow of patterns.
- Figure 5 is a diagram showing an example of format in TDL which is a target test language. Template Matching
- event is any change such as edges in test vectors or no changes defined relative to timing.
- the two cycle-based descriptions will usually be substantially different from one another.
- an intervening event-based representation is used to decompose the data to basic building blocks. Namely, the input cycle-based format (STIL) is decomposed into constituent events and these events are reconstructed in the target description format (TDL) .
- TDL target description format
- Figure 6A This basic process is illustrated in Figure 6A which performs the vector-based to vector-based conversion process.
- the test vectors in the STIL format is decomposed into each event which is compared with templates produced based on waveforms defined in TDL, an example of target test language. This concept is shown by the arrows of dotted lines in Figure 6A.
- the matched template is listed in a file to which the parameters in the corresponding STIL test vectors are transferred to complete the waveform.
- the TDL test vectors are created as shown by the arrow of dotted line in Figure 6A.
- Figure 6B is a functional representation of the test vector conversion of the present invention from the STIL test language to the TDL test language.
- a STIL vector file 21 is a file storing STIL test vectors to be converted to TDL vectors through the conversion process of the present invention.
- the STIL test vectors in the STIL file 21 are derived from the design stage of semiconductor devices, i.e., CAE (Computer-Aided Engineering) environment or EDA (Electronics Design Automation) environment as a result of conducting logic simulation.
- the STIL vectors are decomposed into constituent events and stored in a decomposed event file 24.
- TDL is a test language developed by Advantest Corporation, the assignee of the present invention, to establish a logic test pattern (LPAT) file.
- the format of TDL is stored in a TDL wavekind file 22.
- Each waveform defined in the target test language TDL is converted to a corresponding template having a set of components.
- Such templates of waveforms are stored in a template file 25.
- a pattern matching is performed by a comparator 26 between the events from the event file 24 and the templates from the template file 25.
- the waveform corresponding to TDL is listed in a file 28 which stores template matched data representation.
- the details of parameters for the vectors of the matched template are transferred from the STIL vectors to the TDL vectors.
- Such details of the vectors include timings, pattern characters, and types of edge.
- the shaded portion means that the logic state in this area is undefined.
- the character '0' defines the falling edge Tl at 400ns from the start of the test cycle whatever the current logic status is.
- the waveform of the character ' 1 ' defines the falling edge Tl at 400ns from the start of the test cycle whatever the current logic status is.
- this example of STIL construct corresponds to the NRZ waveform of TDL. Therefore, in the conversion method of the present invention, the construction of TDL waveforms from the decomposed STIL waveform descriptions is carried out using a template matching method. The waveforms available for a given tester are read in at run time and stored in a manner that makes template matching easy.
- a list of templates is established for each waveform such as NRZ defined in TDL.
- the template is characterized by the set of ⁇ pattern character, starting value, number of subsequent edges ⁇ pairs that describe the waveform.
- the representation of the NRZ waveform in the above example is shown in the lower part of Figure 7.
- the first element on each line is the pattern character while the next two elements represent the ⁇ starting value, number of subsequent edges ⁇ pairs while the remaining entries indicate the names for the specified edges.
- the decomposed STIL waveform and the template of TDL are compared with one another.
- the STIL waveform is decomposed into each event which is expressed by a combination of starting value and number of edges.
- the data describing the starting value and number of edges of each event in the STIL waveform i& stored in the event file 24 of Figure 6B.
- the comparison between the decomposed events and the template is made by comparing the starting value and the number of edges. This is done as a query against the waveforms, essentially asking, "can you support this many edges with this starting value?".
- mapping of an STIL waveform to a template requires matching all of the resulting triples that comprise the waveform.
- the characters '01' from STIL result in the four triples shown in the template of Figure 7. All four of these must be mapped in order for these characters to be fully represented.
- the NRZ is capable of supporting all of the required triples.
- the template of RZ waveform of TDL is set in the template file 25 of Figure 6B .
- the template matching examples shown in the preceding section are very simple. They match directly with standard waveforms, NRZ and RZ . These waveforms may be used on the test equipment running with TDL without any resource penalty. However, in the real test implementation, more complex waveforms are also used.
- the pattern character "0" can be matched by a NRZ or RZ waveform.
- XOR exclusive OR
- Unused Initial Value In STIL, all of the information about the waveforms that will be used is presented up front in the WaveformTable construct. Analysis can be performed on this information to determine characteristics of the available wave shapes. This information can be used to make informed optimization. In this section, the concept of "unused initial value" is examined to see how this can help with optimization.
- a set of pattern characters presented to a given signal defines a continuous waveform despite the use of the discrete characters. Consequently, the starting state experienced by a given character is based on the ending state produced by the previous character.
- the set of ending value is, therefore, contained within the information in the WaveformTables .
- the exception to this statement is the signal starting value, which can be set arbitrarily by the user. In order to allow optimization of the template matching algorithm, it is imperative that the user make intelligent choices about starting value.
- WaveformTable-based analysis of the STIL characters is described with reference to the tables of Figures 10A and 10B and charts of Figures 11 and 12. This entails cataloging the requirements of all pattern characters and forming composite representations of these data at several levels (Sll in Figure 11) . Note that these data need not be compiled across all pins or pin groups, but only within a signal. For each signal, the wave shape requirement data are compiled at three levels (S12 in Figure 11) :
- the data to be stored at each of the levels indicated above is the same: the starting value and number of edges required by the STIL pattern characters. This is stored in an array whose dimensions are based on characteristics of the target ATE system. With use of the "unused initial value” technique described above, the capacity of array can be significantly reduced.
- the number of drive edges that can be supported per time set is read in at run time and this is used for one dimension of the array. The other dimension is two, the number of possible starting values "1" or "0" in a binary logic system. Each combination of starting value and number of edges that requires support is set to true (T) . The rest are false (F) .
- the array (matcharray) of decomposed events each forming a starting value and number of edges is created in the event file 24 of Figure 6B to be compared with the counterpart waveform data in the template file 25.
- the match against the available waveforms is made (S13 in Figure 11) .
- the waveforms available to the target ATE system read in at run time) are stored based on the starting value and number of edges they can support in the template file 25.
- the structure in the templates is analogous to the matcharray shown above except that the entry in each box of tables in Figures 10A and 10B is a collection of wavekind object pointers that can satisfy the indicated combination of starting value and number of edges.
- the RZO waveform would be found in the ⁇ , ⁇ , ⁇ 0,2 ⁇ , ⁇ l, ⁇ and ⁇ l,l ⁇ array elements as it can support all of these combinations. Note that this refers to the RZO waveform in TDL where there is no activity for the pattern character '0'. Thus, the ⁇ l ⁇ combination exists. The industry standard RZ waveform would return to zero for both pattern characters '0' and '1', and the ⁇ l, ⁇ combination would not be possible.
- the wavekind object can be queried for all combinations that it can support. For example, for accessing the RZO object through the ⁇ 0,0 ⁇ entry, the matching process can simply ask the RZO object about other combinations "can you support ⁇ 0,2 ⁇ " which would return true, "can you support ⁇ l,2 ⁇ ” which would return false. Thus, the matching process would find the object via the numerically lowest ⁇ starting value, number of edge ⁇ pair that was required and then query the object for the rest of the desired states. If any of these queries fail, this wavekind will not work and the matching process goes to the next entry in the original list and try the process again. Once a successful match has been made for a given wavekind, the values for parameters must be set (S14 in Figure 11) .
- the decomposed STIL characters contain time values for transitions, and the wavekind objects contain strings for the names of their relevant resources.
- the match of the ⁇ 0,2 ⁇ case completes with the association of the time value 200ns with the string "Tl", and 400ns with string "T2".
- These pairings are stored in a table corresponding to the STIL character '1' as defined in the WaveformTable .
- the WaveformTable-based analysis method takes advantage of economies available when the source format is cycle-based. The information regarding the formats that will be used for the entire process is available up-front and can be processed, analyzed and optimized before pattern conversion begins. Once this has been completed, the processing of the vectors becomes very simple.
- the STIL pattern character is accessed (S21 in Figure 12) , the previous signal value (stored at the end of the previous cycle) is recalled (S22 in Figure 12) and these data are used to access the information stored for the ⁇ starting value, STIL pattern character ⁇ pair, i.e. the wavekind and parameter information determined from the matching process (S23 and S24 in Figure 12) . Then, the ending value is stored for beginning of the next cycle (S25 in Figure 12) .
- the source format is event-based, for example, VCD (Value Change Dump) data by Verilog.
- VCD Value Change Dump
- the wave format information is usually not available up front . Matching of source data to target wave shapes must be done as the vectors are processed. This can lead to poor choices that are avoided using proper table analysis techniques.
- the preceding description has focused on the mapping of input STIL characters to TDL equivalents.
- the "input” here means a test pattern supplied (drive) to a pin of device under test (DUT) .
- the test vectors include the test patterns (input) and strobes (output or compare) .
- a strobe is a timing pulse either with edge (no pulse width) or window (predetermined pulse width) to sample the device output signal.
- the output mapping strategies are described which deals with conversion of strobe signals (compare) in the STIL format to the TDL format.
- the behaviors specified in the STIL file can be directly translated to pattern characters.
- LHZX ⁇ '0ns' Z; '0ns' X; '260ns' L/H/T/X; ⁇ can be mapped directly to edge strobes for the appropriate value, if all are applicable. In other words, the template matching is unnecessary in this process.
- LHZX ⁇ '0ns' Z; '0ns' X; '260ns' 1/h/t/x; '500ns' x ⁇ can be mapped to the appropriate window strobe.
- the output conversion There are several points worth noting about the output conversion. The first is that some ATE may not allow switching of strobe type on-the-fly. Thus, edge and window strobes may not be mixed. A solution in this case is to make all strobes into window strobes, with edge strobes made into window strobes as narrow as allowed by the system. The second point is that STIL pattern characters that request multiple strobes within a cycle may or may not be compatible with the target ATE system. The capabilities of the ATE system family is built into the conversion tool with a resource file read at run time to indicate which subset of these features is actually present on a given target ATE system. This would include behaviors such as transition and double strobe modes . Bidirectional Signal Conversion
- Bidirectional signal conversion provides the most complexity in the entire process.
- the term "bidirectional" means conversion of test language from the STIL formate to the native language format for the test vectors assigned to device pin which functions both input and output. All of the features required for input and output matching noted above are present as well as additional features unique to bidirectional signals.
- bidirectional signals often place limitations on tester resources above and beyond those placed by simple input or output signals. As an example, the number of available edges may be reduced due to the need for driver control signals to determine the directional state of the bidirectional signal.
- the considerations for driver control are based on the characteristics of the STIL pattern characters and the capabilities of the target ATE system.
- a standard paradigm is to provide two driver enable modes, one that mimics the NRZ behavior, and one for RZ .
- the cycle becomes "drive” (input) at some point and remains that way through the end of the cycle.
- the cycle becomes "drive” and then “compare” (output) during the cycle. Note that the cycle being in "compare” mode does not mean that a comparison is actually taking place, just that the pin is to be treated as an output. This distinction becomes important with regard to target ATE capabilities for drive and compare in a cycle.
- the driver enable mode is determined from the STIL pattern characteristics by noting that an NRZ driver enable mode is preferred since it requires fewer tester resources. This mode is chosen unless specifically required to use the RZ mode. This only happens when a "drive” region is surrounded by “compare” regions in the same cycle. Again, actual comparisons may not be occurring, but the device pin is acting as an output.
- the time values for the driver control edges are determined from the transition times for the signal direction.
- driver type information makes the "matcharray” process described above quite a bit more complex.
- the drive portions of the signal are matched against the available waveforms while the overall character of a cycle, in terms of "drive” and “compare” portions are compared against the capabilities of the target ATE system.
- STIL contains the concept of the "DrivePrior" event.
- the DrivePrior is only relevant for bidirectional signals where it represents the last drive state attained by the signal, regardless of any intervening strobe activity.
- the presence of a strobe character affects the state of the driver in the system. For example, if the last "drive” state is "D” , and this is followed by a strobe for "H” , the driver can be set to a "U” state for the next drive cycle.
- the "DrivePrior” is intended to handle this case.
- the data used in these entries must be used properly in order for the concept of the "DrivePrior” to work properly.
- the desired initial state as given by the "DrivePrior” value, must be reconciled with the actual state of the driver, previous value.
- the driver is in the "U” state
- the STIL pattern character is requesting the device to be in the "D” state based on the inclusion of the "DrivePrior” or "P” event in the description.
- the waveform chosen to match this pattern character must be able to reconcile these values, driving the pin from the "U” state to the "D” state by the time required. This can result in an additional edge not readily apparent from the STIL pattern character description.
- test language conversion is further discussed as to the processing of special features provided in the target ATE system. These features represent those found on the assignee's ATE system, Advantest Model T6600 IC tester family, but they are quite general and may be found, in some form, on a variety of test systems. Thus, brief discussion is made as to the algorithms used to map the STIL information to these features. Multi-Clock Signals
- the multi-clock (MCLK) signal type is commonly used for providing more pulses per cycle than the ATE system can theoretically provide. This is done for repetitive waveforms by essentially breaking the tester cycle into a series of subcycles (internally) and providing multiple copies of a basic waveform, one per subcycle. The result is the appearance of a greater number of edges than possible in the rated test cycle.
- the key to the use of the MCLK paradigm is that the waveform must contain a basic repeatable unit within the cycle.
- the discovery that a STIL pattern character contains too many edges leads to an attempt to match the character using an MCLK format.
- the number of edges must be even (the MCLK format is pulse-based) .
- the constraints that must be satisfied for a single-pulse repeatable waveform are derived with regard to an upper waveform of Figure 13.
- Input pin mapping is performed by a search of the wavekind space attempting to match the capabilities of the wavekind with the requirements of the STIL pattern character. The details of this approach have been discussed above.
- PMUX the responsibility for matching the requirements of the STIL pattern character is shared between the two tester channels.
- the issue presented by the added flexibility is one of determining a "requirement sharing" methodology.
- the signal proposed for Channel (Pin) 1 provides the rising edge at T a , as desired (second waveform from the top in Figure 14) . Since there are no edges in the second portion of the signal, Pin 2 need have no edges (third waveform from the top in Figure 14) . In the second cycle, Pin 1 remains high as there are no edges . In the second part of the cycle, there is a low-going edge. Since Pin 2 is already in the "L" state, no edge will be generated. It is clear from this example that the simple approach will not work in this case. The signal will look exactly like the waveform on Pin 1 as Pin 2 has no edges. This has happened because the continuity across channels has not been maintained.
- Pin 2 needs to be aware that Pin 1 has ended in an "H” state so that subsequent edges on the system, in this case the transition to "L" at T a in the second cycle, will be handled properly. This can be accomplished by replacing the waveform for Pin 2 above with that shown in the bottom of Figure 15. Here the waveform for Pin 2 is brought to the "H” state at the split time. This will have no effect on the composite signal as the driver is already in the "H” state due to the action of Pin 1. It does, however, condition Pin 2 to be in a consistent state with Pin 1. When the low-going edge happens in the second cycle during the Pin 2 portion this will result in a low-going transition on Pin 2 at T b as desired. This demonstrates the channel consistency problem that must be handled for PMUX signals.
- PMUX with bidirectional signals allows features that might not otherwise be available. This is a primary use for the PMUX construct, rather than for pure input or output signals. Probably the single most important use of the PMUX is to allow drive and compare within a cycle, if the target ATE system does not allow this. For cases where a STIL pattern character for a bidirectional signal specifies pure drive or compare behavior for a cycle, the processing is virtually identical to that described with respect to the input and output pin multiplexing above. When the behavior is mixed, the split time for dividing the cycle between the channels is based on the time of the direction switch. This leads to a very natural division of the responsibilities of the two channels.
- test vectors in an original test language are converted to a target test language with high efficiency and high accuracy.
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Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/089,137 US6978410B1 (en) | 1999-09-25 | 2000-09-23 | Test language conversion method |
| DE10085006T DE10085006B4 (en) | 1999-09-25 | 2000-09-23 | Method of translating test vectors |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US15612199P | 1999-09-25 | 1999-09-25 | |
| US60/156,121 | 1999-09-25 |
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| WO2001023900A1 true WO2001023900A1 (en) | 2001-04-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| PCT/US2000/026189 Ceased WO2001023900A1 (en) | 1999-09-25 | 2000-09-23 | Test language conversion method |
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| Country | Link |
|---|---|
| KR (1) | KR100533558B1 (en) |
| DE (1) | DE10085006B4 (en) |
| TW (1) | TWI227329B (en) |
| WO (1) | WO2001023900A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI459334B (en) * | 2012-09-10 | 2014-11-01 | Univ Nan Kai Technology | Word testing system and method thereof |
| US10083155B2 (en) | 2016-05-17 | 2018-09-25 | International Business Machines Corporation | Method for detecting original language of translated document |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR101626382B1 (en) * | 2009-12-04 | 2016-06-01 | 한국전자통신연구원 | Testing language conversion apparatus and its method |
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- 2000-09-22 TW TW089119684A patent/TWI227329B/en active
- 2000-09-23 DE DE10085006T patent/DE10085006B4/en not_active Expired - Fee Related
- 2000-09-23 KR KR10-2002-7003847A patent/KR100533558B1/en not_active Expired - Fee Related
- 2000-09-23 WO PCT/US2000/026189 patent/WO2001023900A1/en not_active Ceased
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI459334B (en) * | 2012-09-10 | 2014-11-01 | Univ Nan Kai Technology | Word testing system and method thereof |
| US10083155B2 (en) | 2016-05-17 | 2018-09-25 | International Business Machines Corporation | Method for detecting original language of translated document |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020060701A (en) | 2002-07-18 |
| DE10085006B4 (en) | 2011-04-07 |
| DE10085006T1 (en) | 2002-10-24 |
| TWI227329B (en) | 2005-02-01 |
| KR100533558B1 (en) | 2005-12-06 |
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