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WO2001003312A1 - Appareil de reception multistandard et procede de definition de parametres associe - Google Patents

Appareil de reception multistandard et procede de definition de parametres associe Download PDF

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Publication number
WO2001003312A1
WO2001003312A1 PCT/EP2000/006447 EP0006447W WO0103312A1 WO 2001003312 A1 WO2001003312 A1 WO 2001003312A1 EP 0006447 W EP0006447 W EP 0006447W WO 0103312 A1 WO0103312 A1 WO 0103312A1
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WO
WIPO (PCT)
Prior art keywords
analog
digital
signal
converter
bandwidth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/EP2000/006447
Other languages
English (en)
Inventor
Nevio Benvenuto
Gian Antonio Mian
Fabio Momola
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telit Mobile Terminals SpA
Original Assignee
Telit Mobile Terminals SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telit Mobile Terminals SpA filed Critical Telit Mobile Terminals SpA
Priority to AU62701/00A priority Critical patent/AU6270100A/en
Publication of WO2001003312A1 publication Critical patent/WO2001003312A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/392—Arrangements for selecting among plural operation modes, e.g. for multi-standard operation
    • H03M3/396—Arrangements for selecting among plural operation modes, e.g. for multi-standard operation among different frequency bands
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/43—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
    • H03M3/44—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable
    • H03M3/446—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle, i.e. causing the modulator to operate in a chaotic regime
    • H03M3/448—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle, i.e. causing the modulator to operate in a chaotic regime by removing part of the zeroes, e.g. using local feedback loops
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
    • H03M3/45—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with distributed feedforward inputs, i.e. with forward paths from the modulator input to more than one filter stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
    • H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
    • H03M3/454—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Definitions

  • the present invention relates to a multi-standard digital receiver.
  • a digital receiver structure which is advantageous for the provision of software-defined receivers .
  • the present invention also relates to a method for the design of parameters for said apparatus .
  • SDR software defined radio
  • the digital part of the receiver can be implemented by software and then adapted rapidly to operation with a number of standards, the analog part has to be redesigned each time or in any case modified physically.
  • the desire to handle the signal in digital as much as possible conflicts with the computational capacity of present digital technology.
  • the general purpose of the present invention is to remedy the above mentioned shortcomings by making available an innovative digital radio structure in which digital signal treatment is initiated further upstream than is done in digital radio of known structure while at the same time keeping the computational power necessary for the practical production of SDR radios relatively limited. Another purpose is to make available a method for selection of the apparatus parameters .
  • a digital receiving apparatus adaptable to reception of a service from among a plurality of services and comprising in cascade an input analog section, an analog-to-digital converter and a digital signal treatment section and characterized in that the analog section has a pass band suited to treatment of a signal having bandwith at least equal to the bandwidth of the widest channel of all the services of the plurality and in that the analog-to-digital converter in addition to analog-to-digital conversion carries out filtering with bandwidth near the bandwidth of the service selected to be actually received from among all those of the plurality.
  • a method for setting operating parameters in a digital receiving apparatus adaptable to reception of a service from among a plurality of services and comprising in cascade an input analog section, an analog-to-digital converter and a section for digital treatment of the signal with the analog section supplied with a pass band suited to treating a signal with bandwidth at least equal to the bandwidth of the widest channel of all the services of the plurality and with the analog-to-digital converter which in addition to analog-to- digital conversion provides filtering with bandwidth near the bandwidth of the service selected to be actually received from among all those of the plurality with the analog-to-digital converter comprising a Sigma-Delta converter in which are definable a transfer function H x (z) for the signal and a transfer function H N (z) for the noise with the method comprising the steps of:
  • FIG 1 shows a block diagram of a digital receiving radio structure
  • FIG 2 shows a Sigma-Delta ADC converter of a digital radio provided in accordance with the present invention
  • FIG 3 shows the interference mask of a GSM signal in the worst case
  • FIG 4 shows the response in frequency of an ADC converter in accordance with the present invention in an embodiment for GSM transmission reception.
  • FIG 1 shows the general structure of a digital receiver indicated as a whole by reference number 10 and comprising an analog input section 11 which receives the signal v r (t) and gives at output a signal x(t) which is sent to an analog-to-digital converter (ADC) 12.
  • ADC analog-to-digital converter
  • the analog stage carries out all those functions known to the those skilled in the art to make the received signal suitable for treatment by the ADC converter.
  • the radio apparatus 10 is the multi-standard type i.e. it must be adaptable to the reception of a standard or service from among a plurality of standards or services. For our purposes these services are characterized by fp frequencies in which the channel pass band ends and fs frequencies in which the interdicted band begins .
  • the analog section is accomplished to have a pass band suited to treatment of a signal with bandwidth at least equal to the bandwidth of the widest channel of all the services of the plurality.
  • the analog stage limits the bandwidth of the received signal to the widest bandwidth of those of the services of the plurality which it is intended to be receivable by the receiver.
  • This bandwidth in the analog section in case of reception of services with bandwidth narrower than the maximum planned the converter will with all probability receive at input a high quantity of interference.
  • the conventional solutions proposed for the problem of ADC conversion in digital receivers and in particular software defined ones consist of second order Sigma-Delta converters, i.e. second order Sigma-Delta modulators followed by a decimator filter. This structure ensures a high signal to quantization noise ratio because the modulator colors the quantization noise, takes it out of the useful channel and permits use of digital filtering which removes the noise in the attenuated band.
  • the weakness of the known solution lies in the fact that it does not introduce any kind of coloration on the useful signal input (in a known second order Sigma-Delta modulator the signal transfer function is a simple unitary delay) and therefore does not allow for the presence of interferers . If allowance is made for the interference mask it is noted that the digital filter required at the converter output has a rather high order.
  • the modulator in accordance with the present invention can take advantage of bandwidth knowledge of the useful channel and of the interference characteristic to introduce an attenuation of the interference while keeping the spectrum of the useful channel unchanged.
  • FIG 2 shows a Sigma-Delta converter used in accordance with the present invention.
  • This converter 12 is a particular embodiment of a Sigma-Delta modulator which uses a linear filter with fourth order feed back.
  • the signal X(z) input to the converter is weighted with the coefficients bi and applied to the adders which receive the feedback weighted with the coefficients -ai and coming from a digital analog converter (DAC) which in turn receives the output value Y(z) at input.
  • the error signal output from each adder is weighted with the coefficient Ci and sent to an accumulator ( z -1 / ( 1-z "1 ) ) to reach the adder of the next stage.
  • the last adder receives only the error signal and the input X(z) weighted with the coefficient b 5 and its output is sent to a quantizer 15, e.g. a 1. Local feedback with coefficient -gi can also be provided.
  • FIG 2 The structure of FIG 2 can be thought of as a linear system with two inputs and one output and hence described by an assembly of four matrices ⁇ A,B,C,D ⁇ :
  • s(n) is the status vector formed with the L accumulator outputs and Y NQ is system output before the quantizer 15.
  • the system coefficients must be sized for the particular channel but the converter architecture always remains the same. To change channel it therefore suffices to change the ai, bi, ci, gx coefficients.
  • the quantizer of FIG 2 can be modeled like an added noise source. With this linear model the modulator output can be described as the sum of the input signal X(z) multiplied by the signal transfer function indicated by H x (z) and the quantization noise N q (z) multiplied by the noise transfer function indicated by H N (z).
  • L is the order of the modulator, i.e. the number of accumulators or integrators used in the structure.
  • Linearization of the modulator diagram permits reduction of the modulator design problem to a simpler one of design of a linear filter, i.e. finding a satisfactory form of H x (z) and H N (z). It was found that linearization of the modulator diagram is a sufficiently accurate approximation for the purposes of the present invention.
  • (1) and (2) require that H x (z) and H N (Z) have the same poles.
  • the noise transfer function is responsible for minimization of the noise within the useful band, hence maximization of the SNR.
  • the H N (z) chosen must however give a functioning modulator and therefore must meet other design constraints. To ensure modulator stability it is advisable to limit gain outside the H N (z) band to less than 2. Providing a safety margin we can set:
  • the design method in accordance with the innovative principles of the present invention comprises two main steps. As the first step the noise transfer function is optimized. This also permits setting the H x (z) poles which, as mentioned, are the same as those of H N (z). In the second step the zeros are optimized using advantageously the following cost function: fs 1/2 °- 5 1/2
  • Hi dea ⁇ is the ideal transfer function defined as: [1 , in-band
  • the parameter ⁇ can be interpreted as a weight function.
  • the frequencies fp and fs for these services are:
  • DECT GSM IS-54 fp (kHz) 576 100 12 fs (kHz) 1728 200 30
  • FIG 3 shows the interference mask of the worst case GSM signal.
  • the signal spectrum received is drawn with ' solid lines while that of the interference is drawn with dashed lines. It may be seen that the power of the channel which interests us can be more than 70dB below the interference and that this situation already appears as having to do with bandwidths less than 2MHz.
  • the ADC converter also has to provide the filter function to keep the signal within 200kHz unchanged and filtering for the frequencies between 200kHz and the 2MHz upper limit.
  • the poles and zeros for the noise and signal transfer functions whose corresponding frequency responses are shown in FIG 4 with
  • the in-band quantization noise attenuation level is -62dB.
  • the modulator introduces a strong interference attenuation. As mentioned, this considerably simplifies the duty of the following digital filter.
  • the optimal converter would require optimization of the zeros of H N (z) since in the opposite case it would no longer be possible to adequately color the quantization noise and we are forced to accept a powerful quantization noise in the useful band of the channel. It would therefore be necessary to reintroduce the gi coefficients and give up the simplification made at the beginning.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

L'invention concerne un appareil de réception numérique multistandard, destiné à la réception d'un service parmi un ensemble de services. Ledit appareil comprend, en cascade: une section analogique d'entrée (11); un convertisseur analogique-numérique (12); et une section de traitement du signal numérique (13, 14). La section analogique (11) possède une bande passante convenant au traitement d'un signal dont la largeur de bande est au moins égale à la largeur de bande du canal le plus large de tous les services. Outre la conversion analogique-numérique, le convertisseur analogique-numérique (12) effectue le filtrage avec une largeur de bande proche de celle du service sélectionné pour être reçu parmi l'ensemble de services.
PCT/EP2000/006447 1999-07-06 2000-07-05 Appareil de reception multistandard et procede de definition de parametres associe Ceased WO2001003312A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU62701/00A AU6270100A (en) 1999-07-06 2000-07-05 Multi-standard receiving apparatus and method of defining parameters therein

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
ITMI99A001482 1999-07-06
IT1999MI001482A IT1313303B1 (it) 1999-07-06 1999-07-06 Apparecchio ricevente digitale multi-standard e metodo di definizionedi parametri in esso.

Publications (1)

Publication Number Publication Date
WO2001003312A1 true WO2001003312A1 (fr) 2001-01-11

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AU (1) AU6270100A (fr)
IT (1) IT1313303B1 (fr)
WO (1) WO2001003312A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1248375A1 (fr) * 2001-04-02 2002-10-09 STMicroelectronics N.V. Procédé de conversion analogique/numérique d'un signal analogique au sein d'un terminal d'un système de communication sans fil, par exemple un téléphone mobile, et terminal correspondant.
EP1437834A1 (fr) * 2003-01-10 2004-07-14 STMicroelectronics N.V. Dispositif d'amplification de puissance, notamment à dynamique d'entrée réduite, en particulier pour un téléphone mobile cellulaire
US7944385B2 (en) 2006-01-25 2011-05-17 Nxp B.V. Continuous-time sigma-delta analog-to-digital converter with capacitor and/or resistance digital self-calibration means for RC spread compensation
US8159380B2 (en) 2004-11-16 2012-04-17 St-Ericsson Sa Continuous-time sigma-delta analog-to-digital converter with non-invasive filter(s) for immunity preservation against interferers

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
BOEHM K ET AL: "An IF digitizing receiver for a combined GPS/GSM terminal", PROCEEDINGS RAWCON 98. 1998 IEEE RADIO AND WIRELESS CONFERENCE (CAT. NO.98EX194), PROCEEDINGS RAWCON 98. 1998 IEEE RADIO AND WIRELESS CONFERENCE, COLORADO SPRINGS, CO, USA, 9-12 AUG. 1998, 1998, New York, NY, USA, IEEE, USA, pages 39 - 42, XP002150897, ISBN: 0-7803-4988-1 *
GUNN J E ET AL: "A LOW-POWER DSP CORE-BASED SOFTWARE RADIO ARCHITECTURE", IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS,US,IEEE INC. NEW YORK, vol. 17, no. 4, April 1999 (1999-04-01), pages 574 - 590, XP000824304, ISSN: 0733-8716 *
JANTZI S A ET AL: "A 4TH-ORDER BANDPASS SIGMA-DELTA MODULATOR", PROCEEDINGS OF THE CUSTOM INTEGRATED CIRCUITS CONFERENCE,US,NEW YORK, IEEE, vol. CONF. 14, 3 May 1992 (1992-05-03), pages 1651 - 1654, XP000340923, ISBN: 0-7803-0593-0 *
SHENGPING YANG ET AL: "A tunable bandpass sigma-delta A/D conversion for mobile communication receiver", VTC 1994. 'CREATING TOMORROW'S MOBILE SYSTEMS'. 1994 IEEE 44TH VEHICULAR TECHNOLOGY CONFERENCE (CAT. NO.94CH3438-9), PROCEEDINGS OF IEEE VEHICULAR TECHNOLOGY CONFERENCE (VTC), STOCKHOLM, SWEDEN, 8-10 JUNE 1994, 1994, New York, NY, USA, IEEE, USA, pages 1346 - 1350 vol.2, XP002150896, ISBN: 0-7803-1927-3 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1248375A1 (fr) * 2001-04-02 2002-10-09 STMicroelectronics N.V. Procédé de conversion analogique/numérique d'un signal analogique au sein d'un terminal d'un système de communication sans fil, par exemple un téléphone mobile, et terminal correspondant.
US6680682B2 (en) 2001-04-02 2004-01-20 Stmicroelectronics N.V. Process for the analog/digital conversion of an analog signal within a terminal of a wireless communication system, for example a mobile telephone, and corresponding terminal
EP1437834A1 (fr) * 2003-01-10 2004-07-14 STMicroelectronics N.V. Dispositif d'amplification de puissance, notamment à dynamique d'entrée réduite, en particulier pour un téléphone mobile cellulaire
US7130594B2 (en) 2003-01-10 2006-10-31 Stmicroelectronics N.V. Power amplification device, especially with reduced input dynamic swing, in particular for a cellular mobile telephone
US8159380B2 (en) 2004-11-16 2012-04-17 St-Ericsson Sa Continuous-time sigma-delta analog-to-digital converter with non-invasive filter(s) for immunity preservation against interferers
US7944385B2 (en) 2006-01-25 2011-05-17 Nxp B.V. Continuous-time sigma-delta analog-to-digital converter with capacitor and/or resistance digital self-calibration means for RC spread compensation

Also Published As

Publication number Publication date
IT1313303B1 (it) 2002-07-17
ITMI991482A1 (it) 2001-01-06
AU6270100A (en) 2001-01-22
ITMI991482A0 (it) 1999-07-06

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