WO2001083860A1 - High quality silicon wafer and method for producing silicon single crystal - Google Patents

Abstract

A silicon wafer which has FPD deffects on its surface except a perimetrical portion of 10 mm width in a density of 20 to 300 pieces/cm2; and a method for producing a silicon wafer by the CZ method, characterized in that a silicon wafer is grown under conditions such that, in the central portion of the crystal, a value of (F/Gc)/ X (L/F) ranges from 0.014 to 0.035 mm2/K • min0.5 wherein Gc represents a temperature gradient (K / mm) in the direction of the axis of pulling up in the temperature range from the melting point of silicon to 1400 °, L (mm) represents a length of the crystal being grown in the temperature range from 1150 ° to 1080 °, F represents a rate (ml/min) of crystal growth, and, in the above-mentioned perimetrical portion of 10 mm width, a value of F / Ge is 0.22 mm2/K • min or more wherein Ge represents a temperature gradient (K / mm) in the temperature range from the melting point of silicon to 1400 ° and F represents a rate (ml / min) of crystal growth.

Description

 Description Manufacturing method of high-grade silicon wafer and silicon single crystal

 The present invention relates to a high-quality silicon wafer used as a substrate of a semiconductor device such as a memory, and a silicon single crystal for producing the same, and a method of manufacturing a single crystal. Background art

 Fig. 5 shows an example of a silicon single crystal pulling apparatus using the Czochralski method (CZ method). The silicon single crystal pulling apparatus comprises a quartz crucible 5 filled with a silicon melt 4, a graphite crucible 6 for protecting the same, a heater 7 and a heat insulating material 8 arranged so as to surround the crucibles 5 and 6. A pulling chamber 2 for accommodating and taking out the grown single crystal 3 is connected to the upper part of the main chamber 1.

 To grow a single crystal 3 using such a manufacturing apparatus, a seed crystal is immersed in a silicon melt 4 in a quartz crucible 5, then gently pulled up while rotating through a seed draw, and a rod-shaped single crystal. Grow 3 On the other hand, the crucibles 5 and 6 can move up and down in the direction of the crystal growth axis, and raise the crucible to compensate for the decrease in the liquid level of the melt that has crystallized and decreased during crystal growth, thereby increasing the height of the melt surface. Is kept constant. In addition, an inert gas such as an argon gas is introduced into the main chamber 1 from a gas inlet 10 provided at an upper portion of the pulling chamber 2 so that the single crystal 3 being pulled and the gas rectifying tube 11 a , And between the lower part of the heat shield member 12 a and the melt surface, and is discharged from the gas outlet 9.

Silicon single crystals manufactured by the above-mentioned CZ method are used in large quantities as substrates for semiconductor devices. On the other hand, semiconductor devices are becoming more highly integrated, and elements are becoming increasingly smaller. Along with this, the thickness of the insulating oxide film used for the gate electrode portion has been further reduced. Even with such a thin insulating oxide film, the insulation resistance There is a need for oxide films with higher reliability, lower leakage current, and higher reliability. It is known that the oxide film breakdown voltage characteristic largely depends on crystal defects introduced and generated during crystal growth.

This crystal defect is observed as, for example, a ripple pattern when etched with a mixed solution of potassium dichromate (K ₂ Cr ₂ 0 ₇ ), hydrofluoric acid, and water.

P a t t e r n D e f e c t). It is known that there is a clear correlation between the FPD density and the oxide film breakdown voltage characteristics (see Japanese Patent Application Laid-Open No. 4-192345).

 In describing these crystal defects, first, a vacancy-type point defect called Vacancy (hereinafter sometimes abbreviated as V) incorporated into a silicon single crystal and an interstitial serial defect. Explains what is commonly known about the factors that determine the concentration of each interstitial silicon point defect called kon (luterstitia 1 S i, sometimes abbreviated as I). I do.

 In a silicon single crystal, the V- region is a region that has many Vacancy, that is, recesses and voids generated due to lack of silicon atoms, and the I- region is a silicon atom. Is the region where there are many dislocations and extra silicon atom clusters generated by the existence of extra atoms, and there is no shortage or excess (less) of atoms between the V- region and the I-region. This means that there is a Neutral Region (hereinafter sometimes abbreviated as N-region). Groin-in defects (FPD, LSTD, COP, etc.) occur only when V and I are oversaturated. If so, it turns out that it does not exist as a defect.

 It is known that the concentration of these point defects is determined by the relationship between the crystal pulling rate F (growth rate) in the CZ method and the temperature gradient G near the solid-liquid interface in the crystal. In the N-region between the V-region and the I-region, the presence of a ring-shaped defect called OSF (Oxidation Induced Stacking Fault) was confirmed. Have been.

When these defects caused by crystal growth are classified, for example, the growth rate is 0.6 mmZm i At relatively high speeds of around n or more, grown-in defects such as FPDs, LSTDs, and COPs, allegedly caused by voids of vacancy-type point defects, exist at high density throughout the crystal diameter direction. It degrades the oxide film breakdown voltage characteristics. The region where these defects exist is called the V-rich region. If the growth rate is 0.6 mni / min or less, the growth rate decreases, and the inerterstitial becomes dominant.

The LZD (LargeD) is considered to be caused by a dislocation loop in which the 0 S F ring is generated from the periphery of the crystal and point defects of the interstitial silicon type gather outside this ring.

1 s 1 o c a t i o n: Abbreviation of interstitial dislocation loop, LSEPD, LFPD, etc.) exists at low density and causes serious defects such as leakage. The area where these defects exist is called the I-rich area. Furthermore, when the growth rate is reduced to about 0.4 mmZ min or less, the OSF ring agglomerates at the center of the wafer and disappears, and the entire surface becomes an I-rich region.

 As a single crystal manufacturing method capable of obtaining good oxide film breakdown voltage characteristics, for example, there is a technique disclosed in Japanese Patent Application Laid-Open No. 11-198989 in which the incorporation of point defects is controlled. Normally, the crystal is grown under the growth condition where the V-rich region is predominant, but in the disclosed technology, the crystal is grown in the N- region, which is an intermediate region where neither point defect is predominant. According to this method, it is possible to produce a crystal free of FPD and the like.

 However, the crystal growth rate is 0.5 mmZmin or less, which is significantly slower than lmm / min of a normal crystal, and the productivity is reduced and the cost is increased. Furthermore, although oxygen is deposited in the middle of the N- region, it has a portion where oxygen precipitation is likely to occur and a portion where oxygen precipitation is unlikely to occur, and there is a problem that oxygen deposition is likely to be uneven.

 As a technique for improving the oxide film breakdown voltage characteristics without reducing the productivity without completely eliminating the FPD, Japanese Patent Laid-Open Nos. 8-124293 and 10-15

Japanese Patent Application Publication No. 23095 is disclosed. In these disclosed technologies, the defect density is specified, but no particular attention is paid to its in-plane distribution. That is, since the outer peripheral portion of the crystal is cooled, the temperature gradient G generally increases sharply, and the defect density decreases in the peripheral portion. In the region where the defect density decreases, the I- Regions with reduced gettering capability, such as regions and OSF ring regions, are likely to appear. In the examples and the like of Japanese Patent Application Laid-Open No. 8-124493, OSF actually occurs in the peripheral portion. Therefore, these disclosed technologies have a disadvantage that the ability of heavy metal gettering, which is very important in the device process, is reduced in the peripheral portion. Disclosure of the invention

 The present invention has been made in view of the above-mentioned problems in the conventional art, and provides a silicon wafer having good oxide film breakdown voltage characteristics and having no gettering ability reduced in a peripheral portion. Another object of the present invention is to provide a technology capable of manufacturing the silicon single crystal without significantly reducing the productivity when growing the silicon single crystal.

In order to solve the above-mentioned problems, a silicon wafer according to the present invention is a silicon wafer, and the density of FPD defects in the plane is 20 to 300 pieces except for 1 Omm around the wafer. 7. It is characterized by the fact that it is 111 ² .

Comparison The good sea urchin, the density of FPD defects Ueha plane, except for the Ueha periphery 1 0 mm, Siri Konueha within the range of 2 0-3 0 0 Z cm ² includes a conventional © E Doha As a result, the upper limit is almost halved, so that the yield rate of oxide film withstand voltage characteristics is greatly improved, and the yield and productivity in the device process can be improved and the cost can be reduced.

 In this case, it is preferable that no silicon oxide is observed on the surface of the silicon wafer even after the silicon wafer is subjected to thermal oxidation treatment and then selectively etched.

 As described above, in the case of a wafer in which no OSF is generated even if the OSF is checked in the present invention, the V-rich region is dominant over the entire surface of the wafer, and the wafer has no region where oxygen precipitation is reduced. As a result, it is possible to provide a high-quality wafer in which the yield rate of the oxide film withstand voltage characteristics is greatly improved and the IG performance in the peripheral portion is not reduced.

 In this case, the silicon wafer is subjected to a heat treatment at 800 ° C. for 4 hours in a nitrogen atmosphere and at a temperature of 100 ° C. for 16 hours in an oxygen atmosphere, and the amount of oxygen deposition determined from the oxygen concentration before and after the heat treatment. It is preferable that the value AO is at 10 mm around A e of AO i is equal to or more than 80% of the value ΔO ic at the center.

The oxygen precipitation amount of the wafer specified in this way decreases in the vicinity of the wafer. As a result, the IG capacity will surely not decrease in the peripheral area.

In addition, it is possible to provide a silicon wafer having the above-mentioned various characteristics, in which the C-mode non-defective rate of the oxide film breakdown voltage characteristic is 70% or more. The method for producing a silicon single crystal according to the present invention is characterized in that when growing a silicon single crystal by the Czochralski method, the melting point of silicon at the center of the crystal (14020 ° C) is raised to 1400 ° C. G (K / mm), the length of the temperature region from 115 ° C to 180 ° C is L (mm), and the crystal growth rate is F ( mm / min) and when the value calculated from them (FZG c) / (L / F), with the range of 0. 0 1 4 ~ 0. 0 3 5 mm 2 ZK 'min ° 5, The relationship between the temperature gradient G e (K / mm) from the melting point at 10 mm around the periphery of the silicon single crystal to 140 ° C. and the crystal growth rate F, F / Ge, is 0.2 It is characterized by being bred with a minimum of 2 mm ² / K · min.

As described above, if the ratio between the No. 0 value and the (L / F) value is defined within a predetermined range and the cultivation is performed, the FPD density on the surface of the wafer becomes within the range of 20 to 300 cm ² . It is possible to achieve a very high yield rate of oxide film breakdown voltage characteristics in the device process, and if the F / G e value is stipulated to a predetermined value, the FPD density in the peripheral area can be increased. There is no extreme drop in OSF, and no OSF occurs. Therefore, the yield and productivity in the device process can be improved and the cost can be reduced.

 According to the present invention, there is provided a silicon single crystal having an appropriate FPD defect density in a plane grown by the above-mentioned manufacturing method and free from OSF in the peripheral portion. Provided is a silicon wafer which is excellent in withstand voltage characteristics of an oxide film manufactured by slicing from a single crystal, and whose gettering ability does not decrease in a peripheral portion.

As described above, according to the crystal growth conditions of the present invention, it is possible to achieve an FPD defect density that is less than half the conventional one without lowering the crystal growth rate. Further, it is possible to provide a high-quality silicon wafer having excellent oxide film withstand voltage characteristics without lowering the gettering ability in a peripheral portion which is likely to occur in a low defect wafer. BRIEF DESCRIPTION OF THE FIGURES

 FIG. 1 is a correlation diagram between the parameter (F / G c) / 1 (L / F) of the present invention and the FPD density.

 FIG. 2 is an FPD distribution in an APD grown under the growth conditions (Example 2) according to the present invention.

 Figure 3 shows the distribution in the FPD plane of ewa grown under the conventional growth conditions (Comparative Example 2).

 FIG. 4 is a schematic diagram of the single crystal pulling apparatus used in the present invention.

 Figure 5 is a schematic diagram of a conventional single crystal pulling apparatus equipped with a conventional single crystal pulling HZ (hot zone, furnace structure).

 FIG. 6 is a diagram comparing the C-mode non-defective rate in the oxide film breakdown voltage between Example 2 and Comparative Example 1. BEST MODE FOR CARRYING OUT THE INVENTION

 Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

As the silicon wafer of the present invention, a silicon wafer is mixed with a mixed solution of dichromic acid chromium (K ₂ Cr ₂ O ₇ ), hydrofluoric acid and water to a 35 μm selective wafer without stirring. It is important that the density of the FPD defects observed as ripples when tweaking (approximately 30 minutes) is 20 to 300 defects / cm ² except for the area around 10 mm around the wafer.

When the FPD density was measured under the above conditions, the FPD density was observed to be 400 to 2000 Zcm ² , especially 600 Zcm ² or more under the conventional general growth conditions. Often done. At this time, the yield ratio of the oxide film withstand voltage measured when the oxide film thickness is 25 nm is about 50%. If the FPD density is reduced by half to 300 particles / cm ² , the non-defective rate will be 70 to 80%, and it will be almost no problem if the oxide film thickness is actually 10 nm or less, which is actually manufactured by advanced devices. Therefore, it was decided to improve the oxide film breakdown voltage characteristics by reducing the FPD density to less than 300 / cm ² or less. Conversely, if the FPD density is less than 20 cm ² , An OSF region or an I-rich region may appear, which may cause a reduction in precipitation. However, point defects generally diffuse outward during crystal growth in the crystal periphery, so that there is a very defect-free part in the periphery, regardless of the defect distribution of the wafer. Therefore, the resolution in measurement is also a problem, and therefore, in the present invention, the defect density is not specified in the peripheral portion of 10 mm.

 In addition, it is important to obtain a wafer without OSF in the peripheral area and a V-rich region dominant over the entire surface of the wafer and no oxygen precipitation reduction area. The silicon wafer has a temperature of 115 ° C and 100 ° C. After oxidation treatment in a wet oxygen atmosphere (oxygen atmosphere containing water vapor) for 0 minutes, a mixed acid solution with selectivity (hydrofluoric acid: nitric acid: acetic acid: water = 1: 15: 3: 5, JISH 0600) It is important that the silicon wafer has no OSF observed on the surface even after selective etching by 8 μm in 9-1-1994 commentary 4.3 (2)). At this time, the thermal oxidation treatment for confirming the presence or absence of OSF is performed at 110 ° C to 1200 ° C for about 1 hour to 2 hours in a hot oxygen atmosphere, or 1 hour. It is preferable to perform the thermal oxidation treatment in a dry oxygen atmosphere at a temperature of 0000 ° C. to 110 ° C. for about 10 to 20 hours.

 In addition, it is important that the amount of precipitated oxygen does not decrease in the peripheral area.Therefore, the silicon wafer was heated at 800 ° C for 4 hours in a nitrogen atmosphere and at 100 ° C for 16 hours in an oxygen atmosphere. The value of oxygen deposition AO is at the peripheral portion of 10 mm, which is obtained by measuring the oxygen concentration before and after the heat treatment and before and after, is 80% or more of the value Oic at the center of the wafer. Preferably, there is.

 In order to grow high-quality silicon single crystals as described above, it is important to grow them under the following crystal growth conditions.

 The equilibrium concentration of point defects in the crystal is a function of temperature, and the higher the temperature, the higher the equilibrium concentration. During crystal growth, the crystals gradually change from the melting point to lower temperatures. At this time, since the equilibrium concentration of the point defects suddenly decreases, excess point defects are left behind, and they aggregate to form defects such as FPD.

Therefore, in order to reduce the secondary defects such as FPD, it is necessary to (1) reduce the concentration of excess point defects, and (2) lengthen the time for the excess point defects to grow into secondary defects, and It is better to have fewer large defects than there are many secondary defects. It is possible to do it.

 In order to reduce the excessive point defects in ①, it is necessary to consider the temperature gradient G and the crystal growth rate F at the crystal growth interface. As described above, excessive point defects occur as the temperature decreases from the melting point. Contrary to the equilibrium concentration, the concentration of this excess point defect increases as the temperature decreases. The excess point defect concentration difference becomes the driving force, and the excess point defect diffuses uphill toward the melt and is discharged. This driving force increases as the temperature gradient increases. However, the temperature at which point defects diffuse on a slope is limited to a high temperature. Thus, the faster the crystal growth rate, the shorter the time contributing to diffusion. Therefore, increasing the crystal growth rate increases the excess amount of point defects.

 From the above principle, it is considered that the excess point defect concentration increases as the growth rate increases and decreases as the temperature gradient increases. Therefore, the excess point defect is approximately expressed in proportion to the F_G value from the growth rate F and the temperature gradient G near the melting point. Note that the defect distribution generally tends to decrease at the periphery, and the discussion here is for G at the center.

 On the other hand, it is known that the temperature range related to the growth of excess point defects into secondary defects in ② is from 115 ° C. to 180 ° C. (Japanese Unexamined Patent Application Publication No. No. 0). The longer the transit time in this temperature zone, the more the point defects are agglomerated and the lower the FPD density. The agglomeration phenomenon of point defects is the diffusion length of point defects (D · T) (D: diffusion coefficient, T: diffusion time = distance L from 1150 ° C to 1800 ° C divided by growth rate F Value).

Based on this idea, the inventors have determined that the temperature gradient Gc (K / mm) from the melting point at the center of the crystal to 140 ° C., and the temperature gradient from 150 ° C. to 180 ° C. Given the distance L (mm) and the crystal growth rate F (mm / min) of C, the value (F / Gc) / ~ (L / F) calculated from them is that the transit time (LZF) is 4 It was found that when the time was longer than 0 minutes, it was correlated with the FPD defect density. And this value is, 0. 0 1 4~ 0. 0 3 5 mm 2 / K · min ° - by using a pulling condition in the range of ^5, the above F PD Density (2 0-3 0 0 / cm ² ). Figure 1 shows the relationship between this value and the FPD density.

Furthermore, it is necessary that the OSF ring does not occur in the peripheral area. Occurrence of OSF As a matter, it is known that the temperature gradient near the growth interface is related to the growth rate (for example, it is disclosed in Japanese Patent Application Laid-Open No. Hei 7-27991). This disclosed technology shows the relationship at the center of the crystal. This discussion is also made in Japanese Patent Application Laid-Open Nos. 8-124293 and 10-152395, but is limited to G at the center. In the present invention, it is important that the FPD density does not extremely decrease in the peripheral portion and that no OSF is generated.

 Therefore, the present inventors applied this relationship to the crystal peripheral portion, and examined conditions under which OSF does not occur in the peripheral portion. As a result, the relation value FZG e between the temperature gradient G e (K / mm) from the melting point at 1 O mm at the periphery to 140 ° C. and the crystal growth rate F (mm / min) is 0.2 It was found that OSF does not appear in the peripheral part if it is 2 (mn ^ ZK 'ni in) or more.

 The desired silicon quality can be obtained by the silicon single crystal manufactured under such crystal growth conditions and the wafer manufactured from the single crystal.

 Hereinafter, the present invention will be described in more detail with reference to the drawings.

 First, a schematic configuration example of a single crystal pulling apparatus using the CZ method used in the present invention will be described with reference to FIG. As shown in FIG. 4, the single crystal pulling apparatus 20 has a member for melting the raw material silicon, a mechanism for pulling the crystallized silicon, and the like, which are housed in the main chamber 1. Have been. A pulling chamber 2 extending upward from the ceiling of the main chamber 1 is connected, and a mechanism (not shown) for pulling the single crystal 3 is provided above the pulling chamber 2.

 The main chamber 1 is provided with a quartz crucible 5 for containing the molten raw material melt 4 and a graphite crucible 6 for containing the quartz crucible 5, and these crucibles 5 and 6 are driven by a driving mechanism (not shown). It is supported to be able to move up and down freely. The crucible drive mechanism raises the crucible by the liquid level drop so as to compensate for the melt level drop caused by the pulling of the single crystal.

A heater 7 for melting the raw material is disposed so as to surround the crucibles 5 and 6. Outside the heater 7, a heat insulating material 8 for preventing heat from the heater 7 from being directly radiated to the main chamber 1 is provided so as to surround the heater 7. Inside the main chamber 1 An inert gas such as argon gas is introduced from the provided gas inlet 10, passes between the single crystal 3 being pulled and the gas rectifying cylinder 11 b, and melts with the lower part of the heat shield 12 b. It passes between the liquid surface and is discharged from the gas outlet 9. The internal structure of the furnace up to this point is almost the same as the conventional one.

In order to grow the single crystal of the present invention, as described above, the value of the parameter (F / G c) / (L / F) of the growth condition correlated with the density of FPD defects is a desired value of 0.0. ^{1 4~ 0. 0 3 5 mm 2} / K · mi shall fit within the range of eta ° · ^5. To do so, it is necessary to reduce F, increase G, or increase L. However, reducing F is difficult to adopt because it leads to lower productivity. Therefore, to increase L, an upper heat insulator 13 was introduced as shown in Fig. 4.

 However, this alone decreases Gc and F, so in order to increase Gc, the shapes of the gas rectifying cylinder 11b and the heat shielding member 12b are increased as shown in Fig. 4. Gc is increased by changing from the conventional shapes 1 1a and l 2a of FIG. Hereinafter, the present invention will be described more specifically with reference to Examples and Comparative Examples of the present invention, but the present invention is not limited thereto.

(Example 1)

 Using a single crystal pulling device 20 equipped with HZ (hot zone, furnace structure) shown in FIG. 4 described above, a single crystal rod was set by setting various growth rates F and temperature gradients Gc and Ge. Nurtured. From these crystal growth conditions, the values of the growth-related parameters (F / G c) (L / F) were determined.

 Here, the values of G c, G e, and L are calculated using a comprehensive heat transfer analysis software called F EMA G (FD D upret, P.N icodeme, Y.Ryckmans, P.W outers, ad M.J Crochet, Int. J. Heat Mass Transfer, 33, 1849 (1990)).

Then, cut the samples Ueha shape from the pulled crystal, the mixing of the strained layer of the surface of the sample was removed with a mixed solution of hydrofluoric acid and nitric acid, and K ₂ C ir ₂ 0 ₇ and a hydrofluoric acid water 35m selective etching (approximately 30 minutes) with liquid without stirring In this case, the density of the FPD defects (pieces Z cm ² ) observed as ripples was measured and the relationship with the parameters was obtained. The results are shown in Fig. 1.

There is a good correlation between the parameter (FZG c) / (L / F) and the FPD density, and the value of (FZG c) / f (L / F) is 0.014 to 0.03. 5 mm ² / K 'min. When it is within the range of ' ⁵ , it is understood that the FPD density is as low as 20 to 300 particles / cm ² .

(Example 2)

As shown in FIG. 4, a pulling device 20 equipped with HZ into which the upper heat insulating material 13 was introduced was used. For regular HZ shown in FIG. 5, the parameter (F / G c) / f (L / F) the 0.0 1 the value of ^{4~ 0. 0 3 5 mm 2 /} K 'in in. In order to stay within ' ⁵ , it is necessary to decrease F, increase G c, or increase L. Decreasing F leads to a decrease in single crystal productivity. Therefore, to increase L, an upper heat insulator 13 was introduced as shown in Fig. 4. However, this alone lowers G c and F, so to increase G c. To increase G c, the gas rectification tube lib and heat shield shown in Fig. 4 from the shapes 11a and 12a in Fig. 5 Changed to the shape of member 1 2b. A crucible with a diameter of 240 inches (600 mm) was placed in this HZ to produce a single crystal with a straight body length of about 130 cm and a diameter of 200 mm from 150 kg of molten silicon. .

At this time, the value of Roh parameters (F / G c) / ( L / F) is ^{0. 0 2 4 mm 2 /} K · mi η ° · 5 and becomes the predetermined value F = 0. In 8 mm / mi A crystal was grown. That is, F was increased by the effect of increasing G c.

In this case, FZGe at the periphery of the single crystal was 0.245 mm ² / K · min, and F / Ge could be kept within a predetermined range.

A sample was cut out from this crystal, and the FPD density was measured. As a result, the in-plane distribution was almost uniform from the center to the periphery as shown in FIG. 2, and the density was about 180 / cm ² .

Similarly, after removing the strained layer on the surface of the sample cut out with a mixed solution of hydrofluoric acid and nitric acid, the sample is oxidized in a dry oxygen atmosphere at 115 ° C for 100 minutes to provide selectivity. OSF was not observed on the surface of the mixed acid solution (hydrofluoric acid: nitric acid: acetic acid: water = 1: 15: 3: 5) even when 8 µm selective etching was performed, and OSF was generated especially in the peripheral area. Was not seen.

 Furthermore, heat treatment was performed at 800 ° C for 4 hours in a nitrogen atmosphere and at 1000 ° C for 16 hours in an oxygen atmosphere, and the oxygen before and after the heat treatment was determined by FT-I JUi (Fourier transform infrared spectroscopy). When the concentration was measured and the amount of oxygen precipitated in the sample plane was evaluated, the amount of oxygen precipitated in the peripheral portion with respect to the central portion was 1.1 times or more. Therefore, unlike the conventional case, the amount of precipitated oxygen was smaller at the peripheral portion than at the central portion, and no decrease in gettering ability was observed.

As described above, it was possible to improve the FPD density of ordinary crystals (about 600 pieces Z c in ² ) to 1/3 or less without significantly decreasing the crystal growth rate F. In addition, no deterioration of the deposition characteristics in the peripheral area was observed. Calculations show that even if the present invention is grown at a growth rate of 0.91 mm / min, an FPD density of less than 300 / cm ² can be achieved.

 Next, the C-mode non-defective rate in the oxide film breakdown voltage characteristics was measured. The measurement conditions were set as follows, and the number of samples was measured at n = 8.

a) Oxide film thickness: 25 nm, b) Measurement electrode: Lin-doped 'polysilicon, c) Electrode area: 8 mm ² , d) Judgment current: lmA / cm ² ,

 e) Non-defective product: A non-defective product having a dielectric breakdown field of 8 MVZ cm or more was judged. The result of the non-defective rate was 76.5% on average and σ was 4.0%, and is shown in Fig. 6 together with the data of Comparative Example 1.

(Comparative Example 1)

Using a normal Ζ Ζ structure as shown in Fig. 5, from a 150 kg molten silicon in a 24 inch (600 mm) diameter crucible, a straight body length of about 130 cm and a diameter of 20 O mm was obtained. Crystals were produced. At this time, the crystal was grown at a growth rate of 0.95 mm / min. Bruno parameters (FZG c) / f value of (L / F) is ^{0. 0 5 1 5mm 2 / K} min ° -. ^5, and became a large value. FPD density in the crystal becomes a 6 0 0 Z cm ² approximately as shown in FIG. 1, had the desired crystalline product. Quality. Here, the C-mode non-defective rate of oxide film breakdown voltage was measured under the same conditions as in Example 2. As a result, the average was 50.5% and σ was 5.5%. The results are shown in FIG. (Comparative Example 2)

The shapes of the gas rectifying cylinder 11b and the heat shielding member 12b, which served to increase Gc in Η (Fig. 4) of Example 2, were returned to 11a and 12a (Fig. 5). An HZ with only the upper insulation material 13 was prepared. In order to obtain a parameter (FZG c) / (L / F) value showing a low FPD density in Example 1 in this HZ, the growth rate F was 0.67 mmZm in. At this time, F and Ge decreased due to the change in the shape of the G member, but F further decreased, and reached 0.2 1 1 mm ² / K · min.

Using this HZ, a crystal with a straight body length of about 130 cm and a diameter of 200 mm was grown from 150 kg of molten silicon at a growth rate of 0.67 mm / min. As a result of the same evaluation as in Example 2, the FPD was equivalent to about 180 cm ² , but the in-plane distribution had a lower density at the periphery as shown in FIG. Also, some OSF occurred in the surrounding area. Further, when the amount of precipitated oxygen was evaluated under the same conditions as in Example 2, the amount of precipitated oxygen in the peripheral portion was about 75% on average with respect to the center, and the gettering ability tended to decrease.

 Under these conditions, the growth rate F was slowed down so that the value of the parameter (F / G c) / (L / F) was satisfied, and the FPD density was satisfied. However, because no consideration was given to increasing the F / Ge, it is probable that OSF occurred at the periphery and the gettering ability was reduced.

 Note that the present invention is not limited to the above embodiment. The above embodiment is an exemplification, and has substantially the same configuration as the technical idea described in the claims of the present invention. It is included in the technical scope of the invention.

For example, in the above-described embodiment, the case where a silicon single crystal having a diameter of 200 mm is grown has been described by way of example. However, the present invention is not limited thereto. It can also be applied to silicon single crystals having a diameter of 250 mm or less and a diameter of 250 to 40 mm or more.

Claims

The scope of the claims 1. A silicon wafer characterized in that the FPD defect density in the plane thereof is 20 to 300 / cm ² except for l O mm around the wafer. 2. The silicon wafer according to claim 1, wherein even if the silicon wafer is subjected to a thermal oxidation treatment and then subjected to selective etching, no OSF is observed on the surface thereof. 3. Heat treatment of the silicon wafer at 800 ° C for 4 hours in a nitrogen atmosphere at 100 ° C for 16 hours in an oxygen atmosphere, and the amount of oxygen deposition obtained from the oxygen concentration before and after the heat treatment. The value of AO is at the peripheral portion of the ゥ a of 10 mm of the AO i ^ is equal to or more than 80% of the value Δ is ic at the central portion of the ゥ a. Connieha. 4. The silicon wafer according to any one of claims 1 to 3, wherein a C-mode non-defective rate of oxide film breakdown voltage is 70% or more. No. 5. When growing a silicon single crystal by the Czochralski method, the temperature gradient in the pulling axis direction between the melting point of silicon at the center of the crystal and 140 ° C in the pulling axis direction is G c (K / mm). When the length of the temperature range from 1150 ° C to 1800 ° C is L (mm) and the crystal growth rate is F (mm / min), the value calculated from them (F / in G c) / f (L / a F), with the range of 0. 0 1 4~ 0. 0 3 5 mm 2 / K · min ° · 5, a peripheral portion 1 of the silicon single crystal 0 mm The relationship between the temperature gradient G e (K / mm) from the melting point to 140 ° C. and the crystal growth rate F (mm / min) A method for producing a silicon single crystal, characterized in that the silicon single crystal is grown to a size of 22 mm ² / K · min or more. 6. A silicon single crystal grown by the method described in claim 5. 7. Silicon manufactured by slicing from the silicon single crystal described in claim 6. Connieha.