WO2001063994A3 - Tamper proof case for electronic devices having memories with sensitive information - Google Patents
Tamper proof case for electronic devices having memories with sensitive information Download PDFInfo
- Publication number
- WO2001063994A3 WO2001063994A3 PCT/US2001/005912 US0105912W WO0163994A3 WO 2001063994 A3 WO2001063994 A3 WO 2001063994A3 US 0105912 W US0105912 W US 0105912W WO 0163994 A3 WO0163994 A3 WO 0163994A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memories
- electronic devices
- chassis
- sensitive information
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/02—Details
- H05K5/0208—Interlock mechanisms; Means for avoiding unauthorised use or function, e.g. tamperproof
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/86—Secure or tamper-resistant housings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0275—Security details, e.g. tampering prevention or detection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0999—Circuit printed on or in housing, e.g. housing as PCB; Circuit printed on the case of a component; PCB affixed to housing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10151—Sensor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/222—Completing of printed circuits by adding non-printed jumper connections
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2001239854A AU2001239854A1 (en) | 2000-02-23 | 2001-02-22 | Tamper proof case for electronic devices having memories with sensitive information |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US51082500A | 2000-02-23 | 2000-02-23 | |
US09/510,825 | 2000-02-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2001063994A2 WO2001063994A2 (en) | 2001-08-30 |
WO2001063994A3 true WO2001063994A3 (en) | 2002-04-18 |
Family
ID=24032352
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2001/005912 WO2001063994A2 (en) | 2000-02-23 | 2001-02-22 | Tamper proof case for electronic devices having memories with sensitive information |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2001239854A1 (en) |
WO (1) | WO2001063994A2 (en) |
Cited By (50)
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US6907600B2 (en) | 2000-12-27 | 2005-06-14 | Intel Corporation | Virtual translation lookaside buffer |
US6934817B2 (en) | 2000-03-31 | 2005-08-23 | Intel Corporation | Controlling access to multiple memory zones in an isolated execution environment |
US6941458B1 (en) | 2000-03-31 | 2005-09-06 | Intel Corporation | Managing a secure platform using a hierarchical executive architecture in isolated execution mode |
US6990579B1 (en) | 2000-03-31 | 2006-01-24 | Intel Corporation | Platform and method for remote attestation of a platform |
US6996748B2 (en) | 2002-06-29 | 2006-02-07 | Intel Corporation | Handling faults associated with operation of guest software in the virtual-machine architecture |
US6996710B1 (en) | 2000-03-31 | 2006-02-07 | Intel Corporation | Platform and method for issuing and certifying a hardware-protected attestation key |
US7013484B1 (en) | 2000-03-31 | 2006-03-14 | Intel Corporation | Managing a secure environment using a chipset in isolated execution mode |
US7020738B2 (en) | 2000-12-27 | 2006-03-28 | Intel Corporation | Method for resolving address space conflicts between a virtual machine monitor and a guest operating system |
US7024555B2 (en) | 2001-11-01 | 2006-04-04 | Intel Corporation | Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environment |
US7058807B2 (en) | 2002-04-15 | 2006-06-06 | Intel Corporation | Validation of inclusion of a platform within a data center |
US7073042B2 (en) | 2002-12-12 | 2006-07-04 | Intel Corporation | Reclaiming existing fields in address translation data structures to extend control over memory accesses |
US7076802B2 (en) | 2002-12-31 | 2006-07-11 | Intel Corporation | Trusted system clock |
US7076669B2 (en) | 2002-04-15 | 2006-07-11 | Intel Corporation | Method and apparatus for communicating securely with a token |
US7082615B1 (en) | 2000-03-31 | 2006-07-25 | Intel Corporation | Protecting software environment in isolated execution |
US7089418B1 (en) | 2000-03-31 | 2006-08-08 | Intel Corporation | Managing accesses in a processor for isolated execution |
US7096497B2 (en) | 2001-03-30 | 2006-08-22 | Intel Corporation | File checking using remote signing authority via a network |
US7103771B2 (en) | 2001-12-17 | 2006-09-05 | Intel Corporation | Connecting a virtual token to a physical token |
US7111176B1 (en) | 2000-03-31 | 2006-09-19 | Intel Corporation | Generating isolated bus cycles for isolated execution |
US7117376B2 (en) | 2000-12-28 | 2006-10-03 | Intel Corporation | Platform and method of creating a secure boot that enforces proper user authentication and enforces hardware configurations |
US7124327B2 (en) | 2002-06-29 | 2006-10-17 | Intel Corporation | Control over faults occurring during the operation of guest software in the virtual-machine architecture |
US7127548B2 (en) | 2002-04-16 | 2006-10-24 | Intel Corporation | Control register access virtualization performance improvement in the virtual-machine architecture |
US7139890B2 (en) | 2002-04-30 | 2006-11-21 | Intel Corporation | Methods and arrangements to interface memory |
US7165181B2 (en) | 2002-11-27 | 2007-01-16 | Intel Corporation | System and method for establishing trust without revealing identity |
US7177967B2 (en) | 2003-09-30 | 2007-02-13 | Intel Corporation | Chipset support for managing hardware interrupts in a virtual machine system |
US7215781B2 (en) | 2000-12-22 | 2007-05-08 | Intel Corporation | Creation and distribution of a secret value between two devices |
US7237051B2 (en) | 2003-09-30 | 2007-06-26 | Intel Corporation | Mechanism to control hardware interrupt acknowledgement in a virtual machine system |
US7272831B2 (en) | 2001-03-30 | 2007-09-18 | Intel Corporation | Method and apparatus for constructing host processor soft devices independent of the host processor operating system |
US7287197B2 (en) | 2003-09-15 | 2007-10-23 | Intel Corporation | Vectoring an interrupt or exception upon resuming operation of a virtual machine |
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US7356735B2 (en) | 2004-03-30 | 2008-04-08 | Intel Corporation | Providing support for single stepping a virtual machine in a virtual machine environment |
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US7392415B2 (en) | 2002-06-26 | 2008-06-24 | Intel Corporation | Sleep protection |
US7395405B2 (en) | 2005-01-28 | 2008-07-01 | Intel Corporation | Method and apparatus for supporting address translation in a virtual machine environment |
US7424709B2 (en) | 2003-09-15 | 2008-09-09 | Intel Corporation | Use of multiple virtual machine monitors to handle privileged events |
US7480806B2 (en) | 2002-02-22 | 2009-01-20 | Intel Corporation | Multi-token seal and unseal |
US7490070B2 (en) | 2004-06-10 | 2009-02-10 | Intel Corporation | Apparatus and method for proving the denial of a direct proof signature |
US7516330B2 (en) | 2000-06-28 | 2009-04-07 | Intel Corporation | Platform and method for establishing provable identities while maintaining privacy |
US7593550B2 (en) | 2005-01-26 | 2009-09-22 | Honeywell International Inc. | Distance iris recognition |
US7620949B2 (en) | 2004-03-31 | 2009-11-17 | Intel Corporation | Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment |
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US8543772B2 (en) | 2003-09-30 | 2013-09-24 | Intel Corporation | Invalidating translation lookaside buffer entries in a virtual machine (VM) system |
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US7124273B2 (en) | 2002-02-25 | 2006-10-17 | Intel Corporation | Method and apparatus for translating guest physical addresses in a virtual machine environment |
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US7142674B2 (en) | 2002-06-18 | 2006-11-28 | Intel Corporation | Method of confirming a secure key exchange |
US7900017B2 (en) | 2002-12-27 | 2011-03-01 | Intel Corporation | Mechanism for remapping post virtual machine memory pages |
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Cited By (60)
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US6934817B2 (en) | 2000-03-31 | 2005-08-23 | Intel Corporation | Controlling access to multiple memory zones in an isolated execution environment |
US6941458B1 (en) | 2000-03-31 | 2005-09-06 | Intel Corporation | Managing a secure platform using a hierarchical executive architecture in isolated execution mode |
US6957332B1 (en) | 2000-03-31 | 2005-10-18 | Intel Corporation | Managing a secure platform using a hierarchical executive architecture in isolated execution mode |
US6990579B1 (en) | 2000-03-31 | 2006-01-24 | Intel Corporation | Platform and method for remote attestation of a platform |
US7082615B1 (en) | 2000-03-31 | 2006-07-25 | Intel Corporation | Protecting software environment in isolated execution |
US7013484B1 (en) | 2000-03-31 | 2006-03-14 | Intel Corporation | Managing a secure environment using a chipset in isolated execution mode |
US7111176B1 (en) | 2000-03-31 | 2006-09-19 | Intel Corporation | Generating isolated bus cycles for isolated execution |
US7089418B1 (en) | 2000-03-31 | 2006-08-08 | Intel Corporation | Managing accesses in a processor for isolated execution |
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AU2001239854A1 (en) | 2001-09-03 |
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