WO2000078034A2 - Dual sensitivity image sensor - Google Patents
Dual sensitivity image sensor Download PDFInfo
- Publication number
- WO2000078034A2 WO2000078034A2 PCT/US2000/016633 US0016633W WO0078034A2 WO 2000078034 A2 WO2000078034 A2 WO 2000078034A2 US 0016633 W US0016633 W US 0016633W WO 0078034 A2 WO0078034 A2 WO 0078034A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- floating diffusion
- photogate
- level
- signal
- reset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
- H04N25/58—Control of the dynamic range involving two or more exposures
- H04N25/581—Control of the dynamic range involving two or more exposures acquired simultaneously
- H04N25/583—Control of the dynamic range involving two or more exposures acquired simultaneously with different integration times
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/616—Noise processing, e.g. detecting, correcting, reducing or removing noise involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Definitions
- the dynamic range of a typical CMOS image sensor is between 65 and 75dB.
- the scene dynamic range may extend over more than 5 orders of magnitude. If the scene dynamic range exceeds the sensor dynamic range, then portions of the image may be clipped or distorted in the darkest or brightest areas of the scene, Techniques for extending dynamic range have included using both non-linear sensors and linear sensors.
- the non-linear sensors may cause image lag, have a large pixel size, cause inflexible or destructive compression, loss of contrast, increased noise or long integration time.
- Linear sensors may have excellent contrast and improved noise processing. They may also produce excellent opportunities for post-processing, since the output is typically directly related to the input .
- a high dynamic range linear sensor often takes several integrations of the same scene.
- Each integration has a different integration time.
- the varying sensitivity of the different integrations can provide more information about the scene.
- each pixel may be accessed several times to obtain all the information. This necessity to access the pixels may decrease the frame rate of the sensor.
- a frame memory may also be necessary to store the results of the integration temporarily.
- the present system uses obtains two integrations of the same image, at the same time, using a photoreceptor, and the auxiliary part for the photoreceptor.
- An embodiment discloses using a photogate which has an associated floating diffusion used. Both the photogate and the floating diffusion simultaneously acquire information about the image.
- the photogate may be more efficient and produces a higher sensitivity value than the floating diffusion. In this way, both a high and a low sensitivity version of the image can be obtained.
- the information may have an increased dynamic range .
- Figure 1A shows the layout of a CMOS image sensor array including the image acquisition part and the signal processing part
- Figure IB shows a circuit diagram of a single pixel and a single part of the column signal processor; and Figure 2 shows a diagram illustrating the flow of operation.
- the present application describes using a photoreceptor of a type that has an associated part that stores charge.
- the photoreceptor can include a photogate and the associated part can be a floating diffusion that stores charge from the photogate. This can facilitate obtaining two images of the same scene at the same time. The two images have different sensitivities. It is recognized by the present inventors that the photogate pixel actually has two electron collecting areas. The photogate itself collects electrons. The floating diffusion area also collects electrons, but does so at a lower efficiency, as compared with the photogate.
- FIG. 1A shows an overall layout of the sensor chip.
- a single silicon substrate 99 has integrated therein a photosensor array 100 which includes a plurality of pixel photosensor elements arranged in rows and columns.
- the same substrate 99 also includes an image processor part 110, formed of a plurality of circuits 112. Each of the image processor circuits preferably has identical structure. Also integrated on the chip 99 is a controlling element 120, which produces control signals that control the flow of the operation on the chip.
- Each of the transistors on the substrate are preferably formed of MOS type circuit elements .
- the control structure can be CMOS.
- Figure IB shows a detailed schematic of the structure of the pixels 102 and an associated processing circuit 112.
- the signals described herein are produced by the control circuit 120, which can be a small processor, or can be hardwired logic, which is created using hardware definition language.
- the system preferably uses a photosensor of a type which has an associated charge storage part.
- this associated charge storage part will also integrate charge from incoming light.
- the charge integration may be less efficient than the actual photoreceptor.
- the photoreceptor is a photogate 150, which has an associated node 151.
- the node 151 is maintained separated from a floating diffusion 152.
- a transfer gate 154 separates the charge stored in the photogate 150 from the floating diffusion 152.
- the TX gate is held at a fixed voltage of about 1.2 volts, which is a slightly "ON" state. This forms a barrier to the charge under the photogate, when the photogate is biased high, say at 5 volts.
- the photogate is pulsed low, e.g., to 0 volts, the TX gate forms a channel, allowing the charge to pass to the floating diffusion.
- the control of the photogate voltage PG is produced by the control circuit 120.
- the level of the floating diffusion can be adjusted by the reset transistor 155.
- the reset signal RXT connects the reset transistor to the voltage V AA , which is a reset voltage.
- the level on floating diffusion 152 is also buffered by a follower 158, and can be sampled.
- a row select transistor 160 is actuated by the control circuit 120 to select that specified row of pixels.
- a plurality of other row select transistors from different rows are connected to the node 162. Only one row is preferably selected at any one time.
- Each column of pixels is associated with a column signal processor shown as 112. The column signal processor processes the signals described herein. As shown, three sample and hold circuits are provided.
- a first sample and hold circuit 165 stores the reset level.
- the SH_RST signal from the control circuit 120 turns on the transistor 166 thus storing the reset level into the capacitor 168.
- the other sample and hold circuit 170 stores the floating diffusion level
- the third sample and hold circuit 175 stores the photogate signal.
- An arithmetic processor 175 can be provided to provide any desired combination of these signals.
- the low sensitivity signal can correspond to the floating diffusion values subtracted from the reset value .
- the photogate value can correspond to the photogate sample and hold level, subtracted from the floating diffusion value, and optionally also subtracted from the reset value.
- Each of the pixels in a specific row receives the same row select signal to the base of the transistor 160 that is associated with each pixel in that row.
- the operation occurs as shown in Figure 2.
- the system is first reset as shown as 250, to a reset level.
- the reset value is sampled at 255.
- the reset value is sampled during this time by selecting the row, and actuating the SH_RST signal to provide the reset signal onto the associated capacitor 168.
- the photogate mode integration begins at the time of reset shown as 240.
- the floating diffusion integration begins at time 245, after the sample reset value is detected.
- the floating diffusion 152 has integrated charge. This is sampled at time 200, to obtain the value of the FD sample. This value is then actuated into the sample and hold circuit 170.
- the photogate also includes charge.
- the transfer gate 154 is actuated by producing the signal TX from the controller. This dumps the charge from the photogate 150 into the floating diffusion and the floating diffusion is again sampled at 210 to obtain the photogate value. This value is then held in the sample and hold 175.
- Both the photogate and the floating diffusion integrate during the same time period. At least 80% of the integration time is preferably common.
- the time of integration of the FD may be slightly less, to accommodate sampling values on the floating diffusion. However, since the time of integration is mostly common, the same scene is imaged.
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
Description
Claims
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU54943/00A AU5494300A (en) | 1999-06-15 | 2000-06-15 | Dual sensitivity image sensor |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13934599P | 1999-06-15 | 1999-06-15 | |
| US60/139,345 | 1999-06-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2000078034A2 true WO2000078034A2 (en) | 2000-12-21 |
| WO2000078034A3 WO2000078034A3 (en) | 2001-05-10 |
Family
ID=22486185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2000/016633 Ceased WO2000078034A2 (en) | 1999-06-15 | 2000-06-15 | Dual sensitivity image sensor |
Country Status (2)
| Country | Link |
|---|---|
| AU (1) | AU5494300A (en) |
| WO (1) | WO2000078034A2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1096790A3 (en) * | 1999-10-26 | 2003-03-26 | Eastman Kodak Company | Variable collection of blooming charge to extend dynamic range |
| WO2005006738A1 (en) * | 2003-07-02 | 2005-01-20 | Micron Technology, Inc. | Cmos imaging for automatic exposure control and correlated double sampling |
| US7332703B2 (en) | 2004-03-22 | 2008-02-19 | Micron Technology, Inc. | Imaging structure including a pixel with multiple signal readout circuits and methods of operation for imaging structure |
| CN100518254C (en) * | 2005-01-14 | 2009-07-22 | 佳能株式会社 | Image pickup device, its control method and camera |
| EP2040458A3 (en) * | 2007-09-24 | 2012-10-17 | Arnold & Richter Cine Technik GmbH & Co. Betriebs KG | Image sensor |
| US10645315B2 (en) | 2016-12-30 | 2020-05-05 | Samsung Electronics Co., Ltd. | Image sensor |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5737016A (en) * | 1985-11-15 | 1998-04-07 | Canon Kabushiki Kaisha | Solid state image pickup apparatus for reducing noise |
| JP3441761B2 (en) * | 1993-05-28 | 2003-09-02 | キヤノン株式会社 | Image sensor |
| JP3413664B2 (en) * | 1993-08-12 | 2003-06-03 | ソニー株式会社 | Charge transfer device |
| US5471515A (en) * | 1994-01-28 | 1995-11-28 | California Institute Of Technology | Active pixel sensor with intra-pixel charge transfer |
| JP3309630B2 (en) * | 1995-03-20 | 2002-07-29 | ソニー株式会社 | Switching circuit and charge transfer device using the same |
| US5898168A (en) * | 1997-06-12 | 1999-04-27 | International Business Machines Corporation | Image sensor pixel circuit |
| US6046466A (en) * | 1997-09-12 | 2000-04-04 | Nikon Corporation | Solid-state imaging device |
-
2000
- 2000-06-15 AU AU54943/00A patent/AU5494300A/en not_active Abandoned
- 2000-06-15 WO PCT/US2000/016633 patent/WO2000078034A2/en not_active Ceased
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1096790A3 (en) * | 1999-10-26 | 2003-03-26 | Eastman Kodak Company | Variable collection of blooming charge to extend dynamic range |
| US7642497B2 (en) | 2003-07-02 | 2010-01-05 | Aptina Imaging Corporation | CMOS pixel and imaging device supporting automatic light control (ALC) and correlated double sampling (CDS) |
| US7105793B2 (en) | 2003-07-02 | 2006-09-12 | Micron Technology, Inc. | CMOS pixels for ALC and CDS and methods of forming the same |
| US7312431B2 (en) | 2003-07-02 | 2007-12-25 | Micron Technology, Inc. | CMOS imaging for ALC and CDS |
| WO2005006738A1 (en) * | 2003-07-02 | 2005-01-20 | Micron Technology, Inc. | Cmos imaging for automatic exposure control and correlated double sampling |
| CN1843026B (en) * | 2003-07-02 | 2010-12-22 | 普廷数码影像控股公司 | CMOS imaging for automatic exposure control and correlated double sampling |
| US7332703B2 (en) | 2004-03-22 | 2008-02-19 | Micron Technology, Inc. | Imaging structure including a pixel with multiple signal readout circuits and methods of operation for imaging structure |
| CN100518254C (en) * | 2005-01-14 | 2009-07-22 | 佳能株式会社 | Image pickup device, its control method and camera |
| EP2040458A3 (en) * | 2007-09-24 | 2012-10-17 | Arnold & Richter Cine Technik GmbH & Co. Betriebs KG | Image sensor |
| US10645315B2 (en) | 2016-12-30 | 2020-05-05 | Samsung Electronics Co., Ltd. | Image sensor |
| US10917592B2 (en) | 2016-12-30 | 2021-02-09 | Samsung Electronics Co., Ltd. | Image sensor |
| US11606520B2 (en) | 2016-12-30 | 2023-03-14 | Samsung Electronics Co., Ltd. | Image sensor |
| US11678082B2 (en) | 2016-12-30 | 2023-06-13 | Samsung Electronics Co., Ltd. | Image sensor |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2000078034A3 (en) | 2001-05-10 |
| AU5494300A (en) | 2001-01-02 |
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