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WO1999033171A1 - Circuit amplificateur a correction d'erreur et procede associe - Google Patents

Circuit amplificateur a correction d'erreur et procede associe Download PDF

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Publication number
WO1999033171A1
WO1999033171A1 PCT/US1998/016155 US9816155W WO9933171A1 WO 1999033171 A1 WO1999033171 A1 WO 1999033171A1 US 9816155 W US9816155 W US 9816155W WO 9933171 A1 WO9933171 A1 WO 9933171A1
Authority
WO
WIPO (PCT)
Prior art keywords
modulation
error correction
signal
correction path
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US1998/016155
Other languages
English (en)
Inventor
John E. Matz
Kirby E. Kirchhoff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of WO1999033171A1 publication Critical patent/WO1999033171A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H03F1/3229—Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3218—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion the main amplifier or error amplifier being a feedforward amplifier

Definitions

  • the present invention relates generally to power amplifier circuits and in particular to reducing nonlinear distortion contained in an output signal of a power amplifier circuit.
  • Radio frequency (RF) power amplifiers such as class AB, bipolar junction transistor (BJT) amplifiers
  • BJT bipolar junction transistor
  • Such distortion typically includes high order nonlinearities (e.g., fifth order, seventh order, and ninth order intermodulation products) when the BJT device is driven with multiple tone, high voltage input signals, as is the case for base station amplifiers at a typical cellular base site.
  • the distortion creates unwanted interference in the transmission bandwidth of the cellular system — for example, at the frequencies corresponding to the fifth order, seventh order, and ninth order intermodulation products.
  • a linearization technique such as a feed forward technique.
  • an input signal to an RF amplifier is sampled prior to amplification by the RF amplifier.
  • An RF pilot reference signal is combined with the input signal subsequent to the sampling of the input signal.
  • the input signal and the RF pilot signal are applied to the RF amplifier.
  • the RF amplifier amplifies both signals and introduces nonlinear amplitude and phase distortion into both signals during the amplification process.
  • the amplified signal is sampled and the sampled input signal is subtracted from the sampled amplified signal to extract the distortion in the sampled amplified signal. This extracted distortion is commonly called an error signal.
  • the error signal is adjusted in amplitude and phase based on the level of the RF pilot signal detected with an RF pilot receiver at the output of the feed forward amplifier network.
  • the adjusted error signal is amplified and subtracted from the originally amplified signal to produce a corrected signal having less distortion than the originally amplified signal.
  • the corrected signal serves as the output signal of the feed forward network.
  • the feed forward approach reduces the distortion introduced by the high power RF amplifier circuit as indicated by a reduction in the level of the RF pilot signal in the output signal.
  • the RF pilot signal is used to monitor the level of nonlinear distortion contained in the corrected signal.
  • complex and costly RF circuitry e.g., an RF oscillator, an RF amplifier, and an RF receiver
  • RF circuitry e.g., an RF oscillator, an RF amplifier, and an RF receiver
  • FIG. 1 illustrates a feed forward amplifier network in accordance with a preferred embodiment of the present invention.
  • FIG. 2 illustrates a signal modulation circuit for use in the feed forward amplifier network shown in FIG. 1.
  • FIG. 3 illustrates a preferred reference signal generator in accordance with the present invention.
  • FIG. 1 illustrates a feed forward amplifier network 100 for operating on an input signal 149 to provide a substantially linear and amplified output signal 151 in accordance with a preferred embodiment of the present invention.
  • the feed forward amplifier network 100 includes an amplifier circuit 101 along a main amplification path 103, a first error correction path 105 and a second error correction path 107.
  • First error correction path 105 includes operatively coupled: coupler 109, amplitude and phase adjuster/modulator 111, amplifier output coupler 110, combining network 113, amplitude and phase adjuster/modulator 115, error amplifier 117 and error amplifier output coupler 119 having a coupled load 121.
  • Second error correction path 107 includes operatively coupled: input coupler 129, amplifier output coupler 123, combining network 133, amplitude and phase adjuster 135, error amplifier 137 and error amplifier output coupler 139 having a coupled load 141.
  • Feed forward amplifier network 100 also includes controllers 127 and 147 coupled respectively via detector 125 and coupler 123 and detector 145 and coupler 143 to main amplification path 103.
  • the amplifier circuit 101 is preferably a class AB, RF power device along with any necessary DC biasing and RF matching circuitry.
  • the couplers 109, 110, 119, 123, 129, 139 and 143 are preferably microstrip or stripline directional couplers. It will be appreciated by one of ordinary skill in the art that while not shown in the FIG. 1, suitable delay devices, preferably constructed from predetermined lengths of transmission lines, such as coaxial cable, will be provided as necessary in the various signal paths to ensure proper, time aligned, sampling and combining of signals.
  • the combining networks 113 and 133 are preferably constructed from a one-quarter wavelength transmission line and a 90 ° directional coupler that together invert and attenuate the signal provided into the combining network, respectively.
  • each of amplitude and phase adjuster/modulator 111, amplitude and phase adjuster/modulator 115, amplitude and phase adjuster 131 and amplitude and phase adjuster 135 are of similar construction discussed below.
  • each preferably includes an amplitude adjuster/modulator portion 153 and a phase adjuster/modulator portion 155, which are preferably low frequency modulators.
  • Each modulator 153 and 155 include a reference signal generator 163/167 and a signal characteristic adjuster 161/165, respectively.
  • Amplitude modulator 153 modulates and/or adjusts the amplitude of an input signal.
  • Phase modulator 155 modulates and/or adjusts the phase of the input signal.
  • quadrature amplitude modulators may be used.
  • the amplitude reference signal generator 163 is preferably a tone generator that produces an audio reference amplitude modulation (AM) signal 169.
  • the phase reference signal generator is preferably a tone generator that produces an audio reference phase modulation (PM) signal 171.
  • the reference signal generators 163, 167 may be pseudonoise (PN) sequence generators that produce digital modulation signals corresponding to orthogonal PN sequences.
  • the amplitude adjuster 161 is preferably a voltage variable attenuator responsive to the reference AM signal 169 and/or a direct input adjustment signal 157.
  • the phase adjuster 165 is preferably a known voltage variable phase adjusting circuit (e.g.
  • Detectors 125 and 145 are preferably well known envelope detectors.
  • Error amplifiers 117 and 137 are similar to amplifier circuit 101; however, the output power of error amplifiers 139 and 147 is considerably less than the output power of amplifier circuit 101 as will be described more fully below.
  • FIG. 3 illustrates a preferred embodiment 170 of controllers 127 and 147 of FIG. 1.
  • the controllers 127 and 147 are of comparable construction and therefore a single discussion of their structure and operation is provided. Further operational details will be discussed below with respect to operation of amplifier circuit 100.
  • Each controller 127 and 147 includes an amplitude reference signal receiver 173 and a phase reference signal receiver 175.
  • the amplitude reference signal receiver 173 is preferably an analog multiplier 177 and an amplitude integrator 179.
  • the phase reference signal receiver 175 is preferably an analog multiplier 181 and a phase integrator 183. High-resolution integrators 179, 183 are preferred to minimize small offset errors in the modulation and/or adjustment output signals of each of controllers 127 and 147.
  • the analog multipliers 177, 181 accept recovered residual modulation 183, 185 from detectors 125, 145, respectively.
  • the recovered residual modulation is correlated (e.g., multiplied) with the corresponding reference modulation signals 169, 171 to obtain respective correlation signals.
  • Each correlation signal is then filtered by the appropriate integrator 179, 183 to produce the updated modulation/adjustment signal.
  • the input 187 is sampled by coupler 109 and is modulated by amplitude and phase adjuster/modulator 111.
  • the modulated signal 188 is coupled to amplifier 101.
  • Amplitude and phase adjuster/modulator 111 also adjusts the signal in accordance with control signals from controller 127.
  • the sampled signal 189 is communicated to a first input of combining network 113.
  • a second input of combining network 113 is coupled to amplifier output coupler 110 and receives a sample 190 of the amplifier 101 output signal 191.
  • the output 193 of combining network 113 is coupled to amplitude and phase adjuster 115 and the adjusted signal 195 is coupled to an input of error amplifier 117.
  • the output coupler 119 providing a corrected output signal 199.
  • First error correction path 105 operates substantially as a feed forward error correction path. That is, signal 193 representing the distortion in output signal 191 is amplified and combined back into output signal 191 effectively subtracting the distortion from output signal 191. Coupler 123 and detector 125 are utilized to determine remaining modulation in the amplified signal, indicative of imperfect error cancellation. This remaining modulation is utilized by controller 127 to produce amplitude and phase adjustment signals that are communicated to amplitude and phase adjuster 115. Amplitude and phase adjuster 115 adjusts the input signal 195 to error amplifier 117, in accordance with the adjustment signals, for better canceling the residual modulation, and hence error.
  • First error correction path 105 also provides a means for introducing an additional modulation signal for use by the second error correction path 107 for further error canceling. First, however, a discussion of second error correction path 107 operation is in order.
  • a sample 201 of input signal 149 is coupled to a first input of combining network 133.
  • a second input of combining network 133 is coupled to coupler 123 to receive a sample of corrected output signal 199.
  • the output signal 203 of combining network 133 represents any remaining distortion in corrected output signal 199.
  • Signal 203 is coupled to amplitude and phase adjuster 135 the output 205 of which is coupled to an input of error amplifier 137.
  • the output 207 of error amplifier 137 is then coupled via coupler 139 with corrected output signal 199 to provide amplifier network output signal 151.
  • Coupler 143 and detector 145 are utilized to determine remaining modulation (and hence distortion) in the amplifier network output signal 151.
  • controller 147 This remaining modulation is utilized by controller 147 to produce amplitude and phase adjustment signals that are communicated to amplitude and phase adjuster 135.
  • Amplitude and phase adjuster 135 adjusts the input signal 205 to error amplifier 137, in accordance with the adjustment signals, for better canceling the residual modulation, and hence error.
  • second error correction path 107 will not be fully realized. This is primarily because the remaining modulation in corrected signal 199 is very small and difficult to detect. Injecting a second modulation signal at the amplifier network input is possible using amplitude and phase adjuster 131 as described in the aforementioned U.S. Patent No. 5,491,454; however, an efficient implementation of first error correction path 105 will result in substantial cancellation of the second injected modulation again limiting the effectiveness of the second error correction path.
  • the first error correction path 105 is advantageously configured to provide for injecting a second modulation signal into main amplification path 103.
  • the second modulation signal is utilized by second error correction path 107 for achieving still better error correction of the amplified output signal 151.
  • amplitude and phase adjuster 111 and controller 127 provide for adjustment of signal 187 such that the output 193 of combining network 113 contains a small portion of the carrier signal. That is, a small portion of the carrier signal remains in second error correction path 105 and is modulated with a second modulation by amplitude and phase modulator 115.
  • signal 187 is adjusted such that the power in the load 121 coupled with coupler 119 is minimized.
  • error amplifier 117 will be sized accordingly larger to handle amplification of the portion of carrier signal on first error correction path 105.
  • Amplitude and phase adjuster/modulator 115 operates as described to adjust signal 193 to remove modulation introduced by amplitude and phase adjuster/modulator 111.
  • amplitude and phase adjuster/modulator 115 is adapted to receive modulation signals from controller 147 for applying the second modulation to signal 193.
  • the second modulation is not corrected on first error correction path 105 and is amplified through error amplifier 117 and is coupled into corrected amplifier signal 199 via coupler 119.
  • second error correction path 107 combination of signal 199 and signal
  • 201 provides a signal 203 that includes the second modulation introduced by amplitude and phase adjuster/modulator 115.
  • Signal 203 is adjusted, as described, by amplitude and phase adjuster 135, is amplified by error amplifier 137 and coupled with corrected amplifier output signal 199 via coupler 139.
  • Second error correction path is tuned, that is adjusted, for good carrier cancellation.
  • amplitude and phase adjuster 131 receives adjustment signals for providing good carrier cancellation in second error correction path 207, i.e., minimal carrier signal in the output of combining network 133.
  • Tuning first error correction path 105 to minimize power in load 121 provides the further advantage of increasing the efficiency of amplifier network 100. Power is not lost in load 121 and, in fact, the power introduced by error amplifier 117 is coupled with amplifier 101 output. The tradeoff is the requirement of a larger error amplifier 127 in first error correction path 105; although it is still significantly smaller than amplifier 101. As noted, second error correction path 107 is tuned for good carrier cancellation. Thus error amplifier 147 may be specified accordingly smaller than error amplifier 127. However, second error correction path 107 might also be tuned to minimize the power in load 141 without departing from the fair scope of the present invention.
  • the present invention encompasses a method and apparatus for reducing distortion contained in an output signal of an amplifier circuit.
  • RF pilot signals are not necessary to measure the amount of distortion contained in the output signal of a feed forward amplifier network. Accordingly, this invention eliminates the need for the complex, costly RF circuitry associated with the generation and reception of those RF pilot signals. It should be appreciated, however, that a RF pilot signal implementation may benefit from the present invention and such an implementation would not depart from the fair scope of the present invention.
  • the present invention further implements a multiple loop construction and provides a means for introducing additional modulations in order to take full advantage of the multiple loop construction.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

La présente invention concerne un réseau amplificateur à correction aval destiné à réduire la distorsion contenue dans un signal de sortie (151) d'un circuit amplificateur (101), qui comprend des première (105) et deuxième (107) voies de correction d'erreur. La première voie (105) met en oeuvre une correction d'erreur et la réduction de la modulation résiduelle. De plus, elle permet d'ajouter une deuxième modulation au signal de sortie corrigé (199) de l'amplificateur. La deuxième voie (107) met en oeuvre une correction d'erreur sensible au moins en partie à la deuxième modulation, et une réduction de la modulation résiduelle qui comprend la deuxième modulation.
PCT/US1998/016155 1997-12-19 1998-07-31 Circuit amplificateur a correction d'erreur et procede associe Ceased WO1999033171A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US99520697A 1997-12-19 1997-12-19
US08/995,206 1997-12-19

Publications (1)

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WO1999033171A1 true WO1999033171A1 (fr) 1999-07-01

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1076412A3 (fr) * 1999-08-10 2001-04-18 Nec Corporation Amplificateur à boucle de contre-réaction du type aval et procédure de compensation d'une distorsion non-linéaire dans cet amplificateur
WO2003081770A1 (fr) * 2002-03-19 2003-10-02 Motorola, Inc. Procede et appareil permettant de realiser l'annulation de porteuse dans un circuit amplificateur a correction aval

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5386198A (en) * 1993-01-28 1995-01-31 Telefonaktiebolaget L M Ericsson Linear amplifier control

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5386198A (en) * 1993-01-28 1995-01-31 Telefonaktiebolaget L M Ericsson Linear amplifier control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1076412A3 (fr) * 1999-08-10 2001-04-18 Nec Corporation Amplificateur à boucle de contre-réaction du type aval et procédure de compensation d'une distorsion non-linéaire dans cet amplificateur
WO2003081770A1 (fr) * 2002-03-19 2003-10-02 Motorola, Inc. Procede et appareil permettant de realiser l'annulation de porteuse dans un circuit amplificateur a correction aval

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