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WO1999031608A1 - Procede de mise au point d'une carte systeme - Google Patents

Procede de mise au point d'une carte systeme Download PDF

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Publication number
WO1999031608A1
WO1999031608A1 PCT/JP1997/004620 JP9704620W WO9931608A1 WO 1999031608 A1 WO1999031608 A1 WO 1999031608A1 JP 9704620 W JP9704620 W JP 9704620W WO 9931608 A1 WO9931608 A1 WO 9931608A1
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WO
WIPO (PCT)
Prior art keywords
integrated circuit
semiconductor integrated
circuit device
test
design
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP1997/004620
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English (en)
Japanese (ja)
Inventor
Isao Shimizu
Masayuki Satou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to PCT/JP1997/004620 priority Critical patent/WO1999031608A1/fr
Publication of WO1999031608A1 publication Critical patent/WO1999031608A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

Definitions

  • the present invention relates to a method for developing a system board using a semiconductor integrated circuit device, and more particularly to a technique for enabling the development and design of a system board to be started from an upstream side of a semiconductor integrated circuit device design process.
  • the semiconductor integrated circuit device to be used is a device newly developed or improved by adding new functions, the system will be developed until the development of the semiconductor integrated circuit device proceeds to some extent and a sample device is provided. It is customary not to undertake board design. Even if you start designing a system board in such a state, you cannot verify any part related to the interface with an insubstantial semiconductor integrated circuit device.
  • a target specification (a target specification may mean a final specification of the product depending on a product manufactured using the present invention) is determined.
  • the design, circuit design, layout design, etc. will be sequentially advanced. At this time, if there are past design assets, they are used.
  • logic simulation and circuit simulation are performed to verify whether the design target specifications are satisfied.
  • a prototype of the integrated circuit device is manufactured, and the function of the prototyped semiconductor integrated circuit device is actually verified using a tester. If the design target specification is not achieved in the device test, modify the circuit design of the semiconductor integrated circuit device to achieve the target specification. Thus, it takes time to develop a semiconductor integrated circuit device.
  • the development of the system board using the semiconductor integrated circuit device will be required. I will be late. For example, after deciding the basic specifications of the system board and the target specifications of the new semiconductor integrated circuit device to be mounted on it, do not overdo it until a sample device of the semiconductor integrated circuit device is provided. Even when the design of the system board is started, it is not possible to carry out specific verification of the circuit part related to the interface with the device, and at least to design the part in advance. Can not. As a result, the development period from the rough specification of the system board to the completion of the system board is lengthened.
  • An object of the present invention is to provide a method capable of shortening the development period of a system board using a semiconductor integrated circuit device.
  • a method of developing a system board using a semiconductor integrated circuit device is intended to satisfy a target specification of a semiconductor integrated circuit device used for a system board to be developed before actually obtaining the semiconductor integrated circuit device.
  • a device model in which the functions of the semiconductor integrated circuit device are modeled in a function description language and a description of the external interface state of the semiconductor integrated circuit device defined according to the target specification of the system board to be developed are used.
  • the purpose of the simulation is to verify that the system board to be developed satisfies the target specifications and to advance the development of the system board.
  • the first process is to acquire a device model in which the functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy the target specifications of the semiconductor integrated circuit device used for the target system board, and to develop A second process for defining an interface state for the semiconductor integrated circuit device corresponding to a target specification of a system board to be designed, and a simulation using the device model and the definition of the interface state.
  • the device model includes an input / output state description of each external terminal defined corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy a target specification of the semiconductor integrated circuit device, and a description of the semiconductor integrated circuit device.
  • the description of the input / output state of the internal terminal of each functional module defined so that a plurality of constituent functional modules satisfy each target specification, and the target of the semiconductor integrated circuit device with respect to the input / output state of the external terminal.
  • a description of the connection state of the internal terminals between the respective functional modules defined to satisfy the specification The content of the description of the device model satisfies the target specification of the semiconductor integrated circuit device in terms of the input / output state of the external terminal and the internal terminal. Test items will be given.
  • the device model whose function is described satisfies the target specification of the semiconductor integrated circuit device to be developed, and this device model is simulated together with the description of the above interface state, and the simulation is performed based on the result of the simulation.
  • the description of the interface state that is, the design of the circuit portion related to the interface with the semiconductor integrated circuit device is appropriate. It is possible to verify the above, and to proceed with the design of the system board before the development of the semiconductor integrated circuit device is completed or before the device is obtained.
  • FIG. 1 is a schematic illustration of a user board development method in relation to a semiconductor integrated circuit device development method.
  • Figure 2 is a flowchart showing an example of a user board development method in relation to a semiconductor concentrator device development method.
  • FIG. 3 is a flowchart showing a comparative example in which design of a test board and a test program is started after circuit design of a semiconductor integrated circuit device is completed.
  • FIG. 4 is an explanatory diagram showing an example of a divided function module and an example of a hardware description of the function module in HDL.
  • FIG. 5 is a conceptual diagram showing a state in which a semiconductor integrated circuit device is mounted on a test board.
  • FIG. 6 is an explanatory diagram showing a virtual test setup, which is an example of test design means.
  • Fig. 7 is an explanatory diagram of one example of data toughness in system design and function design.
  • FIG. 8 is an explanatory diagram of an example of a data flow in circuit design.
  • FIG. 9 is an explanatory diagram of an example of a data flow when designing a test program and a test board while performing a virtual test using the virtual test server.
  • FIG. 10 is an explanatory diagram of an example of a data flow involved in designing a user board.
  • Fig. 11 is an explanatory diagram of an example of a test board design method using a virtual test board.
  • FIG. 12 is an explanatory diagram of an example of a user board design method using a device model.
  • FIG. 13 is an explanatory diagram of an example of a method of verifying a semiconductor integrated circuit device in which a part of the semiconductor integrated circuit device on a user board is subjected to circuit simulation.
  • the user of this device which develops a system board using a semiconductor integrated circuit device, consists of the basic specifications of the system board (hereinafter also referred to as user board) and the new semiconductor integrated circuit device to be mounted on the user board. Determine the target specification.
  • the development of the new semiconductor integrated circuit device is performed by the manufacturer of the semiconductor integrated circuit device according to the target specification of the device.
  • the user board is formed by forming a wiring pattern on a circuit board made of glass epoxy resin, and connecting a semiconductor integrated circuit device and a chip resistor to a predetermined portion of the wiring pattern. Will be.
  • the number of the novel semiconductor integrated circuit device may be one or more.
  • a computer system such as a workstation is used.
  • a device design means 1 and a test design means 2 are constituted by the operation program.
  • the device design means 1 performs system design, function design, circuit design, and rate design of a semiconductor integrated circuit device based on target specifications.
  • system design a semiconductor integrated circuit device is divided into functional modules of an appropriate size.
  • function design a device model is created by modeling the functions of a semiconductor integrated circuit device as a set of function modules in a function description language (for example, Hardware Description Language (HDL)).
  • HDL Hardware Description Language
  • a wafer is prototyped by the e-ha process, and a probe inspection (P inspection) is performed on it.
  • assembly (packaging) of the prototype device is performed through the assembly process.
  • This prototype device is subjected to product debugging (final inspection), the results of the debugging are fed back to device design, and finally, mass production of semiconductor integrated circuit devices is started.
  • the mass-produced semiconductor integrated circuit devices are tested at Mass Production Test 3 and shipped.
  • the test design means 2 performs a test design for testing a semiconductor integrated circuit device. For example, it supports the design of a test program for debugging for P test and final test, a test program for mass production test for mass production test, and connection between test and semiconductor integrated circuit devices. Used for test board design.
  • the result of the functional design of the semiconductor integrated circuit device is given to the test design means 2. That is, a function description data of a semiconductor integrated circuit device represented by the device model is given. Have been. Based on this, the test design means 2 performs a test design by simulating a device model together with a test model in which test items corresponding to the target specifications are modeled. The device model in which the function is described satisfies the target specification of the semiconductor integrated circuit device to be developed.This device model is simulated together with the test model, and based on the simulation results, whether the device model satisfies the target specification.
  • test design can be completed by the time of the P test. Accordingly, the development period of the semiconductor integrated circuit device can be shortened as a whole, and the development efficiency can be improved.
  • the user of the semiconductor integrated circuit device receives function description data of the semiconductor integrated circuit device represented by the device model, which is a result of the function design.
  • the device model is obtained by modeling the functions of the semiconductor integrated circuit device as a set of the functional modules in a functional description language, and satisfies the target specification.
  • the user can use the device model to design a user board using the semiconductor integrated circuit device before the device is completed. For example, a device model that satisfies the target specification is simulated together with a description of the external interface state of the semiconductor integrated circuit device defined in accordance with the target specification of the user board to be developed, and the device model satisfies the target model. Verify whether the specifications are satisfied.
  • the design of the circuit part related to the interface with the semiconductor integrated circuit device is not appropriate.
  • the user board is evaluated while proceeding with the evaluation of the user board.
  • Design from an early stage that is, semiconductor integration
  • the user board design can be advanced before the development of the circuit device is completed or before a sample of the device is obtained. Further, as described later with reference to FIG. 13, the user can request a design change for the semiconductor integrated circuit device at an early stage so as to optimize the user board.
  • FIG. 2 shows a flow chart of a user board development method in relation to a semiconductor circuit device development method.
  • steps S1 to S5 are processes for generating a device model in which the functions of a semiconductor integrated circuit device are modeled in a function description language so as to satisfy a target specification.
  • steps S6 to S8 are processing for designing a circuit of a semiconductor integrated circuit device based on the device model.
  • Steps S20 to S23 generate a test model in which test items corresponding to the target specifications are modeled in parallel with the process of designing the circuit of the semiconductor integrated circuit device, and generate the test model together with the test model. This is the process of performing a test design by simulating a device model.
  • Steps S30 to S37 are board design processing by the user.
  • Steps S l and S 2 are not particularly limited, but belong to the category of system design.
  • target specifications of a semiconductor integrated circuit device (hereinafter, also simply referred to as IC) are determined.
  • the input / output state of each external terminal is defined corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy the target specification of the semiconductor integrated circuit device.
  • the semiconductor integrated circuit device is divided into a plurality of functional modules. The size of the functional module division is related to the simulation time when verifying whether the divided functional modules satisfy the target specifications.The larger the size, the shorter the verification time is, and the smaller the size, the more detailed the function is defined. it can. Which one is adopted depends on whether the semiconductor integrated circuit device is It can be determined according to whether it is an digital circuit, an analog circuit, a digital / analog mixed circuit, or the like depending on the degree of attention.
  • steps S3 and S4 the internal terminals of each functional module are defined, and the input / output state of each internal terminal is defined so that each functional module satisfies the target specification.
  • the device model is generated by defining the coupling state of the internal terminals between the functional modules so as to satisfy the target specification of the semiconductor integrated circuit device when the input / output state of the external terminal is given.
  • step S2 input / output of each external terminal is made corresponding to each external terminal of the semiconductor integrated circuit device so as to satisfy the target specification of the semiconductor integrated circuit device.
  • the state is defined, and the semiconductor integrated circuit device is defined by dividing it into a plurality of functional modules.
  • the input / output status of the internal terminals of each functional module is defined, and the function simulation of the functional module is performed using the defined input / output status to verify whether the functional module satisfies the target specification (S4). ).
  • S3 target specification
  • S4 perform simulation
  • the connection of the internal terminals between the function modules is defined, the input / output state of the external terminals defined in step S2 is given, and the simulation is performed. Verify whether the target specifications of the integrated circuit device are satisfied (S4). If the target specification of the semiconductor integrated circuit device is not satisfied, the simulation is repeated by adjusting the target specification of the desired functional module until the target specification of the semiconductor integrated circuit device is satisfied (S4).
  • Semiconductor integrated circuit device When the target specification of the device is satisfied, a device model is generated based on the definition of the function module, the definition of the input / output state of the external and internal terminals, and the definition of the connection between the internal terminals.
  • the device model includes a chip function description data relating to a function to be realized in a chip of a semiconductor integrated circuit device and an electric characteristic of a package which accommodates the chip and forms an electrical connection with the chip. It can be formed by both the package function description data and the former. For example, when an inductance component, a capacitance component, and the like parasitic on a bonding wire of a package are considered in advance, a device model is formed by both the chip function description data and the package function description data.
  • Such a definition of the device model satisfies the target specification of the semiconductor integrated circuit device in terms of the input / output state of the external terminal and the internal terminal. Or a test item will be given.
  • a device model is given to the test design means 2, and design of a test board test program is started based on the description of the device model (S21).
  • the number of terminals and their functions are specified from the target specifications of the semiconductor integrated circuit device, and they often do not depend on the simulation result of step S4.
  • the typical target specification is given to the test design means 2 in advance, and the element constants of the test board, that is, the number of used terminals and their terminal functions are extracted from the given target specification (S20), and the extracted data is obtained.
  • the evening is given to the process of step S21 as the basic test board design data.
  • test design can proceed in parallel with circuit design in step S5 and subsequent steps.
  • the device model is simulated together with the test model, and whether or not the device model satisfies the target specification is determined from the result of the simulation to determine the validity of the test model.
  • the validity of the board design can be verified from the functional design stage.
  • the test setup model includes a test setup function description data specifying the test setup hardware by a function description, a test program for determining the test setup operation for each test item, and a test board. It can be formed based on the test board design data specifying the circuit configuration.
  • the test design means 2 proceeds with designing the test program and the test board by reflecting the simulation results in the test model.
  • circuit design by repeating circuit design 'modification (S6) and circuit simulation (S7), the design target specifications are satisfied at the circuit level.
  • the result is reflected in the test design (S22). For example, if the driving capability of the external output buffer circuit of a semiconductor integrated circuit device is changed to be smaller than the initial level, the driving capability of a relay amplifier for driving relatively long wiring on a test board may be changed. Is required. In some cases, it is necessary to eliminate dynamic characteristic changes such as voltage reflection.
  • the test board is prototyped (S23).
  • the layout design of the semiconductor integrated circuit device is performed, and the semiconductor integrated circuit device is prototyped (S9).
  • the prototyped semiconductor integrated circuit device was connected to the test board via the test board thus prepared, and the test board was operated using the test program generated by the test design.
  • Half The verification is performed by operating the conductor integrated circuit device (S10).
  • the test board and the test program are in a state of high perfection because the virtual test by step S21 and the correction by step S22 are performed. Therefore, in the device test stage of step S10, if there is an inconvenience in the test result, the failure of the device can be pointed out as the cause, and the test reliability is improved.
  • it is most effective to verify the dynamic characteristics such as voltage reflection in step S10, which is the final verification for the test design.
  • the device model is also provided to a user of the semiconductor integrated circuit device.
  • the user based on the description of the device model,
  • the design of the board (user board) can be performed (S31).
  • the number of terminals and the terminal functions are specified from the target specifications of the semiconductor integrated circuit device, and in many cases, they do not depend on the simulation result of Step S4.
  • the target specifications are also given to the user, and from the given target specifications, the number of terminals used and the terminal functions for mounting the semiconductor integrated circuit device on the user board are extracted (S30) and extracted.
  • the data obtained is given to the process of step S31 as a basic design of the user board.
  • the user can proceed with the user board design in parallel with the circuit design by the semiconductor manufacturer.
  • a model of a circuit part on the user board that is in a relationship interfacing with the semiconductor integrated circuit device (that is, another model arranged around the semiconductor integrated circuit device). Simulate the device model together with the model of the semiconductor integrated circuit device and other circuit parts, and simulate the device model and interface from the simulation results.
  • the validity of the model of the user interface circuit part of the user board can be verified from the function design stage. Therefore, the user can proceed with the design of the user board by reflecting the verification results from the function design stage of the semiconductor integrated circuit device by the manufacturer.
  • the result is provided to the user.
  • the user can reflect the result of the circuit design on the design of the user board (S32). For example, when the driving capability of the external output buffer circuit of the semiconductor integrated circuit device is changed to be smaller than the initial one, it is also possible to make a correction to insert a relay amplifier or the like in the middle of the signal wiring on the user board. In some cases, it is necessary to eliminate dynamic characteristic changes such as voltage reflection.
  • the user can start designing the user board before providing the prototype of the semiconductor integrated circuit device. After the design of the user board is completed, a prototype of the user board is manufactured. As is clear from Fig. 2, the prototype of the user board can be completed almost at the same time as the acquisition of the prototype of the semiconductor integrated circuit device. Therefore, the user can obtain a prototype of the semiconductor integrated circuit device immediately after producing the prototype of the user board, incorporate the prototype into the user board, and determine whether the semiconductor integrated circuit device achieves the target specification of the user system. It can be verified (S35). By referring to the verification results, if necessary, tuning such as adjustment of circuit elements on the user board can be performed (S36).
  • step S35 can be performed efficiently, and the period until mass production of the user board (S37) can be shortened.
  • test design cannot be performed from the upstream side of the circuit design. Therefore, when verifying the achievement of the target specifications using the prototyped semiconductor integrated circuit device, there is not enough time to complete the design of the test board test program, and the prototype device is used. Therefore, the test program and the test board cannot be verified.
  • FIG. 4 shows an example of the function module divided in step S2 and an example of a hardware function description of the function module by HDL.
  • FIG. 5 shows a conceptual diagram of a state in which a semiconductor integrated circuit device is mounted on a test board.
  • 5 is a test board
  • 6 is a semiconductor integrated circuit device.
  • Terminals for connection to the tester are arranged on the periphery of the test board 5, and terminals of the semiconductor integrated circuit device 6 are coupled to corresponding terminals of the tester via wiring and circuit elements according to their input / output functions.
  • the circuit elements are a relay amplifier for driving the wiring load of the test board, a capacitance element for preventing oscillation, and a resistance element for preventing voltage reflection.
  • FIG. 6 shows a virtual tester (referred to as a virtual tester 2) which is an example of the test design means 2.
  • Virtual test 2 Simulator 14, Design environment tool 13, Virtual test environment tool 11, Test board design environment tool 10, and test pattern processing and conversion tool Has 1 5 According to this example, each tool constitutes the data processing means by the hardware of the computer system and the application program.
  • the test board design environment tool 10 supports circuit design of a test board for connecting a test board and a semiconductor integrated circuit device based on the device model and the like.
  • the virtual test environment tool 11 includes a plurality of modules 1 that generate functional description codes of hardware specific to test equipment such as device power supply, DC measurement system, pin electronics, arbitrary waveform generation, and frequency measurement. 2 is inserted.
  • the virtual test environment tool 11 supports the design of a test program based on the information generated by the module 12, the device model, the test specification, and the like. That is, it supports the design of a test program for verifying necessary test items based on the tester function description data specifying the hardware specific to the tester by the function description and the device model.
  • the design environment tool 13 is a tool for realizing test software in a software manner.
  • the design of the device specified by the device model and the circuit design of the test board obtained by the test board design environment tool 10 The test board specified from the data is integrated with the test board in the function description, in other words, in a software manner, to build a test environment. That is, based on the test function description data, the test program and the test board design data, a test item corresponding to a target specification is modeled. A test model is constructed, and the test model and the device model are integrated.
  • Simulator 14 simulates test items in the built test environment. The validity of the test program, the validity of the physical connection between the device and the test board by the test board, and the wiring load of the test board are evaluated. If the evaluation results are inconvenient, correct the test program or test board.
  • the test pattern processing / conversion tool 15 is a tool that converts or corrects the test pattern data in the event format on the simulation into a pattern on the time axis that can be used in the test.
  • the virtual test 2 generates a test program, circuit design data of a test board, and a test pattern.
  • the virtual tester 2 completes the test board design, test program and test pattern to some extent in parallel with the circuit design, in other words, before the device prototype is completed. Can be done.
  • Fig. 7 shows an example of the data flow in system design and functional design.
  • reference numeral 20 denotes a function design and circuit design tool that is operated on a computer system such as a workstation, and is used to draw a diagram combining circuit symbols on a screen.
  • a large number of symbols are stored in the symbol library 21, and figures predefined using the symbols are stored in the figure library 22.
  • the netlist 23 stores the connection information of each figure.
  • the function design and circuit design tool 20 is provided with package element constants such as the number of external terminals of the semiconductor integrated circuit device package, target specifications of the semiconductor integrated circuit device, and the like. Using these, functional modules are divided and pins are assigned. Then, the functional simulation described in steps S3 and S4 is repeated. As a result, a functional model (device model) 24 of the entire semiconductor integrated circuit device can be generated as a set of functional modules.
  • FIG. 8 shows an example of a data flow in circuit design.
  • the functional design and circuit design tool 20 receives the device model 24 and the target specification, performs circuit design and simulation based on this, and repeats the operation until the target specification is satisfied. As a result, circuit design data 25 is obtained.
  • FIG. 9 shows an example of a data flow when designing a test program and a test board while performing a virtual test using the virtual test server 2.
  • the test board design environment tool and the virtual test environment tool of the virtual tester 2 enable test design and the like by drawing a diagram combining circuit symbols on the screen. A large number of symbols are stored in the symbol library 21, and graphics predefined using the symbols are stored in the graphics library 22.
  • the netlist 23 stores connection information of each figure. In virtual test 2, the element constants of the test board, device model 24, target specifications, etc. are input, and a basic design data for the test board is generated based on these.
  • FIG. 10 shows an example of a data flow associated with the design of a user board.
  • Reference numeral 30 denotes a design tool used for designing a user board. The design tool 30 enables functional design and circuit design by drawing a diagram combining circuit symbols on the screen.
  • a large number of symbols are stored in the symbol library 31, and graphics predefined using the symbols are stored in the graphic library 32.
  • Net list 33 stores connection information of each figure.
  • the design tool 30 inputs the device constants of the user board, device model, target specifications of the user board, etc., constructs a test environment integrating the user board model and the device model, and performs simulation and simulation of devices and test boards. Perform an evaluation.
  • Figure 11 shows an example of a test board design method using virtual test equipment 2.
  • the semiconductor integrated circuit device As a DUT (Device Under Test), but also the circuit of the input / output interface circuit of the test board between the test device and the semiconductor integrated circuit device Device constants (inductance, capacitance, etc.) must be taken into account.
  • the above element constant is assumed. Making such an assumption, the input board circuit of the test board coupled to the input of the semiconductor integrated circuit device as the DUT and the test circuit coupled to the output of the semiconductor integrated circuit device as the DUT. A circuit simulation is performed for the output circuit of the board, and a functional simulation is performed for the semiconductor integrated circuit device as D.
  • FIG. 12 shows an example of a user board design method using a device model.
  • the design of the user board it is specified by the device model.
  • the circuit element constants (inductance, capacitance, etc.) of peripheral circuits connected to the semiconductor integrated circuit device must be taken into account.
  • the above circuit element constants are assumed. With such assumptions, circuit simulation is performed on the input peripheral circuit coupled to the input of the semiconductor integrated circuit device and the output peripheral circuit coupled to the output of the semiconductor integrated circuit device.
  • FIG. 13 shows an example of a method of verifying a semiconductor integrated circuit device in which part of the semiconductor integrated circuit device on a user board is subjected to circuit simulation.
  • the input and output circuits of the semiconductor integrated circuit device are subjected to circuit simulation, and the other parts of the semiconductor integrated circuit device are subjected to function simulation.
  • the simulation waveforms of the input circuit and the output circuit of the semiconductor integrated circuit device deviate significantly from the ideal waveform, it is necessary to change the element constants of the transistors constituting the input circuit inside the semiconductor integrated circuit device.
  • Such a simulation by the user of the semiconductor integrated circuit device is performed in parallel with the circuit design by the device maker, so that a design change inside the semiconductor integrated circuit device must be performed in order to obtain good compatibility with the user system. Requests can be made early.
  • the circuit size of a semiconductor integrated circuit device is small, or When the path configuration is simple, it is possible to generate a device model without dividing it into a plurality of functional modules.
  • the method for developing a system board according to the present invention can be applied not only to a case where a new device is used, but also to a case where a device obtained by improving or extending an existing device is used.
  • the present invention relates to a semiconductor integrated circuit device developed by various design methods such as an ASIC (Application Specific Integrated Circuits) method, a standard cell method, a custom method, a logic LSI such as a memory and a microcomputer, an analog LSI, It can be widely applied to the development of various effective system boards by shortening the development period of system boards that use various semiconductor integrated circuit devices such as analog and digital mixed LSIs. it can.
  • ASIC Application Specific Integrated Circuits

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Abstract

L'invention concerne un procédé permettant de mettre au point une carte système en utilisant un dispositif à circuit intégré à semi-conducteur. La mise au point de la carte système est réalisé avant que la mise au point du dispositif à circuit utilisé pour la carte système ne soit complètement achevée. On vérifie (S31 et S32) si la carte système correspond ou non aux spécifications définies pour la carte système au moyen d'une simulation réalisée sur un modèle du dispositif, dans laquelle on modélise les fonctions du dispositif à circuit au moyen d'un langage de description de fonction, de telle manière que les spécifications cibles du dispositif à circuit soient respectées et que la description de l'état des interfaces externes du dispositif à circuit soit définie de manière conforme aux spécifications cibles. Etant donné que le modèle de dispositif dans lequel les fonctions du dispositif à circuit sont décrites correspond aux spécifications cibles du dispositif à circuit, le modèle de dispositif est simulé de pair avec la description d'un état d'interface. On peut vérifier si la partie circuit associée à la description de l'état d'interface, ou interface du dispositif à circuit, est appropriée ou non grâce aux résultats de la simulation. La conception de la carte système peut être réalisée avant que la mise au point du dispositif à circuit ou de l'ensemble du dispositif ne soit achevée.
PCT/JP1997/004620 1997-12-16 1997-12-16 Procede de mise au point d'une carte systeme Ceased WO1999031608A1 (fr)

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PCT/JP1997/004620 WO1999031608A1 (fr) 1997-12-16 1997-12-16 Procede de mise au point d'une carte systeme

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* Cited by examiner, † Cited by third party
Title
PFU TECHNICAL REVIEW, Vol. 7, No. 3, HIROTAKE NIIDE et al., "Application of Concurrent Engineering to Development of Computer System (in Japanese)", pages 31-40. *

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