[go: up one dir, main page]

WO1998038678A1 - Module a semi-conducteur - Google Patents

Module a semi-conducteur Download PDF

Info

Publication number
WO1998038678A1
WO1998038678A1 PCT/DE1998/000502 DE9800502W WO9838678A1 WO 1998038678 A1 WO1998038678 A1 WO 1998038678A1 DE 9800502 W DE9800502 W DE 9800502W WO 9838678 A1 WO9838678 A1 WO 9838678A1
Authority
WO
WIPO (PCT)
Prior art keywords
metal carrier
carrier plate
semiconductor module
module according
substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/DE1998/000502
Other languages
German (de)
English (en)
Inventor
Jürgen GÖTTERT
Martin Hierholzer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EUPEC GmbH
Original Assignee
EUPEC GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EUPEC GmbH filed Critical EUPEC GmbH
Publication of WO1998038678A1 publication Critical patent/WO1998038678A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
    • H01L25/072—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D the devices being arranged next to each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink

Definitions

  • the invention relates to a semiconductor module consisting of a metal carrier plate with an upper surface and a lower surface, a heat sink on which the metal carrier plate is fastened via its lower surface, at least one heat-conducting and electrically insulating substrate which is fastened to the upper surface of the metal carrier plate, as well as several semiconductor components which are applied to the substrate.
  • Such semiconductor modules are generally known. In order to protect semiconductor modules from being destroyed by heat loss, good heat-conductive contact between the metal carrier plates and the heat sinks is required.
  • the metal carrier plate of the semiconductor module is designed as a convexly curved surface — preferably as a spherical surface — with respect to the flat surface of the heat sink, so that when the metal carrier plate is laterally fixed to the heat sink in question, the metal carrier plate is pressed and fixed to the heat sink under mechanical tension becomes.
  • this convex design of the metal carrier plate has proven to be advantageous.
  • the cause of these negative mechanical stresses when mounting on the flat heat sink is due, among other things, to the very different coefficients of thermal expansion between the used metal carrier plates and the used ceramic substrates.
  • the thermal expansion coefficients of metals and ceramics are very different, so that the heat which occurs when the ceramic substrates are soldered to the metal carrier plates causes the ceramic and the metal carrier plate to expand to different extents.
  • this object is achieved by a semiconductor module of the type mentioned at the outset, which is characterized in that one or more predetermined bending points are introduced into the metal carrier plate.
  • a plurality of substrates which are preferably metallized on both sides, on the one hand to facilitate assembly on the metal carrier plate and on the other hand to be able to apply the semiconductor components in a structured manner, are fastened to the upper surface of the metal carrier plate.
  • a solder In order to keep the difference in temperature as small as possible during the soldering process and after the assembly has cooled, a solder must be used which has a low melting temperature, but on the other hand not so low that the heat loss which occurs later when the semiconductor module is in operation causes the solder to melt . Melting temperatures of approx. 180 ° C are common. However, this measure is no longer sufficient if larger ceramic substrates are to be used, since the ceramic substrate lengths 1 are also proportional to the relationship for the difference in the linear expansion of two different materials. It is therefore very favorable to use several smaller ceramic substrates instead of a single large ceramic substrate, so that the length 1 can be dimensioned as desired. Gaps are then typically provided between the individual ceramic substrates. However, it is also conceivable for the individual ceramic substrates to be soldered onto the metal carrier plate in abutting fashion.
  • the lower surface of the metal carrier plate convex, in particular so convex that the lower surface of the metal carrier plate corresponds to a spherical surface in the longitudinal and transverse directions.
  • the predetermined bending points are typically introduced into the surfaces of the metal carrier plate.
  • the predetermined bending points are introduced into the lower surface.
  • the predetermined bending points are introduced in the areas corresponding to the gaps and / or in the areas of the surfaces lying approximately below the edges of the substrates.
  • grooves are provided as predetermined bending points, which then simultaneously into the surfaces in the longitudinal direction, in the transverse direction or in the longitudinal direction and transverse direction of the metal carrier plates are introduced.
  • other depressions into the surfaces of the metal carrier plates instead of the grooves, for example individual local notches or bores.
  • the metal carrier plates with slots instead of such bores, notches or grooves. It is essential that the metal carrier plates are prepared in such a way that their bending rigidity is reduced.
  • FIG. 1 shows a section through a semiconductor module according to the present invention in a schematic representation
  • FIG. 2 shows a top view of a semiconductor module
  • Figure 3 is a plan view of an alternative semiconductor module.
  • the basic structure of a semiconductor module 1 shown in FIG. 1 consists of a metal carrier plate 2 made of copper, three substrates 4 made of Al 2 O 3 ceramic applied by means of a soft solder layer, on which the actual semiconductor components 6 are fastened by means of a further solder layer 5.
  • the metal carrier plate 2 has an upper surface 11 and a lower surface 10.
  • the lower surface 10 of the metal carrier plate 2 rests on a heat sink 8 and is screwed onto the heat sink 8 by means of screws 9.
  • the metal carrier plate 2 has a lower surface 10 which is convex with respect to the heat sink 8.
  • On the upper surface 11 there are three thermally highly conductive, electrically insulating substrates 4, between which there are gaps 13.
  • the substrates 4 are connected to the upper surface 11 of the metal carrier plate 2 by a soft solder layer 3.
  • Semiconductor components 6 are in turn attached to the top of the substrate 6 via soft solder layers 5. These can be connected to housing connections (not shown).
  • the top sides of the semiconductor components 6 are typically connected to one another via bond connections (not shown).
  • the mechanical stresses between the ceramic substrates 4 and the metal carrier plate 2 are significantly reduced during assembly on the heat sink 8.
  • the grooves in the exemplary embodiment shown can absorb excess thermal paste, since they are located in the lower surface 10 of the metal carrier plate 2, so that a further improvement in the transitional heat resistance can be achieved.
  • the metal carrier plate 2 has a much greater length than its width, a convex deformation in the longitudinal direction may not be sufficient.
  • the transverse dimensions of which are quite large and are, for example, in the size of the transverse dimensions convex deformation in both the longitudinal and transverse directions is very advantageous.
  • the metal carrier plate 2 typically has the shape of a spherical cap.
  • the metal carrier plate 2 has a length of 187 mm and a width of 137 mm. Its thickness is 5 mm.
  • two grooves at a distance of 57 mm from one another then run symmetrically on the lower surface of the metal carrier plate in the transverse direction.
  • the opening angle of the grooves is expediently 60 °, it being shown that smaller opening angles can lead to insufficient elasticity and larger opening angles can break the metal carrier plate during processing.
  • Such a metal carrier plate is then attached to the heat sink, for example by eight screws.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

L'invention concerne des modules à semi-conducteur (1) qui sont constitués d'une plaque support métallique (2), d'un dissipateur de chaleur (8), d'au moins un substrat céramique (4) et de plusieurs composants à semi-conducteur (6). Grâce à l'incorporation de points élastiques définis, appelés points destinés à la flexion, dans la plaque support métallique (2), les contraintes mécaniques entre les substrats céramiques et la plaque support métallique se produisant, lors du montage, sur le dissipateur de chaleur sont nettement réduites. Ainsi, la résistance thermique de transition peut être efficacement réduite, en particulier pour les plaques supports métalliques de forme convexe, sans que les substrats céramiques soient endommagés lors du montage.
PCT/DE1998/000502 1997-02-25 1998-02-19 Module a semi-conducteur Ceased WO1998038678A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19707514A DE19707514C2 (de) 1997-02-25 1997-02-25 Halbleitermodul
DE19707514.2 1997-02-25

Publications (1)

Publication Number Publication Date
WO1998038678A1 true WO1998038678A1 (fr) 1998-09-03

Family

ID=7821421

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1998/000502 Ceased WO1998038678A1 (fr) 1997-02-25 1998-02-19 Module a semi-conducteur

Country Status (2)

Country Link
DE (1) DE19707514C2 (fr)
WO (1) WO1998038678A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6709511B2 (en) 1998-09-02 2004-03-23 Memc Electronic Materials, Inc. Process for suppressing oxygen precipitation in vacancy dominated silicon
US9159639B2 (en) 2011-07-07 2015-10-13 Semikron Elektronik Gmbh & Co., Kg Power electronic system with a cooling device

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19914815A1 (de) * 1999-03-31 2000-10-05 Abb Research Ltd Halbleitermodul
WO2001008219A1 (fr) * 1999-07-23 2001-02-01 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Module semi-conducteur
DE19942915A1 (de) * 1999-09-08 2001-03-15 Still Gmbh Leistungshalbleitermodul
DE10064979C1 (de) * 2000-12-18 2002-02-28 Dieter Loewer Schaltungsanordnung und Verfahren zur Herstellung einer solchen Anordnung
DE10142971A1 (de) * 2001-09-01 2003-03-27 Eupec Gmbh & Co Kg Leistungshalbleitermodul
WO2003071601A2 (fr) * 2002-02-18 2003-08-28 Infineon Technologies Ag Module de circuit et procede de fabrication
DE10333329B4 (de) * 2003-07-23 2011-07-21 SEMIKRON Elektronik GmbH & Co. KG, 90431 Leistungshalbleitermodul mit biegesteifer Grundplatte
EP1672692B1 (fr) * 2004-12-16 2015-01-07 ABB Research Ltd Module semiconducteur de puissance
US7696532B2 (en) 2004-12-16 2010-04-13 Abb Research Ltd Power semiconductor module
ATE535018T1 (de) 2004-12-17 2011-12-15 Siemens Ag Halbleiterschaltmodul
TWI302821B (en) * 2005-08-18 2008-11-01 Ind Tech Res Inst Flexible circuit board with heat sink
DE102005061772B4 (de) * 2005-12-23 2017-09-07 Danfoss Silicon Power Gmbh Leistungshalbleitermodul
DE102006011995B3 (de) * 2006-03-16 2007-11-08 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul mit segmentierter Grundplatte
DE102006045939B4 (de) 2006-09-28 2021-06-02 Infineon Technologies Ag Leistungshalbleitermodul mit verbesserter Temperaturwechselstabilität
US7808100B2 (en) 2008-04-21 2010-10-05 Infineon Technologies Ag Power semiconductor module with pressure element and method for fabricating a power semiconductor module with a pressure element
US8237260B2 (en) 2008-11-26 2012-08-07 Infineon Technologies Ag Power semiconductor module with segmented base plate
DE102009002191B4 (de) 2009-04-03 2012-07-12 Infineon Technologies Ag Leistungshalbleitermodul, Leistungshalbleitermodulanordnung und Verfahren zur Herstellung einer Leistungshalbleitermodulanordnung
EP2447990B1 (fr) 2010-11-02 2020-12-23 ABB Power Grids Switzerland AG Plaque de base
EP2725609B1 (fr) * 2011-06-27 2019-11-13 Rohm Co., Ltd. Module à semi-conducteurs
DE102011078806B4 (de) 2011-07-07 2014-10-30 Semikron Elektronik Gmbh & Co. Kg Herstellungsverfahren für ein leistungselektronisches System mit einer Kühleinrichtung
DE102012201172B4 (de) * 2012-01-27 2019-08-29 Infineon Technologies Ag Verfahren zur Herstellung eines Leistungshalbleitermoduls mit geprägter Bodenplatte
AT14114U1 (de) * 2013-09-20 2015-04-15 Mikroelektronik Ges Mit Beschränkter Haftung Ab Trägerplatte für ein Leistungselektronikmodul
US9929066B1 (en) 2016-12-13 2018-03-27 Ixys Corporation Power semiconductor device module baseplate having peripheral heels

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4853762A (en) * 1986-03-27 1989-08-01 International Rectifier Corporation Semi-conductor modules
DE4411858A1 (de) * 1993-04-08 1994-11-03 Fuji Electric Co Ltd Leitende Kontaktstruktur für zwei Leiter
DE4338107C1 (de) * 1993-11-08 1995-03-09 Eupec Gmbh & Co Kg Halbleiter-Modul
EP0661748A1 (fr) * 1993-12-28 1995-07-05 Hitachi, Ltd. Dispositif semi-conducteur
JPH07202063A (ja) * 1993-12-28 1995-08-04 Toshiba Corp セラミックス回路基板
US5530289A (en) * 1993-10-14 1996-06-25 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3915707A1 (de) * 1989-05-13 1990-11-22 Asea Brown Boveri Kunststoffgehaeuse und leistungshalbleitermodul mit diesem gehaeuse

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4853762A (en) * 1986-03-27 1989-08-01 International Rectifier Corporation Semi-conductor modules
DE4411858A1 (de) * 1993-04-08 1994-11-03 Fuji Electric Co Ltd Leitende Kontaktstruktur für zwei Leiter
US5530289A (en) * 1993-10-14 1996-06-25 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
DE4338107C1 (de) * 1993-11-08 1995-03-09 Eupec Gmbh & Co Kg Halbleiter-Modul
EP0661748A1 (fr) * 1993-12-28 1995-07-05 Hitachi, Ltd. Dispositif semi-conducteur
JPH07202063A (ja) * 1993-12-28 1995-08-04 Toshiba Corp セラミックス回路基板
US5672848A (en) * 1993-12-28 1997-09-30 Kabushiki Kaisha Toshiba Ceramic circuit board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6709511B2 (en) 1998-09-02 2004-03-23 Memc Electronic Materials, Inc. Process for suppressing oxygen precipitation in vacancy dominated silicon
US9159639B2 (en) 2011-07-07 2015-10-13 Semikron Elektronik Gmbh & Co., Kg Power electronic system with a cooling device

Also Published As

Publication number Publication date
DE19707514A1 (de) 1998-08-27
DE19707514C2 (de) 2002-09-26

Similar Documents

Publication Publication Date Title
DE19707514C2 (de) Halbleitermodul
DE4338107C1 (de) Halbleiter-Modul
DE4318241C2 (de) Metallbeschichtetes Substrat mit verbesserter Widerstandsfähigkeit gegen Temperaturwechselbeanspruchung
EP0124029B1 (fr) Circuit à module bien refroidissable, portant un composant électrique
EP1982355B1 (fr) Dispositif électronique de puissance
DE10033977B4 (de) Zwischenverbindungsstruktur zum Einsatz von Halbleiterchips auf Schichtträgern
DE68920469T2 (de) Elektronische Packung.
DE102012201172B4 (de) Verfahren zur Herstellung eines Leistungshalbleitermoduls mit geprägter Bodenplatte
DE102004021075A1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
EP0135120B1 (fr) Elément céramique-métallique
EP1378008A2 (fr) Module de puissance
WO2001008219A1 (fr) Module semi-conducteur
EP0805492A2 (fr) Substrat métal céramique cintré en voûte
DE3940933C2 (de) Verfahren zum Verformen einer Basisplatte für Halbleitermodule und Vorrichtung zum Durchführen des Verfahrens
DE102015114522B4 (de) Verfahren zum Auflöten eines ersten Lötpartners auf einen zweiten Lötpartner unter Verwendung von Abstandhaltern
DE4444680A1 (de) Mehrfachsubstrat für elektrische Bauelemente, insbesondere für Leistungs-Bauelemente
EP0632684B1 (fr) Procédé de fabrication d'un substrat métal-céramique
DE3922485C1 (fr)
DE19615481C5 (de) Gewölbtes Metall-Keramik-Substrat
DE19614501C2 (de) Verfahren zum Herstellen eines Keramik-Metall-Substrates sowie Keramik-Metall-Substrat
DE19609929B4 (de) Leistungshalbleitermodul
EP0459283A1 (fr) Composant semi-conducteur fixé sur un support céramique
EP0938748B1 (fr) Connexion electrique pour composant a semi-conducteur de puissance
DE29719778U1 (de) Leistungshalbleitermodul
DE10134187A1 (de) Kühleinrichtung für Halbleitermodule

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT SE

DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: JP

Ref document number: 1998537165

Format of ref document f/p: F

122 Ep: pct application non-entry in european phase