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WO1998033213A1 - Procede de fabrication d'un dispositif semi-conducteur - Google Patents

Procede de fabrication d'un dispositif semi-conducteur Download PDF

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Publication number
WO1998033213A1
WO1998033213A1 PCT/JP1998/000346 JP9800346W WO9833213A1 WO 1998033213 A1 WO1998033213 A1 WO 1998033213A1 JP 9800346 W JP9800346 W JP 9800346W WO 9833213 A1 WO9833213 A1 WO 9833213A1
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WO
WIPO (PCT)
Prior art keywords
defect
manufacturing
inspection
semiconductor device
manufacturing line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP1998/000346
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English (en)
Japanese (ja)
Inventor
Seiji Ishikawa
Takaaki Kumazawa
Jun Nakazato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of WO1998033213A1 publication Critical patent/WO1998033213A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Definitions

  • the present invention relates to a manufacturing technique for improving a semiconductor device manufacturing yield, and more particularly to a semiconductor device manufacturing method for efficiently managing a semiconductor device manufacturing line and improving the manufacturing yield.
  • Semiconductor devices are manufactured by forming a pattern by repeating a film forming process, an exposing process, an etching process, and the like, and stacking these in multiple layers.
  • the processing dimensions of patterns formed on semiconductor devices are fine, and products with dimensions already less than 1 m are widely sold.
  • the history refers to the processing unit, processing date and time, processing conditions (set value / actual value), the quality of the lot before and after, the monitoring result of the processed equipment, and the like.
  • An object of the present invention is to improve the manufacturing yield by effectively inspecting a semiconductor device being manufactured. Disclosure of the invention
  • the present invention in order to achieve the above object, necessary inspection information is acquired during a prototype period before mass production of semiconductor devices is started, and semiconductor devices are mass-produced using the inspection information.
  • pre-check the size of fatal defects, the generation area, observation images, and inspection means for each defect generation process In mass production, inspections are performed based on the pre-check items to determine the management criteria for inspection results, inspection process, inspection area, etc. in semiconductor device manufacturing without delay, and improve yield. Do it quickly.
  • a step of manufacturing a semiconductor device on a first manufacturing line a step of inspecting the semiconductor device by an inspection device provided on the first manufacturing line, and an inspection result of the semiconductor device Generating manufacturing line management information from the following; setting an inspection device on a second manufacturing line based on the generated manufacturing line management information; manufacturing a semiconductor device on the second manufacturing line;
  • the above object is achieved by including a step of inspecting a semiconductor device manufactured on the second manufacturing line by an inspection device set based on the manufacturing line management information.
  • inspection standards for mass production for example, locations to be inspected particularly on a wafer can be effectively set without delay, so that stable production at a mass production site can be performed quickly. It can be realized, and the yield can be improved.
  • a step of manufacturing a semiconductor device on a first manufacturing line, and an appearance / foreign matter inspection provided on the first manufacturing line Detecting a defect on a wafer forming the semiconductor device by the device; detecting an electrical characteristic of a chip of the wafer forming the semiconductor device by a probe inspection device provided on the first manufacturing line; A step of determining a chip having a defect from the detection result of the external appearance / foreign matter inspection apparatus; and a step in which electrical characteristics are defective among the chips determined to have the defect based on the detection result of the probe inspection apparatus.
  • the above object is achieved by including a step of manufacturing a semiconductor device at a frequency equal to or higher than the inspection frequency of a completed wafer.
  • a step of manufacturing a semiconductor device on a first manufacturing line a step of detecting a defect on a wafer forming the semiconductor device by an appearance / foreign matter inspection device provided on the first manufacturing line; Detecting the electrical characteristics of a chip of a wafer forming the semiconductor device by using a probe inspection device provided in the first manufacturing line; and a detection result of the appearance / foreign matter inspection device and the probe. Calculating the correlation between the number of defects and the yield based on the detection result of the inspection device; and determining the management criteria of the inspection device provided in the second manufacturing line by determining the number of foreign substances whose yield is within a predetermined value.
  • the appearance / foreign matter inspection apparatus determines a size of a defect on a wafer, calculates a correlation between the number of defects and a yield for each predetermined defect size, and provides an inspection apparatus capable of detecting the defect size. It is preferable to set the number of defects for each defect size for setting the yield to be within a predetermined value as a control standard of the set inspection apparatus, which is set in the second production line.
  • the appearance / foreign matter inspection apparatus determines a type of a defect on a wafer, calculates a correlation between the number of defects and a yield for each predetermined defect type, and provides an inspection apparatus capable of detecting the type of the defect. It is preferable to set the number of defects for each type of defect for which the yield is within a predetermined value as a management standard for the set inspection apparatus.
  • the appearance / foreign matter inspection apparatus determines the size of the defect on the wafer, calculates the defect occurrence density on the wafer for each predetermined size, and the defect occurrence density of any one of the defect sizes is equal to or more than a predetermined value. In this case, it is preferable to set an inspection device capable of detecting a defect size that is equal to or larger than the predetermined value in the second production line. Further, the appearance / foreign matter inspection apparatus determines the type of the defect on the wafer, calculates the defect occurrence density on the wafer for each predetermined defect type, and determines whether the defect occurrence density of any of the defect types is a predetermined value. In this case, it is preferable to set an inspection apparatus capable of detecting the type of the defect having the predetermined value or more in the second production line.
  • the above object can be achieved by including steps for manufacturing a conductor device. As a result, all phenomena can be simulated before mass production starts, and by predicting and managing phenomena that become defective due to the attachment of defects, the yield at mass production bases can be improved.
  • the defect attachment positions are made different from each other and simulated, and the inspection area of the inspection apparatus is set so as to inspect the attachment position determined as abnormal.
  • FIG. 1 is a system diagram of the present invention
  • FIG. 2 is an operation form of the present invention
  • FIG. 3 is a diagram showing an example of information obtained from the appearance / foreign matter inspection device
  • FIG. 4 is a diagram showing coordinates on a wafer
  • FIG. FIG. 6 is a diagram showing an example of information obtained from a probe inspection apparatus
  • FIG. 6 is a diagram showing an example of information on a wafer
  • FIG. 7 is a diagram showing an established PF for each process
  • FIG. Fig. 8 shows the established PF for each process
  • Fig. 9 shows the correlation between yield Y and established Y
  • Fig. 10 shows the correlation between yield Y and established Y.
  • FIG. 11 is a flowchart showing an example of an operation mode of the present invention.
  • FIG. 12 is a diagram showing a problem occurrence situation for each process
  • FIG. FIG. 14 is a flowchart showing an example of an operation mode of the present invention.
  • FIG. 14 is a correlation diagram between the yield Y and the number N of defects
  • FIG. FIG. 15 is a flow chart showing an example of an operation mode of the present invention.
  • FIG. 16 is a view showing a defect occurrence region on a wafer.
  • FIG. 17 is a defect chart on a wafer.
  • FIG. 18 is a diagram showing information on the generation area
  • FIG. 18 is a diagram showing an appearance foreign matter inspection device of the present invention
  • FIG. 19 is a diagram showing an example of a display screen of the present invention;
  • FIG. 18 is a diagram showing information on the generation area
  • FIG. 20 is a flowchart showing an example of an operation mode of the present invention
  • FIG. 21 is a diagram showing an example of a simulation result of the present invention
  • FIG. FIG. 23 is a diagram showing information on a simulation result
  • FIG. 23 is a diagram showing information on a simulation result of the present invention
  • FIG. 24 is a system diagram of the present invention
  • FIG. FIG. 4 is a flowchart showing an example of an operation mode of the present invention.
  • FIG. 1 is a system diagram showing the concept of the present invention.
  • Figure 1 consists of the first stage of prototype production, which establishes the optimal manufacturing conditions for the designed device, and the second stage of mass production, which is premised on actual sales as a product.
  • Prototype 1 and mass production 2 may be performed on the same line, or may be performed on different lines. However, there may be some overlap in time. It is natural that the prototype 1 is performed before the mass production 2.
  • Prototype 1 consists of various types of manufacturing equipment 15 that performs processes such as film formation, exposure, and etching on the input wafer, and a quality inspection device 3 (for example, wafers) that inspects the quality of the wafers processed by the manufacturing equipment.
  • a quality inspection device 3 for example, wafers
  • Foreign matter / visual inspection equipment 4 for inspecting defects or foreign matter on the surface
  • probe inspection equipment 5 for inspecting the electrical characteristics of wafers after all wafer processing steps have been completed
  • Check item generation station 9 that collects the appearance inspection 4 results and manufacturing results (probe inspection 5 results) to generate the necessary inspection information, and accumulates the inspection information generated by the check generation item station 9 It consists of database 10.
  • the mass production base 2 includes various manufacturing apparatuses 15 for performing processes such as film formation, exposure, and etching on the input wafers, and a quality inspection apparatus 3 for inspecting the quality of wafers processed by the manufacturing apparatuses (for example, wafers).
  • a quality inspection apparatus 3 for inspecting the quality of wafers processed by the manufacturing apparatuses (for example, wafers).
  • Foreign matter / visual inspection equipment 4) for inspecting the above defects or foreign matter
  • probe inspection equipment 5 for inspecting the electrical characteristics of wafers after all wafer processing steps are completed, and inspection information generated in prototype 1 are stored. It is composed of a database 11 and a guide station 12 for outputting a management standard, a process to be inspected, a place on a wafer to be inspected, and the like from the inspection information stored in the database.
  • the database 10 of the prototype 1 and the database 12 of the mass production base 2 are connected via a communication line 14.
  • the databases provided for the prototype 1 and the mass production base 2 are not necessarily required. There is no problem as long as the guidance station 12 of the mass production base outputs necessary information based on the inspection information generated in the step 9.
  • the databases of the prototype 1 and the mass production base 2 may be integrated, or the information of the prototype 1 may be transferred to the mass production base 2 via a storage medium.
  • Fig. 2 is a flowchart from the acquisition of inspection information (process to be inspected) in prototype 1 to the application of the inspection information to mass production 2.
  • a semiconductor device is manufactured using various manufacturing apparatuses 15 (step 101).
  • the quality inspection device 3 acquires quality information from the wafer being manufactured and transmits it to the check item generation station 9 (step 102).
  • the defect // "on the wafer and / or the number of foreign substances are acquired by using the foreign substance / visual inspection apparatus 4.
  • the inspection results of the foreign matter / visual inspection device 4 are: product type, process name, lot number, wafer number, defect coordinates (x, y), defect type, defect size, observation image, It includes items such as defect occurrence sites.
  • FIG. 3 shows information on the wafer number 1 stored in the lot number L001 of the semiconductor device HM001, and after the processing in the process P1, the defect coordinates (100, 002) are shown. (0 0) indicates that a defect of defect type A and defect size 10 was detected.
  • the type and size of the defect are not necessarily required, and it is sufficient that the presence or absence of a defect can be determined.
  • the defect coordinates are, as shown in FIG.
  • the probe inspection device 5 acquires the electrical characteristics of each chip from the wafer and sends it to the check item generation station 9 (step 103). As shown in FIG. 5, the inspection result of the probe inspection device 5 includes the product name, the slot number, the wafer number, the chip coordinates (m, n), and information on the quality of the corresponding chip.
  • the chip coordinate means the chip position on the wafer.
  • FIG. 5 shows information on the wafer number 1 stored in the lot number L001 of the semiconductor device HM001, and the pass / fail status of each chip after the process P1 is indicated by “1” and “0”. ". For example, for the chip at the chip position (1,3), "1" is displayed, indicating that the chip is defective.
  • the check item generation station 11 uses the inspection result of the foreign matter / visual inspection apparatus 4, information on the chip layout of the wafer stored in advance, and equations (1) and (2) to determine on which chip the defect is located. It is determined whether there is (Step 104).
  • the information on the chip layout of the wafer may include information on the chip horizontal width XW, the chip vertical width YL, the number of horizontal chips, and the number of vertical chips as shown in the product type information table 30 shown in FIG. It should be noted that the present invention is not limited to the equations (1) and (2), but it is only necessary to be able to determine which chip has a defect detected by the foreign matter / appearance detection device 4.
  • the calculated chip coordinates (m ′, n ′) must correspond to the coordinates of the probe inspection device 5.
  • [X] indicates the largest integer not exceeding X.
  • Step 105 the chip coordinates (m ', n') with the defect determined in step 1 ), And the probability PF that a chip having a defect becomes a defective product is calculated by using the determination result of good / bad for each chip (m, n), which is the detection result of the probe inspection device 5, and Equation (3).
  • Step 105 The calculation of the probability PF that a chip having a defect becomes a defective product is performed on wafers inspected in the same process in the same product type.
  • a chip failure rate Daraf 40 per process as shown in FIG. 7 can be created.
  • the horizontal axis 41 indicates the process
  • the vertical axis 42 indicates the probability PF of a defective chip becoming a defective product.
  • the value of PF in process P4 is close to 1.0. This indicates that if a defect occurs, the probability of becoming a defective chip is high. Note that, without preparing the chip failure rate graph 40 for each process shown in FIG. 7, the failure occurrence table 50 shown in FIG. Should be recorded as PF
  • the yield Y is defined by equation (4), and a correlation diagram 70 between the established PF on the same wafer and the yield Y as shown in FIG. 9 is created, and from these plots The linear regression equation 73 is obtained (step 106).
  • the inspection information required at the mass production site 2 in the prototype 1 (PF value of each process shown in Fig. 8, established PF shown in Fig. 10 and yield) (Correlation information with Y).
  • the guidance station 12 determines the inspection process and the inspection conditions based on the already acquired established PF, the established PF and the correlation between the yield Y (step 107).
  • the desired yield is set using FIG. 10, and the corresponding established PF is calculated from the linear regression equation 73, and the established PF is calculated.
  • the manufacturing equipment in the above processes will be managed mainly. Specifically, the inspection frequency of the inspection device or the inspection area is increased for a process having an established PF equal to or higher than a predetermined value.
  • defects can be prevented. Since it is possible to manage a manufacturing apparatus that performs the process, the number of defective chips due to defects can be reduced and the yield can be improved.
  • Fig. 11 shows another example of extracting the process to be inspected from the inspection information collected in prototype 1.
  • a semiconductor device is manufactured using various manufacturing apparatuses 15 (step 201).
  • the process and the type of the problem are registered in the check item generation station 9 and the number of occurrences is recorded (step 202).
  • the type of problem refers to a problem due to a device structure or a problem due to a manufacturing apparatus.
  • Fig. 12 shows an example of stored data. (1) This means that the chip width XW and chip height YW are used in the following equations (1) and (2).
  • the chip arrangement is such that the chips are processed for each row. The numbers are different.
  • problems caused by the device structure include, for example, a large difference in level of the underlying layer, which makes it difficult to focus at the time of exposure depending on the location, and that a desired pattern cannot be processed. In such a case, it is necessary to closely observe the deviation from the desired shape and take measures. Therefore, observation using SEM is preferable.
  • the problem caused by the manufacturing apparatus is, for example, that foreign matter is generated from the apparatus and the foreign matter adheres to the wafer and cannot be processed into a desired shape. Unlike problems caused by the device structure, it is not known when a device failure will occur, so it is necessary to increase the inspection frequency and quickly detect that a device failure has occurred.
  • a setting is made so as to focus on the processes in which the number of times of occurrence of the problem is equal to or more than a predetermined number (step 203).
  • step 204 For example, if there are many problems due to the device structure, manage them with a SEM visual inspection device with good inspection sensitivity, and if there are many problems due to the manufacturing equipment, manage them by increasing the inspection frequency (step 204). .
  • the inspection can be effectively performed in a part of the wafer, so that throughput is reduced.
  • the yield can be improved without lowering the yield.
  • steps 301 to 303 are the same as those in FIG.
  • step 304 the check item generation step 9 is based on the inspection result of the foreign matter / visual inspection device 4 and the inspection result of the probe inspection device 5, as shown in FIG. Then, a correlation diagram 60 between the number N of foreign matters and the yield Y is created, and a linear regression equation 73 is obtained from these plots. Note that the yield Y is calculated using the above equation (4).
  • the prototype 1 generates the information (correlation information between the number N of foreign particles and the yield Y shown in Fig. 14) required at the mass production site 2.
  • the inspection conditions are determined based on the correlation between the number N of foreign particles already obtained and the yield Y (Step 305).
  • the desired yield is set using FIG. 14 and the number N of corresponding foreign substances is calculated from the linear regression equation 63.
  • the manufacturing apparatus is managed so as not to generate the above foreign matter. In this case, it is desirable to add the sensitivity of the inspection device used in prototype 1 as information and to perform inspection with the same sensitivity as prototype 1.
  • Fig. 15 is a flowchart from the acquisition of inspection information (inspection area) in prototype 1 to the application of the inspection information to mass production base 2. Steps 401 to 402 are the same as those shown in FIG. 2, and a description thereof will be omitted.
  • the defect position 101 is spotted on the area indicating the wafer from the inspection result during the manufacture of the prototype 1 (detection result of the foreign matter / visual inspection device 4) ( Step 4 0 3).
  • J inspection results for a plurality of wafers performed in the same process may be superimposed.
  • an area in which the position of a defect is spotted on a region indicating a wafer is referred to as a defect map 100.
  • a virtual mesh 102 is drawn on the defect map, and a number (p, q) is assigned to each mesh. Which mesh each defect belongs to is determined in the same manner as in equations (1) and (2) (step 404). Where L is the mesh pitch.
  • a defect map table 110 records a product name, a process name, a defect type, and a defect-prone area.
  • Inspection information is acquired in prototype 1 as described above.
  • an inspection area is set based on the above-described inspection information (step 406). That is, equation (7) , A constant threshold D is set, and an area that satisfies the relationship of equation (7) is checked.
  • a defect map may be created for each defect type.
  • L is arbitrary, but is preferably about 1Z10, which is the chip width XW.
  • D is preferably 2 to 3 times the average defect density per sheet.
  • Equation (7) Since the area (P, q) that satisfies Equation (7) has a high defect generation density, it is necessary to suppress the generation of defects in that area. If this is the case, the occurrence of defects on the entire wafer can be suppressed, and the yield can be improved. In particular, when the prototype 1 and the mass production base 1 are on the same production line, defects caused by the production equipment can be suppressed, and the yield can be greatly improved.
  • the area to be inspected described so far is provided to an inspection apparatus 140 as shown in FIG.
  • the inspection device 140 includes a data interface 144, a control unit 142, an inspection stage 144, a detection unit 144, a man-machine interface 144, and a display unit 146.
  • the control unit 142 calculates the stage control amount and controls the inspection stage 143.
  • the inspection device 140 automatically inspects the area (P, q) to be inspected.
  • the inspection apparatus 140 inspects a predetermined number of points on the wafer in addition to the area (p, q) to be inspected. As a result, the wafer can be inspected uniformly, and a partial area on the wafer can be inspected with emphasis.
  • the display area 1 46 displays the inspection area 1 5 1 and the defect detection position 1 5 2 in the guidance screen 1 50, and detects it during the prototype 1 in the relevant inspection area. It is preferable to display the image 153 of the detected defect and the image 154 of the defect detected in the mass production 2 together. As a result, the defect image detected during prototype production is compared with the defect image detected during mass production, and it is generated in mass production. It can be determined whether the defect was experienced during prototyping.
  • the inspection device 140 has high inspection efficiency because the area to be inspected is previously determined for each product type, process, and defect type.
  • FIG. 20 shows an example in which the process to be inspected at the mass production site 2 is determined based on the inspection result during the production of the prototype 1 during the production.
  • a virtual defect is generated by a cross-sectional shape simulator, and after the defect occurs, a normal manufacturing process is performed to determine whether the device shape is normal.
  • Defects to be generated are handled at various defect sizes and defect locations.
  • Sectional shape simulators that generate virtual defects (foreign matter) are already commercially available and are easy to implement. For example, there is PRA D I S E W O R L D of NTT FANET SYSTEMS CO., LTD.
  • the method of assigning the parameter of the defect size is 1 to 2, the same, 3 to 2, and 2 times the minimum processing line width of each layer.
  • the attachment position is randomly generated in the simulated area. Let S F be the number of occurrences here.
  • a simulated normal shape is prepared in advance without generating a defect, and the connection relation of each part is recorded (step 502). This can be recorded by assigning a serial number to each part and linking the two parts as a set.
  • connection relation of each part is recorded (step 503).
  • the connection with the defect is omitted.
  • Step 5 0 4 comparing the connection relationship at the time of the defect occurrence with the connection relationship of the normal shape, if the connection at the time of the defect occurrence is different from the connection at the normal shape, it is determined that an abnormality has occurred in the shape ( Step 5 0 4).
  • An example of a simulation See Figure 21.
  • a defect 122 is generated on the normal site 1 2 1, and as a result, the site 123 is split into the site 123 and the site 124, and a new site 122 and a new site are generated.
  • Figure 22 shows the connection in this case. In FIG.
  • connection relation at normal time is (121, 123), and the connection relation at the time of defect attachment is (122, 123) and (122, 124).
  • connection relationship shown in FIG. 22 is compared to determine that a shape abnormality has occurred.
  • the abnormality occurrence rate AP is calculated using the equation (8). That is, the abnormality occurrence rate AP is simulated for each layer and each defect size (step 505).
  • a P AF / SF ... Equation (8)
  • the check item generation station 9 records the result as a simulation result table 130 as shown in FIG.
  • the vertical 13 1 is the layer
  • the horizontal 13 2 is the defect size
  • the corresponding AP is recorded in each cell 1 33.
  • Inspection information is acquired in prototype 1 as described above.
  • inspection conditions are set based on the above-described inspection information (step 506).
  • the desired yield Y 0 is set, and there are n layers listed on the vertical axis in FIG. 23, the process having 1-AP less than the n-th root of Y 0 will be emphasized.
  • inspect Specifically, it is managed by an inspection device that can detect the defect size for the relevant process. This means that if the n-th layer AP is written as AP (n), Y 0 is
  • a simulation was performed assuming a failure caused by the device, and a simulation result was obtained in which a foreign substance of, for example, 1 ⁇ size caused a problem in product performance in the contact hole forming process. If so, the result is registered in the pre-check item data base 10.
  • the contents to be registered are the assumed failure (whether due to the device or the device structure), the process name, the size of the foreign material in question, the shape obtained by simulation and the image ID indicating the shape, and Phenomenon, area to be inspected.
  • This data is copied to the pre-check database 11 to generate a pre-check list.
  • the pre-check list specifies the type of inspection based on the assumed failure. Here, a defect due to the device is assumed, so a foreign substance inspection is performed. The phenomenon is a non-opening of the contact hole, and the management size is, for example, 1 ⁇ . It also manages image IDs so that simulation shapes can be searched. If no information is available on the area to be inspected, the entire wafer should be inspected.
  • This pre-checklist at Guidance Station 1 2 1 Based on 3 above, the contents such as inspection type (foreign matter inspection), management standard (foreign matter size 1 ⁇ ⁇ or more), inspection process (for contact hole formation process), and inspection location (for the entire wafer) are specified.
  • the detected means, phenomena, size, image ID, location where they occurred, etc. are registered in the pre-check item database 10. Based on this information, a preliminary checklist 13 is generated. In this case, since the short circuit between wirings was found at the chip position (12, 13) (13, 14) by SEM, the guidance station instructs to inspect the corresponding process and the corresponding location by SEM. .
  • FIG. 25 shows the flow of this processing. Whether this is a simulation or an actual case, if registered as a pre-check item, the subsequent processing is the same.
  • the check item generation station 9 performs the analysis based on the inspection result.However, the check item generation station 9 simply collects the inspection results, and the guidance station 12 performs all the analysis. There is no problem to do. Industrial applicability
  • the inspection standards at the time of mass production can be effectively set, so that stable production at the mass production base can be realized early and the semiconductor It can be used in equipment manufacturing lines to improve yield.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un dispositif semi-conducteur visant à accroître rapidement le rendement d'une chaîne de fabrication grâce à une définition préalable de critères de gestion concernant les résultats de l'inspection, les processus d'inspection, les zones d'inspection, etc. Les conséquences des défauts survenant au cours de la production d'essai sur une chaîne de fabrication sont analysées pour chaque zone où ces défauts sont survenus, ainsi que pour chaque processus de production. La taille d'un défaut majeur, les zones où des défauts sont survenus, la visualisation de ces défauts, ainsi que les moyens d'inspection, sont déterminés tour à tour en fonction des articles destinés à être pré-inspectés pour chaque processus de production. Sur une chaîne de fabrication en série, des dispositifs semi-conducteurs sont inspectés par rapport aux articles pré-inspectés, afin d'augmenter le rendement de ladite chaîne de fabrication.
PCT/JP1998/000346 1997-01-29 1998-01-28 Procede de fabrication d'un dispositif semi-conducteur Ceased WO1998033213A1 (fr)

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JP9/15002 1997-01-29
JP1500297A JPH10214870A (ja) 1997-01-29 1997-01-29 半導体装置の製造方法

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JP2005191366A (ja) * 2003-12-26 2005-07-14 Semiconductor Leading Edge Technologies Inc 半導体製造システム
JP5140905B2 (ja) * 2005-02-01 2013-02-13 富士通セミコンダクター株式会社 半導体装置の試験システム及び試験方法
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Cited By (1)

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Publication number Priority date Publication date Assignee Title
US6992499B2 (en) 2003-06-04 2006-01-31 Kabushiki Kaisha Toshiba Test method and test apparatus for semiconductor device

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