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WO1997009733A1 - Dispositif a emission de champ hf et procede de fabrication - Google Patents

Dispositif a emission de champ hf et procede de fabrication Download PDF

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Publication number
WO1997009733A1
WO1997009733A1 PCT/US1996/013398 US9613398W WO9709733A1 WO 1997009733 A1 WO1997009733 A1 WO 1997009733A1 US 9613398 W US9613398 W US 9613398W WO 9709733 A1 WO9709733 A1 WO 9709733A1
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Prior art keywords
anode
layer
substrate
control electrode
cathode
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PCT/US1996/013398
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English (en)
Inventor
Michael D. Potter
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Advanced Vision Technologies Inc
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Advanced Vision Technologies Inc
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Priority claimed from US08/524,225 external-priority patent/US5666019A/en
Priority claimed from US08/524,171 external-priority patent/US5628663A/en
Application filed by Advanced Vision Technologies Inc filed Critical Advanced Vision Technologies Inc
Priority to AU68504/96A priority Critical patent/AU6850496A/en
Publication of WO1997009733A1 publication Critical patent/WO1997009733A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J3/00—Details of electron-optical or ion-optical arrangements or of ion traps common to two or more basic types of discharge tubes or lamps
    • H01J3/02—Electron guns
    • H01J3/021—Electron guns using a field emission, photo emission, or secondary emission electron source
    • H01J3/022—Electron guns using a field emission, photo emission, or secondary emission electron source with microengineered cathode, e.g. Spindt-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J9/00—Apparatus or processes specially adapted for the manufacture, installation, removal, maintenance of electric discharge tubes, discharge lamps, or parts thereof; Recovery of material from discharge tubes or lamps
    • H01J9/02—Manufacture of electrodes or electrode systems
    • H01J9/022—Manufacture of electrodes or electrode systems of cold cathodes
    • H01J9/025—Manufacture of electrodes or electrode systems of cold cathodes of field emission cathodes

Definitions

  • This invention relates generally to microelectronic devices and more particularly to high frequency microelectronic devices ofthe type using a cold-cathode field-emission electron source.
  • emitter and cathode are used interchangeably throughout this specification to mean a field-emission cathode.
  • the term “lateral emitter” refers to an emitter extending substantially parallel to a device's substrate.
  • the term “lateral dimension” refers to a dimension measured along an axis substantially parallel to the device's substrate.
  • the term “vertical dimension” refers to a dimension measured along an axis substantially perpendicular to a device's substrate.
  • control electrode is used herein to denote an electrode that is analogous in function to the control grid in a vacuum-tube triode, i.e. in controlling current flowing in the device. Such electrodes have also been called “gates" in the field-emission device related art literature. As is known in the art, such a control electrode, suitably biased, may be used as an extraction electrode by affecting the electric field at a field-emitter's emitting tip or edge.
  • Microelectronic devices using a cold-cathode field-emission electron source are useful in many applications previously employing vacuum tubes or semiconductor devices, especially microelectronic semiconductor devices.
  • Field-emission microelectronic devices are especially useful in applications that require high frequency operation or fast switching speeds and have further advantages of small size, low power consumption, reduced complexity, and low manufacturing cost.
  • the many diverse uses for high-frequency field-emission microelectronic devices include high-speed computer logic and memory circuits, and may also include high ⁇ speed flat panel displays for displaying images and for displaying character or graphic information. New applications of terahertz frequency signal generators and amplifiers, which can use high-frequency field-emission microelectronic devices, are being vigorously developed.
  • Gray et al U S Pat No 4,578,614 disclosed an ultra-fast field-emitter switching device wherein a positive pulse is applied to a gate, and a collector is held at a potential higher than the gate Because ofthe field emitter geometry, the electron transport is extremely fast The ultra-fast switching speed is attained because the electrons reach near-maximum velocity within a few field tip diameters ofthe source
  • Brodie U S Pat No 4,721,885
  • diode and triode arrays of high speed integrated microelectronic tubes including a plate-like substrate upon which an array of field- emitter cathodes is located and including an anode electrode spaced from each cathode
  • the tubes are operated at voltages such that the mean free path of electrons (traveling in a gas between the cathode and anode electrodes) is equal to or greater than the spacing between the tip ofthe cathode electrode and the associated anode electrode
  • Lambe U S Pat No 4,728,851 disclosed a field emitter device utilizing a gate electrode adjacent to a carbon fiber electron emitter cathode for controlling the initial flow of electrons between the cathode and the collector element Subsequent disconnect ofthe gate electrode from its power source does not affect the electron flow and thereby provides a bistable memory type device
  • Lee et al U S Pat No 4,827,177 disclosed field emission vacuum devices in which first, second, and third electrode structures are formed on a silicon dioxide layer by depositing a metallic layer and etching away unwanted portions ofthe layer, the second electrode structure acting as a control electrode
  • Simms et al U S Pat No 4,990,766 disclosed a microscopic voltage controlled field emission electron amplifier device consisting of a dense array of field- emission cathodes with individual cathode impedances employed to modulate and control the field emission currents ofthe device These impedances are selected to be sensitive to an external stimulus such as light, x-rays, infrared radiation or particle bombardment
  • Gray et al U S Pat Nos 4,901,028 and 4,987,377) disclosed field-emitter array integrated distributed amplifiers in which dielectric material and electrically conductive material combine to form cathodes, grids, and anodes in a module forming one or more amplifier cells embedded in a matrix of reactive impedances that form companion stripline-like transmission lines
  • Gray U S Pat No 5,030,895 disclosed a field-emitter array comparator in which voltage or current input signals supplied to at least two deflectors control the selective deflection of a beam of electrons to one collector of a collector array of at least two collectors
  • Greene et al U S Pat No 5,057,047) disclosed a low capacitance field-emitter array and fabricating method which uses a substrate as both an emitter tip mold and an insulating layer Once the emitter is formed, the remaining fabrication steps are self-aligning
  • the field emitter array thus formed exhibits high input impedance at high frequency, making the field emitter array suitable for high frequency uses
  • Jones et al U S Pat No 5,144,191
  • a microelectronic field emitter including a horizontal emitter electrode and a vertical extraction electrode on the horizontal face of a substrate An end ofthe horizontal emitter electrode and the end ofthe vertical extraction electrode form an electron emission gap between them
  • the structure of Jones et al tends to reduce emitter-to-extraction-electrode capacitance somewhat in comparison with earlier field emitter designs
  • Gray U S Pat Nos 5,214,347 and 5,266, 155) disclosed a field-emitter array device which includes a substrate supporting thin-film layers of conductive material and intervening thin-film layers of insulative material The lateral edges ofthe thin-film layers form a field emitter array including a field emitter edge electrode interposed between a pair of control electrodes
  • a process for making the emitter device includes forming a plurality of first and second layers of insulating material alternately disposed between first, second, and third layers of conductive material, forming a channel through the thickness ofthe layers and oriented pe ⁇ endicular thereto, exposing the lateral edges ofthe layers of conductive and insulating materials adjacent to the channel to form a field emitter edge electrode inte ⁇ osed between a pair of control electrodes
  • Gray's process includes angled deposition of anode material, which unfortunately can require all devices on a given substrate to have the same orientation
  • Gray et al U S Pat No 5,382,185 disclose thin-film edge field-emit
  • Pat. No. 5,281,890 disclosed a field emission device having an anode centrally disposed with respect to an annular edge emitter.
  • Cronin et al. (including the present inventor) (U.S. Pat. Nos. 5,233,263 and 5,308,439) disclosed lateral cathode field-emission devices and methods of fabrication, producing cathode tips on the order of several hundred Angstroms as well as exact spacing of cathode to gate and cathode to anode.
  • Smith et al U.S.
  • Pat. No. 5,313, 140 disclosed a field emission device employing an integrally formed capacitance and a switch serially connected between a conductive element and a current source to provide substantially continuous emitted electron current during selected charging periods and non-charging periods.
  • Kane U.S. Pat. No. 5,320,570
  • the width of the cavity separating extraction electrode and collector electrode is determined by a trench etching process, which thus also determines the precision with which the extraction-to- collector-electrode capacitance can be controlled.
  • Some device structures have had an extraction electrode covering all but a small emitter portion of a vertical sidewall and have had a collector electrode or anode covering a second vertical sidewall opposite the extraction electrode. In such devices, unfortunately, the extraction-electrode-to-collector-electrode capacitance is relatively high and furthermore tends to increase with reduced microelectronic device dimensions.
  • An important object ofthe invention is a microelectronic device with improved high- frequency performance. More particularly, an object ofthe invention is a field-emission microelectronic device operable at higher frequencies than heretofore.
  • An object related to logic devices is a microelectronic device capable of switching between on and off states in extremely short time intervals.
  • Another particular object ofthe invention is a field-emission device that has reduced inter-electrode capacitances.
  • a related object is a microelectronic device whose upper frequency limit is extended by virtue of having reduced inter-electrode capacitances.
  • an object ofthe invention is a field-emission microelectronic device whose inter-electrode capacitances between its control electrode and its emitter and anode are each reduced to an extremely small value.
  • a related object ofthe invention is a field- emission microelectronic triode device whose control electrode has dimensions that are only a minor fractional part ofthe device's emitter-to-anode gap, or ofthe path length of an electron moving from an emitter to an anode.
  • another such object ofthe invention is a field- emission microelectronic triode device whose control electrode has dimensions that are only a minor fractional part ofthe anode's height.
  • Yet another object ofthe invention is a control electrode of such small dimensions relative to the anode size and to the emitter-to-anode gap width, that high-frequency field-emission microelectronic devices may be made smaller than heretofore, without undue increase in inter-electrode capacitances.
  • Some overall objects ofthe invention include device structures and fabrication processes to provide extremely fine cathode edges or tips and precise control ofthe inter-element dimensions, alignments, inter-electrode capacitances, and required bias voltages.
  • Another object ofthe invention is a high-frequency microelectronic device that may be integrated with other microelectronic devices, using interconnection wiring dimensions commonly used for VLSI devices.
  • Other objects include improved high-frequency microelectronic devices having multiple control electrodes, such as tetrodes and pentodes which also benefit from reduced inter-electrode capacitance.
  • Another object ofthe invention is a high-frequency microelectronic device that can be fabricated from substantially transparent materials.
  • a related object is a high- frequency microelectronic device for use in displays that may be used in applications that require transparency, such as so-called "augmented reality" displays which may be used in a light-transmissive mode.
  • Other objects ofthe invention include high-frequency microelectronic devices which can be fabricated to operate either in a vacuum or in a gas atmosphere in which the mean free path of electrons exceeds the spacing between their cathodes and their corresponding anodes.
  • Yet another object ofthe invention is a fabrication process specially adapted to fabricate an improved high-frequency microelectronic device economically and efficiently.
  • a particular object in this regard is a fabrication process that can use methods and equipment commonly used for semiconductor manufacturing.
  • An important object of the invention is a fabrication process specially adapted to automatically provide sufficiently precise and reproducible dimensions and relative alignment ofthe various electrodes ofthe high-frequency field-emission microelectronic device so that its improved high-frequency performance may be consistently realized.
  • An improved high-frequency field-emission microelectronic device has a substrate and an ultra-thin emitter electrode extending parallel to the substrate and having an electron- emitting lateral edge facing an anode across an emitter-to-anode gap.
  • a control electrode having a lateral dimension only a minor fraction ofthe emitter-to-anode gap width, is disposed parallel to the emitter and spaced apart from the emitter by an insulator of predetermined thickness.
  • a vertical dimension ofthe control electrode is only a minor fraction ofthe height of the anode.
  • the control electrode may substantially surround a portion ofthe anode, spaced from the anode in concentric relationship.
  • the inter-electrode capacitance between the emitter and the control electrode has only an extremely small value, consisting substantially of only a very small area term and a very small fringing-field term, thus allowing operation ofthe microelectronic device at higher frequencies or switching speeds than heretofore.
  • the inter- electrode capacitance between the control electrode and the anode also has only an extremely small value, thus improving higher frequency performance further.
  • devices having a plurality of control electrodes such as tetrodes and pentodes, may also be made with improved inter-electrode capacitance. Because ofthe microelectronic device's small size and high electric field when operating, electron transit times are very short, and inter-electrode capacitances dominate the upper limits of operating frequency.
  • a fabrication process is specially adapted for manufacturing the device with suitably small and precise dimensions and suitably precise inter-electrode alignment.
  • the specially adapted process uses two sacrificial materials, one of which forms a temporary mandrel, and uses a conformal conductive layer to form each control electrode while automatically achieving the required alignment precision.
  • FIG. 1 shows in a first sectional elevation view, a high-frequency field-emission microelectronic device made in accordance with the invention.
  • Fig. 2 shows a second sectional elevation view ofthe device of Fig. 1.
  • Fig. 3 shows a plan view of a high-frequency field-emission microelectronic device made in accordance with the invention.
  • Fig. 4 shows a plan view of a first alteraative layout of a high-frequency field-emission microelectronic device.
  • Fig. 5 shows a plan view of a second alteraative layout of a high-frequency field- emission microelectronic device.
  • Figs. 6a and 6b together show a flow-chart of a process for fabricating a high-frequency field-emission microelectronic device, performed in accordance with the invention.
  • Figs. 7a and 7b together show a series of device sectional elevation views at various stages ofthe fabrication process illustrated in Figs. 6a and 6b.
  • the high-frequency field-emission device is a triode having a cathode, anode, and control electrode
  • a triode device may be operated as a diode if desired
  • Fig 1 shows a triode device, generally denoted 10, made in accordance with the invention, in a first sectional elevation view
  • Fig 2 shows such a triode device 10
  • Fig 3 shows a plan view of such a triode device 10
  • the cross- section of Fig 2 may be orthogonal to the cross-section of Fig 1 (as it would be for the device layout shown in the plan view of Fig 3)
  • the microelectronic triode device 10 is made on a planar starting substrate 20 It has a planar field-emission cathode 30 that is substantially parallel to substrate 20, emitting electrons toward an anode 40 The length of trajectory traversed by electrons flowing from cathode 30 to anode 40 may be considered as a characteristic dimension of device 10
  • a contact 50 provides for applying an electrical bias voltage to cathode 30
  • An insulating layer 60 may provide for electrical isolation of various electrodes and their contacts from each other Insulating layer 60 may optionally comprise a composite film including a major portion of a primary insulator and a thin etch stop layer 65 of a second material at its top surface, as explained in detail hereinbelow in the description ofthe preferred fabrication process
  • Optional etch stop layer 65 is shown in sectional views Figs 1 and 2 only
  • the device has a control electrode 70, lying in a plane spaced from and parallel to cathode 30 The dimensions and alignment of control electrode 70 are selected and controlled, as described further hereinbe
  • control electrode 70 As viewed in the sectional elevation views of Figs 1 and 2 are controlled to only a small minor fractional part ofthe width of gap 120 and to only a small minor fractional part ofthe height of anode 40
  • the characteristic length of electron trajectories is about equal to the width of gap 120.
  • the control signal applied to control electrode 70 modulates the current flowing from cathode 30 to anode 40.
  • the control signal may be made positive with respect to cathode 30, to control emission from the emitting tip of edge 110.
  • a planar silicon wafer is a suitable starting or base substrate, but the base substrate may be a flat insulator material such as glass, AI2O3 (especially in the form of sapphire), silicon nitride, etc..
  • starting substrate 20 is not an insulator, a film of insulating material such as silicon oxide may be deposited or grown to form an insulating substrate.
  • a conductive substrate may be used as a common anode in some embodiments. If the starting substrate 20 is conductive and in electrical contact with the anode, then at least one insulating film may be used to insulate the cathode and the control electrode from the anode.
  • Cathode 30 is a lateral field emission cathode, an ultra- thin metal layer described in more detail below.
  • Anode 40 comprises a layer of conductive material on the top surface of buried anode contact layer 80. Buried anode contact layer 80 makes ohmic electrical contact with anode 40 and is preferably made substantially parallel to substrate 20, with either its upper surface, or its lower surface, or a plane between the two being substantially coplanar with the upper surface of substrate 20. In the preferred embodiments of Figs. 1 and 2, buried anode contact layer 80 is recessed into insulating substrate
  • buried anode contact layer 80 a recess is formed in the insulating substrate 20 and the recess is filled with metallization to form buried anode contact 80.
  • Buried anode contact layer 80 may extend under part of anode 40, as shown in Figs. 1 and 2, or under the entire lower side of anode 40 for some pu ⁇ oses.
  • An insulating layer 60 selectively placed between the plane of buried anode contact layer 80 and the plane of control electrode 70 insulates buried anode contact layer 80 from control electrode 70.
  • the predetermined gap distance between emitter edge or tip 110 and anode 40 is determined by the width of space 120.
  • the space 120 between cathode 30 and anode 40 and the space above anode 40 can comprise a vacuum or can contain a gas, preferably an inert gas at low pressure.
  • a process for encapsulating space 120 to retain a gas or to achieve and maintain an evacuated condition is described hereinbelow.
  • Cathode 30 is preferably formed by depositing an ultra-thin film of a conductor with low work function for electron emission, preferably 10 - 20 nanometers in thickness.
  • Preferred cathode materials are titanium, tungsten, titanium-tungsten alloy, tantalum, molybdenum, or conductive carbon, but many other conductors may be used, such as aluminum, gold, silver, copper, copper-doped aluminum, platinum, palladium, or polycrystalline silicon.
  • anode 40 may be made of any conductive material such as a metal
  • anode 40 may be a conductive cathodoluminescent phosphor, or another conductive film coated with a cathodoluminescent phosphor.
  • the height of anode 40 is not critical
  • the top surface of anode 40 is preferably as high or higher than the plane of emitter 30, but the height of anode 40 above buried anode contact 80 could be zero Expressed another way, buried anode contact 80 may serve as anode
  • Insulating layer 60 should have an electric permittivity as low as possible for high frequency performance
  • the electric permittivity should preferably be less than 12, and even more preferably less than 4 Suitable insulating materials, for example, are aluminum oxide
  • Figs 1 and 2 show a preferred embodiment in which a single insulating layer 60 serves to support control electrode 70, to insulate it from cathode 30, and to insulate it from buried anode contact 80.
  • each layer performing one or more of these functions
  • These separate insulating layers may have different thicknesses or, in some such structures, the thicknesses of various insulating layers may be controlled to be equal
  • the electric permittivity of each ofthe various insulating layers should be as described above for insulating layer 60
  • emitter 30 and anode contact 80 share a common plane, viz the bottom surface of emitter 30 and the top surface of anode contact 80 and thus in this sense are substantially coplanar
  • control electrode 70 includes an annular portion, which substantially surrounds a portion of anode 40 in a concentric arrangement
  • a concentric layout allows some flexibility of design with control-electrode contacts 90 in various positions
  • these layouts and others allow an advantageous arrangement in which the electron-emitting lateral edge 110 of cathode 30 faces one side of anode 40 and the conductive contact 90 of control electrode 70 is juxtaposed with and spaced apart from another side of anode 40, facing another direction
  • Such an arrangement facilitates the integration of a number of microelectronic devices in integrated circuits, both by conserving substrate area used and by reducing coupling capacitances between interconnections Figs.
  • FIGS. 4 and 5 show plan views of alternative layouts of a high-frequency field-emission microelectronic device.
  • the length of control electrode 70 is made short to reduce inter-electrode capacitances further. Such layouts, some with control electrode 70 made even shorter, are preferred for the highest frequency applications.
  • both cathode 30 and an annular portion of control electrode 70 substantially surround a portion of anode 40.
  • a microelectronic device with a substantially concentric layout as in Fig. 5, or any layout having a long active perimeter length has a relatively high gain and a relatively high cathode current capability.
  • the emitting-edge length is approximately equal to the active perimeter length.
  • Fig. 5 In a device having a linear geometry rather than being concentric, the perimeter length would be measured pe ⁇ endicularly to the plane of Fig. 1.
  • Other advantages of such layouts as Fig. 5 include ease of integration of many devices on a substrate. Another advantage is improved signal strength in ultra high frequency device applications such as signal generators, amplifiers, and transmitters and/or receivers for electromagnetic radiation.
  • Figs. 1, 2, 3, 4 and 5 An important feature ofthe microelectronic field emission device 10 is shown clearly in Figs. 1, 2, 3, 4 and 5: viz. that the gap 120 between anode 40 and both cathode 30 and control electrode 70 may be made to have one or more common edges with cathode 30 (at its emitting lateral edge 110) and with control electrode 70, so that the latter elements are automatically aligned by the formation of space 120. This is commonly termed a self-aligned structure.
  • alignment of control electrode 70 both with respect to anode 40 and with respect to emitting lateral edge 110 of cathode 30 may be controlled very precisely.
  • Emitter 30 may be made about 10 nanometers thick.
  • Control electrode 70 may be made about 30 nanometers high (measured perpendicularly to substrate 20) and about 20 nanometers wide (measured parallel to substrate 20). Both the emitting edge 110 of emitter 30 and the corresponding side of control electrode 70 may be spaced about 200 nanometers from anode 40. That is, gap 120 may be 200 nanometers wide.
  • Anode 40 may be about 100 nanometers high, measured from substrate 20 or buried anode contact 80.
  • Insulating layer 60 may have a thickness of about 50 nanometers and an electric permittivity of about 3.9. Given these typical dimensions and permittivity, the emitter-to-control-electrode capacitance amounts to only about 14 x 10 " ⁇ farads per micrometer of emitter edge, plus a small capacitance due to the fringing field. With the same assumptions, the anode -to-control- electrode capacitance is only about 26 x 10 " ⁇ farads per micrometer of control electrode length, plus a small capacitance due to the fringing field. These appear to be the lowest inter- electrode capacitances achieved in field-emission microelectronic devices to date. Fabrication Process
  • Figs. 6a and 6b together show schematically a flow diagram illustrating a preferred embodiment of a fabrication process performed in accordance with the invention, with step numbers indicated by references SI, etc..
  • Figs. 7a and 7b together show a sequence of sectional views of a display cell at various stages ofthe fabrication process depicted in Figs. 6a and 6b.
  • Each sectional view of Figs. 7a and 7b shows the result ofthe process step indicated next to the sectional view.
  • the identities and functions of individual elements in the sectional views of Fig. 7a and 7b will be apparent by comparison with Figs. 1 and 2.
  • the left side of each sectional view of Figs. 7a and 7b corresponds to Fig.
  • An overall method of fabricating the field-emission device generally comprises the following steps: providing an insulating substrate (step SI and if necessary step S2); patterning and depositing a conductive layer (steps S3 and S4) in or on the upper surface of the insulating substrate to form an anode contact layer; depositing and patterning a conductive layer (step S6) having a thickness of only several tens of nanometers extending parallel to the upper surface of the substrate to form an emitter layer; depositing or growing an insulating layer (step S7); patterning and depositing conductive contacts or studs where needed (step S8); depositing a first sacrificial material (step S9); providing an opening (step SIO) down to the anode contact layer and through the various other layers above it, including the emitter layer, thus forming an emitting edge ofthe emitter layer; placing a conformal layer of a second sacrificial material only on the walls ofthe opening provided in step SIO to a predetermined thickness to make a spacer
  • step Sll and S12 filling the opening at least partially with a conductive anode material (step S13) such that the conformal layer spaces the anode material from the emitting edge ofthe emitter layer, where the predetermined conformal layer thickness equals a desired spatial distance between the emitter edge ofthe emitter layer and the anode; planarizing (step S14); removing the first sacrificial material (step S15), thus exposing the outer walls ofthe second sacrificial material to form a temporary mandrel; depositing a conformal conductive material (step S16) in contact with those outer walls and directionally etching it to form a control electrode; removing the second sacrificial material (step S17), thus opening the emitter-to- anode gap; and (by way of preparation in steps S4, S8, S13 and finally in step S18) providing means for applying an electrical bias voltage to the emitter layer and to the anode layer, sufficient to cause cold cathode emission current of electrons from the emitter edge to
  • a base substrate is provided (step SI), which may be a silicon wafer.
  • the base substrate may be a conductive material, a semiconductive material, an insulating material, or a semi-insulating material.
  • An insulating layer is deposited (step S2) if necessary to make an insulating substrate 20. This may be done, for example, by growing a film of silicon oxide approximately one micrometer thick on a silicon substrate. Ifthe base substrate is already an insulator, step S2 may be omitted.
  • substrate 20 is a monolithic insulator or a base substrate covered with an insulating film, it may be made entirely of transparent materials if desired, for use in some display applications.
  • a pattern is defined on the insulator surface for depositing a conductive material.
  • a pattern of recesses is defined and etched (step S3) into the surface of the insulating substrate 20.
  • conductive material is deposited in the recesses to form a buried anode contact 80, which is then planarized (step S5).
  • the conductive material deposited in step S4 may be a metal such as aluminum, tungsten, titanium, etc., as shown in Fig.
  • the substrate 6a may be a transparent conductor such as tin oxide, indium tin oxide etc.
  • the substrate may be conductive and perform the function of a buried anode contact.
  • additional steps are required, using conventional methods to provide an insulator which insulates the emitter from the substrate and control electrode contact.
  • An ultra-thin layer of conductive material of suitably low work function is deposited (step S6) to form an emitter layer 30, and patterned.
  • Preferred emitter materials are titanium, tungsten, titanium-tungsten alloy, tantalum, or molybdenum, but many other conductors may be used, such as aluminum, gold, silver, copper, copper-doped aluminum, platinum, palladium, polycrystalline silicon, conductive carbon, etc. or transparent thin film conductors such as tin oxide or indium tin oxide (ITO).
  • the deposition of emitter layer 30 in step S6 is controlled to form a film preferably of about 10 - 20 nanometers thickness in order to have an emitter edge or tip in the final structure that has a radius of curvature preferably less than 5 nanometers and more preferably less than 10 nanometers.
  • the emitter layer 30 may be deposited in a recess pattern and planarized, as in the case ofthe buried anode contact layer 80.
  • An insulator 60 is deposited (step S7) over the emitter layer. This may be a chemical vapor deposition of silicon oxide to a thickness of about 50 to 2,000 nanometers, for example, or more preferably to a thickness of about 50 to 200 nanometers.
  • insulator layer 60 may be another insulator material such as aluminum oxide or silicon nitride. Silicon oxide is preferred for its relatively low permittivity.
  • insulator layer 60 also includes a thin layer 65 of another material deposited on its top surface as part of step S7 to provide an etch stop later in the process. For example, a very thin etch stop layer 65 of silicon nitride may be deposited at the top surface of a layer of silicon oxide to complete insulator layer
  • step S8 contact holes and conductive material are patterned and deposited (step S8) to form them.
  • each conductive contact is aligned with respect to its corresponding electrode.
  • this alignment is to the anticipated location ofthe control electrode, and the precise alignment occurs automatically later in the process, as it is a self-aligning process.
  • a first sacrificial material 150 is deposited and, if necessary, planarized (step S9) to a predetermined thickness.
  • the first sacrificial material 150 may, for example, be silicon oxide, deposited by chemical vapor deposition (CVD) to a thickness of 20 to 50 nanometers, for example.
  • first sacrificial material 150 An important characteristic used in selecting this first sacrificial material 150 is that it be relatively resistant to a procedure used later in step SI 2 to directionally etch a second sacrificial material.
  • suitable materials are silicon oxide, silicon nitride, aluminum oxide, and any one of a number of organic polymers.
  • a particular choice of sacrificial material may require provision of optional thin etch stop layer 65, to prevent etching of insulator layer 60 in step S15.
  • the preferred material for the first sacrificial material 150 is silicon oxide, used in conjunction with an etch-stop layer 65 of silicon nitride.
  • an opening is provided to the buried anode contact layer 80.
  • This opening is patterned to provide space for anode 40 and space 120, and the pattern is made to intersect at least some portions of emitter layer 30, to define emitting edge 110 of emitter layer 30.
  • This step may be performed by using conventional directional etching processes such as ion milling, reactive ion etching (sometimes called “trench etching” in the semiconductor fabrication literature), or reverse sputtering. Ion milling is the preferred method.
  • the etching in step S10 extends a short distance into the insulating substrate, thus relieving the emitting edge 110 of emitter layer 30.
  • the opening may then also extend slightly into insulating substrate 20, beyond an edge of buried anode contact layer 80 as well.
  • Advantages of this preferred mode include reduction of secondary emission and reduction of charge trapping at the insulator surface. This slight etching into the surface of insulator 20, the depth of which may be only a few tens of nanometers or less, is shown in Figs. 1 and 2, but not shown in Figs. 6a, 6b, 7a, and 7b.
  • a conformal second sacrificial material 160 is deposited in step Sll, and directionally etched in step S12, to remove the conformal layer 160 everywhere except on the sidewalls ofthe opening provided in step S10. This provides a spacer of precise predetermined thickness on the sidewalls of that opening.
  • Preferred spacer thickness is in the range of about 100 to 400 nanometers
  • the best spacer dimension depends on a number of variables, such as the emitter work function, the emitter edge radius of curvature, and the operating bias voltage range desired That spacer will define the predetermined width of gap 120 separating the field emitter edge 110 from anode 40 in the completed field emission device structure
  • the conformal second sacrificial material layer 160 could be any of several conformal materials such as parylene Some important characteristics used in selecting this second sacrificial material 160 are that it be conformal, and that it be directionally etchable by a process to which the first sacrificial material 150 is relatively resistant This method of defining the width of gap 120 allows much more precise and reproducible control ofthe gap width than methods that depend on lithographic tolerances
  • step S13 a conductive material is deposited into the opening onto buried anode contact layer 80 to form anode 40, and any excess conductive material not in the opening is removed in planarization step S14 (by polishing, for example) Chemical-mechanical polishing is a preferred mode for planarization
  • step S15 the first sacrificial material 150 is removed, thus exposing outer walls of second sacrificial material 160 Ifthe first sacrificial material 150 is silicon oxide, it may be removed by etching with hydrofluoric acid (HF) or buffered HF, for example, without appreciably affecting sidewalls ofthe second sacrificial material 160, such as parylene
  • Step S15 forms a temporary mandrel used in step S16 to form control electrode 70
  • step SI 6 a conformal conductive material is deposited and directionally etched to form control electrode 70
  • the conformal conductive material is deposited onto at least the sidewalls of second sacrificial material 160 that were exposed in step SI 5 (the aforementioned mandrel), onto adjacent portions ofthe top surface of insulating layer 60, and onto at least a portion of conductive contact 90.
  • control electrode 70 is controlled to deposit a thickness of conformal conductive material suitable to form the desired width of control electrode 70 (measured parallel to substrate 20) Formation of control electrode 70 with the desired final dimensions is completed in step S16 by directionally etching with a reactive ion etch, ion milling, or reverse sputtering, for example To minimize inter-electrode capacitances, the desired width is controlled to be only a small minor fractional part ofthe width of gap 120.
  • step S6 may be any conductor
  • it may be any conductive form of aluminum, carbon, copper, doped diamond, indium, indium oxide, indium-tin oxide, iron, gold, molybdenum, rhodium, silver, tungsten, tantalum, tin, tin oxide, titanium, titanium silicide, tungsten, palladium, platinum, polysilicon, zinc, or mixtures, solid solutions, or alloys of these materials
  • the deposition of step S6 may be done by any method known in the art for conformal depositions, specifically including evaporation, sputtering, or electroless plating, for example.
  • step S17 the conformal layer of second sacrificial material 160 is removed, by a conventional plasma etch step for example, leaving the previously mentioned predetermined gap in space 120 between emitter edge 110 and anode 40.
  • step SI 8 means are provided for applying suitable electrical bias voltages to anode and cathode, and for applying suitable signal voltages to the control electrode.
  • Such means may include, for example, contact pads selectively provided at the device top surface to make electrical contact with contacts 50, 90, and 100, and optionally may include wire bonds, means for tape automated bonding, flip-chip or C4 bonding, etc.
  • conventional power supplies and signal sources must be provided to supply the appropriate bias voltages and control signals.
  • a passivation layer may be applied to the device top surface, except where there are conductive contact studs and/or contact pads needed to make electrical contacts.
  • integrated circuits or arrays of high- frequency field-emission devices may be made by simultaneously performing each step of the fabrication process described herein at a multiplicity of device sites on the same substrate, while providing interconnections.
  • An integrated circuit or array of field-emission devices made in accordance with the present invention has each device made as described herein, and the devices are arranged as cells containing at least one emitter and at least one anode per cell. The cells are arranged along rows and columns, with the anodes interconnected along the columns and with the emitters interconnected along the rows, for example.
  • the control electrodes may have interconnections along either rows or columns, between other interconnections.
  • Such integrated circuits may be interconnected to perform logic or memory functions, or to make UHF oscillators, amplifiers, transmitters, and receivers, for example.
  • a hole is made in the inorganic insulator (by reactive ion etching or wet etching, for example) only over the auxiliary opening.
  • the sacrificial organic material is removed from within the cavity by a plasma etch, such as an oxygen plasma etch, which operates through the hole.
  • the atmosphere around the device is then removed to evacuate the cavity. If an inert gas filler is desired, then that gas is introduced at the desired pressure. Then the hole and auxiliary opening are immediately filled by sputter-depositing an inorganic insulator to plug the hole.
  • the plug of inorganic insulator seals the cavity and retains either the vacuum or any inert gas introduced.
  • high-frequency field-emission microelectronic device structure and fabrication process of this invention there are many diverse uses for the high-frequency field-emission microelectronic device structure and fabrication process of this invention, especially in high-speed computer logic and memory circuits, but also in high-speed flat panel displays for displaying images and for displaying character or graphic information. It is expected that the type of high-frequency field-emission microelectronic device made with this invention can replace many existing semiconductor devices, because of their lower manufacturing complexity and cost, lower power consumption, and improved high frequency performance. In embodiments using substantially transparent substrates and films, displays incorporating the devices ofthe present invention are expected to be used in new kinds of applications, such as virtual reality systems and especially augmented-reality systems.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Cold Cathode And The Manufacture (AREA)

Abstract

La présente invention concerne un dispositif micro-électronique (10) d'émission de champ comportant une électrode émettrice ultra-mince (30) parallèle au substrat (20) et une anode (40). Une électrode de commande (70) dont la largeur est une petite fraction de la largeur d'intervalle entre émetteur et anode et dont la hauteur est une petite fraction de la hauteur de l'anode, et tenue écartée de l'émetteur par un isolateur (60). L'électrode de commande peut sensiblement entourer l'anode. Une petite capacité entre les électrodes autorise des vitesses de commutation élevées. Il est possible de former plusieurs électrodes de commande. L'invention concerne également un procédé de fabrication (S1-S18) consistant à utiliser deux matériaux sacrificiels (150, 160) dont l'un sert de mandrin temporaire, et à utiliser une couche conductrice conforme pour donner sa forme à chaque électrode de commande en respectant des dimensions et des alignements caractérisés par leur petitesse et leur précision.
PCT/US1996/013398 1995-09-06 1996-08-16 Dispositif a emission de champ hf et procede de fabrication Ceased WO1997009733A1 (fr)

Priority Applications (1)

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Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US08/524,225 US5666019A (en) 1995-09-06 1995-09-06 High-frequency field-emission device
US08/524,225 1995-09-06
US08/524,171 1995-09-06
US08/524,171 US5628663A (en) 1995-09-06 1995-09-06 Fabrication process for high-frequency field-emission device

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999040604A1 (fr) * 1998-02-09 1999-08-12 Advanced Vision Technologies, Inc. Dispositif a emission de champ d'electrons confines et son procede de fabrication
WO2001008192A1 (fr) * 1999-07-26 2001-02-01 Advanced Vision Technologies, Inc. Composants d'emission de champ d'electrons a grille isolee et leurs procedes de fabrication
WO2001008193A1 (fr) * 1999-07-26 2001-02-01 Advanced Vision Technologies, Inc. Dispositif a effet de champ a vide et procede de fabrication

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5144191A (en) * 1991-06-12 1992-09-01 Mcnc Horizontal microelectronic field emission devices
US5233263A (en) * 1991-06-27 1993-08-03 International Business Machines Corporation Lateral field emission devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5144191A (en) * 1991-06-12 1992-09-01 Mcnc Horizontal microelectronic field emission devices
US5233263A (en) * 1991-06-27 1993-08-03 International Business Machines Corporation Lateral field emission devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999040604A1 (fr) * 1998-02-09 1999-08-12 Advanced Vision Technologies, Inc. Dispositif a emission de champ d'electrons confines et son procede de fabrication
WO2001008192A1 (fr) * 1999-07-26 2001-02-01 Advanced Vision Technologies, Inc. Composants d'emission de champ d'electrons a grille isolee et leurs procedes de fabrication
WO2001008193A1 (fr) * 1999-07-26 2001-02-01 Advanced Vision Technologies, Inc. Dispositif a effet de champ a vide et procede de fabrication

Also Published As

Publication number Publication date
AU6850496A (en) 1997-03-27

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