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WO1996039715A1 - Grille de connexion pour un boitier de circuits integres - Google Patents

Grille de connexion pour un boitier de circuits integres

Info

Publication number
WO1996039715A1
WO1996039715A1 PCT/US1996/007227 US9607227W WO9639715A1 WO 1996039715 A1 WO1996039715 A1 WO 1996039715A1 US 9607227 W US9607227 W US 9607227W WO 9639715 A1 WO9639715 A1 WO 9639715A1
Authority
WO
WIPO (PCT)
Prior art keywords
leadframe
integrated circuit
circuit package
electrical components
crystal resonator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US1996/007227
Other languages
English (en)
Inventor
Greg Richmond
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ICS Technology Co Ltd
ICS Technologies Inc
Original Assignee
ICS Technology Co Ltd
ICS Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ICS Technology Co Ltd, ICS Technologies Inc filed Critical ICS Technology Co Ltd
Publication of WO1996039715A1 publication Critical patent/WO1996039715A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49596—Oscillators in combination with lead-frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention is directed to a leadframe that automatically aligns and supports an oblong component, such as a cylindrical crystal resonator, in a plastic package that meets the dimensional standards of traditional integrate circuit packages, reducing the number of components and less reliable connections associated with printed circuit board assembly.
  • the invention also reduces the manufacturing costs of encapsulation by allowing preexisting standard package dimension tooling to be used for assembly and test.
  • a cylindrical crystal resonator is combined with one or more PLL circuits in a standard package with multiple input and output pins, which gives the user simultaneous access to a plurality of output clock signals a frequencies that are non-integer fractions and multiples of the base crystal resonator frequency.
  • Fig. 2B is a cross-sectional view of the leadframe of Fig. 2A.
  • Fig. 4A is a top view of an integrated circuit package containing the leadframe of the present invention securely accommodating an oblong component.
  • Figs. 3A through 3D show cross-sectional views of alternate embodiments of the present invention.
  • the bends 208 need not necessarily be formed in a downward angle. The key requirement is that a gap of sufficient size must be created to house resonator 202 and that the leadframe structure be in contact with resonator 202 to provide sufficient lateral support to hold it securely in place. Accordingly, the structure of leadframe 200 may include bends 208 that point upward, as shown in Fig. 3A, which create a gap 210 for and provide sufficient lateral support to resonator 202. Also, as shown in Figs.
  • Fig. 4B shows a cross-sectional view of IC package

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Oscillators With Electromechanical Resonators (AREA)

Abstract

L'invention concerne une grille de connexion (200) pour un boîtier de circuits intégrés qui aligne automatiquement et supporte un composant oblong (202), comme par exemple un résonateur à cristal cylindrique, dans un boîtier en plastique qui est conforme aux normes concernant les dimensions de boîtiers en plastique traditionnels de circuits intégrés, ce qui permet de diminuer le nombre des composants et des connexions moins fiables associés avec les systèmes de plaquettes de circuits imprimés. L'invention permet également de diminuer les coûts de fabrication au niveau de l'encapsulation, car elle autorise l'utilisation de l'appareillage standard existant, pour les opérations de fabrication et de vérification. Dans une forme d'exécution préférée, une microplaquette à oscillateur à cristal comprend un résonateur à cristal cylindrique combiné à un oscillateur et à un circuit à verrouillage de phase (204), permettant d'accéder à une pluralité de signaux d'horloge à des fréquences qui sont des fractions non entières ou des multiples de la fréquence de base du résonateur à cristal.
PCT/US1996/007227 1995-06-06 1996-05-17 Grille de connexion pour un boitier de circuits integres Ceased WO1996039715A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US46655595A 1995-06-06 1995-06-06
US08/466,555 1995-06-06

Publications (1)

Publication Number Publication Date
WO1996039715A1 true WO1996039715A1 (fr) 1996-12-12

Family

ID=23852211

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1996/007227 Ceased WO1996039715A1 (fr) 1995-06-06 1996-05-17 Grille de connexion pour un boitier de circuits integres

Country Status (2)

Country Link
TW (1) TW345731B (fr)
WO (1) WO1996039715A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016187059A (ja) * 2016-08-03 2016-10-27 ラピスセミコンダクタ株式会社 半導体装置及び計測機器
JP2018129553A (ja) * 2018-05-23 2018-08-16 ラピスセミコンダクタ株式会社 半導体装置
US10243515B2 (en) 2012-04-27 2019-03-26 Lapis Semiconductor Co., Ltd. Semiconductor device and measurement device
JP2020129667A (ja) * 2020-04-07 2020-08-27 ラピスセミコンダクタ株式会社 半導体装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916413A (en) * 1987-11-20 1990-04-10 Matsushima Kogyo Kabushiki Kaisha Package for piezo-oscillator
US5229640A (en) * 1992-09-01 1993-07-20 Avx Corporation Surface mountable clock oscillator module
US5302921A (en) * 1991-05-31 1994-04-12 Seiko Epson Corporation Piezoelectric oscillator having reduced radiation of higher harmonics
US5327104A (en) * 1991-10-21 1994-07-05 Seiko Epson Corporation Piezoelectric oscillator formed in resin package containing, IC chip and piezoelectric oscillator element
US5392006A (en) * 1987-02-27 1995-02-21 Seiko Epson Corporation Pressure seal type piezoelectric resonator
US5420758A (en) * 1992-09-10 1995-05-30 Vlsi Technology, Inc. Integrated circuit package using a multi-layer PCB in a plastic package

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5392006A (en) * 1987-02-27 1995-02-21 Seiko Epson Corporation Pressure seal type piezoelectric resonator
US4916413A (en) * 1987-11-20 1990-04-10 Matsushima Kogyo Kabushiki Kaisha Package for piezo-oscillator
US5302921A (en) * 1991-05-31 1994-04-12 Seiko Epson Corporation Piezoelectric oscillator having reduced radiation of higher harmonics
US5327104A (en) * 1991-10-21 1994-07-05 Seiko Epson Corporation Piezoelectric oscillator formed in resin package containing, IC chip and piezoelectric oscillator element
US5229640A (en) * 1992-09-01 1993-07-20 Avx Corporation Surface mountable clock oscillator module
US5420758A (en) * 1992-09-10 1995-05-30 Vlsi Technology, Inc. Integrated circuit package using a multi-layer PCB in a plastic package

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10243515B2 (en) 2012-04-27 2019-03-26 Lapis Semiconductor Co., Ltd. Semiconductor device and measurement device
US10622944B2 (en) 2012-04-27 2020-04-14 Lapis Semiconductor Co., Ltd. Semiconductor device and measurement device
JP2016187059A (ja) * 2016-08-03 2016-10-27 ラピスセミコンダクタ株式会社 半導体装置及び計測機器
JP2018129553A (ja) * 2018-05-23 2018-08-16 ラピスセミコンダクタ株式会社 半導体装置
JP2020129667A (ja) * 2020-04-07 2020-08-27 ラピスセミコンダクタ株式会社 半導体装置
JP2022145933A (ja) * 2020-04-07 2022-10-04 ラピスセミコンダクタ株式会社 半導体装置

Also Published As

Publication number Publication date
TW345731B (en) 1998-11-21

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