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WO1996035169B1 - Page migration in a non-uniform memory access (numa) system - Google Patents

Page migration in a non-uniform memory access (numa) system

Info

Publication number
WO1996035169B1
WO1996035169B1 PCT/US1996/006319 US9606319W WO9635169B1 WO 1996035169 B1 WO1996035169 B1 WO 1996035169B1 US 9606319 W US9606319 W US 9606319W WO 9635169 B1 WO9635169 B1 WO 9635169B1
Authority
WO
WIPO (PCT)
Prior art keywords
count
processing node
page
addressed
memory page
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US1996/006319
Other languages
French (fr)
Other versions
WO1996035169A1 (en
Filing date
Publication date
Application filed filed Critical
Priority to JP53356896A priority Critical patent/JP3889044B2/en
Priority to EP96913935A priority patent/EP0769171A1/en
Publication of WO1996035169A1 publication Critical patent/WO1996035169A1/en
Publication of WO1996035169B1 publication Critical patent/WO1996035169B1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Abstract

A page migration controller is described. The page migration controller determines whether a memory page addressed by a memory access request should be migrated from a local processing node to a requester processing node. The page migration controller accesses an array to obtain a first count associated with the addressed memory page and the requester processing node, and a second count associated with the addressed memory page and the local processing node. The first count is incremented, and then the second count is subtracted from the incremented first count to obtain a difference between the second count and the incremented first count. A comparator determines whether the difference is greater than a migration threshold value. If the difference is greater than the migration threshold value, then a migration interrupt is issued.

Claims

AMENDED CLAIMS
[received by the International Bureau on 08 November 1996 (08.11.96); original claim 27 amended; new claim 29 added; remaining claims unchanged (1 page)]
27. A method of determining whether a memory page, stored in a local processing node and addressed by a memory access request, should be replicated to a requester processing node in which said memory access request originated, comprising the steps of: obtaining a count from an array in said local processing node, said count being S associated with said addressed memory page and said requester processing node; incrementing said count; and issuing a replication signal if said incremented count is greater than a replication threshold value.
0 28. The apparatus of claim 1, wherein said incrementer statistically increments said first count.
29. A method of determining whether a memory page, stored in a local processing node and addressed by a memory access request, should be replicated to a requester processing 5 node in which said memory access request originated, comprising the steps of: obtaining a count associated with said addressed memory page and said requester processing node; incrementing said count; issuing a replication signal if said incremented count is greater than a replication 0 threshold value; receiving said replication signal; and determining, after receiving said replication signal, whether said memory page should be replicated based on additional threshold factors, including system load, migration history of said addressed memory page, or node bandwidth imbalance. 5
PCT/US1996/006319 1995-05-05 1996-05-03 Page migration in a non-uniform memory access (numa) system Ceased WO1996035169A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP53356896A JP3889044B2 (en) 1995-05-05 1996-05-03 Page movement in non-uniform memory access (NUMA) systems
EP96913935A EP0769171A1 (en) 1995-05-05 1996-05-03 Page migration in a non-uniform memory access (numa) system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43546495A 1995-05-05 1995-05-05
US08/435,464 1995-05-05

Publications (2)

Publication Number Publication Date
WO1996035169A1 WO1996035169A1 (en) 1996-11-07
WO1996035169B1 true WO1996035169B1 (en) 1997-01-09

Family

ID=23728522

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1996/006319 Ceased WO1996035169A1 (en) 1995-05-05 1996-05-03 Page migration in a non-uniform memory access (numa) system

Country Status (4)

Country Link
US (1) US5727150A (en)
EP (1) EP0769171A1 (en)
JP (1) JP3889044B2 (en)
WO (1) WO1996035169A1 (en)

Families Citing this family (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IN188196B (en) * 1995-05-15 2002-08-31 Silicon Graphics Inc
US5987506A (en) * 1996-11-22 1999-11-16 Mangosoft Corporation Remote access and geographically distributed computers in a globally addressable storage environment
US7136903B1 (en) 1996-11-22 2006-11-14 Mangosoft Intellectual Property, Inc. Internet-based shared file service with native PC client access and semantics and distributed access control
US5909540A (en) * 1996-11-22 1999-06-01 Mangosoft Corporation System and method for providing highly available data storage using globally addressable memory
US6148377A (en) * 1996-11-22 2000-11-14 Mangosoft Corporation Shared memory computer networks
US6647393B1 (en) * 1996-11-22 2003-11-11 Mangosoft Corporation Dynamic directory service
US5860116A (en) * 1996-12-11 1999-01-12 Ncr Corporation Memory page location control for multiple memory-multiple processor system
FR2764097B1 (en) * 1997-06-02 1999-07-02 Bull Sa HOT POINT DETECTION IN A MACHINE WITH NON-UNIFORM ACCESS MEMORY
US6073225A (en) * 1997-06-24 2000-06-06 Intel Corporation Method and apparatus for monitoring bus transactions based on cycle type and memory address range
US6026472A (en) * 1997-06-24 2000-02-15 Intel Corporation Method and apparatus for determining memory page access information in a non-uniform memory access computer system
US6785888B1 (en) * 1997-08-29 2004-08-31 International Business Machines Corporation Memory allocator for a multiprocessor computer system
US6167437A (en) * 1997-09-02 2000-12-26 Silicon Graphics, Inc. Method, system, and computer program product for page replication in a non-uniform memory access system
US6289424B1 (en) 1997-09-19 2001-09-11 Silicon Graphics, Inc. Method, system and computer program product for managing memory in a non-uniform memory access system
US6249802B1 (en) 1997-09-19 2001-06-19 Silicon Graphics, Inc. Method, system, and computer program product for allocating physical memory in a distributed shared memory network
US6047316A (en) * 1997-12-12 2000-04-04 Intel Corporation Multiprocessor computing apparatus having spin lock fairness
US6035378A (en) * 1997-12-16 2000-03-07 Ncr Corporation Method and apparatus for dynamically monitoring memory page access frequency in a non-uniform memory access computer system
US6035377A (en) * 1997-12-17 2000-03-07 Ncr Corporation Method and apparatus for determining memory pages having greatest frequency of access in a non-uniform memory access computer system
US6298419B1 (en) * 1998-03-26 2001-10-02 Compaq Computer Corporation Protocol for software distributed shared memory with memory scaling
US6334177B1 (en) 1998-12-18 2001-12-25 International Business Machines Corporation Method and system for supporting software partitions and dynamic reconfiguration within a non-uniform memory access system
US6347362B1 (en) * 1998-12-29 2002-02-12 Intel Corporation Flexible event monitoring counters in multi-node processor systems and process of operating the same
US6839739B2 (en) * 1999-02-09 2005-01-04 Hewlett-Packard Development Company, L.P. Computer architecture with caching of history counters for dynamic page placement
US8191097B1 (en) 1999-04-01 2012-05-29 Comcast Ip Holdings I, Llc Method and apparatus for hierarchical distribution of video content for an interactive information distribution system
US6330647B1 (en) * 1999-08-31 2001-12-11 Micron Technology, Inc. Memory bandwidth allocation based on access count priority scheme
US6615375B1 (en) 2000-02-03 2003-09-02 International Business Machines Corporation Method and apparatus for tolerating unrecoverable errors in a multi-processor data processing system
US6766360B1 (en) * 2000-07-14 2004-07-20 Fujitsu Limited Caching mechanism for remote read-only data in a cache coherent non-uniform memory access (CCNUMA) architecture
JP4730572B2 (en) * 2000-08-21 2011-07-20 株式会社アルバック Plasma film forming apparatus and cleaning method thereof
US7380001B2 (en) * 2001-05-17 2008-05-27 Fujitsu Limited Fault containment and error handling in a partitioned system with shared resources
US6961761B2 (en) * 2001-05-17 2005-11-01 Fujitsu Limited System and method for partitioning a computer system into domains
US6754776B2 (en) 2001-05-17 2004-06-22 Fujitsu Limited Method and system for logical partitioning of cache memory structures in a partitoned computer system
US6754782B2 (en) * 2001-06-21 2004-06-22 International Business Machines Corporation Decentralized global coherency management in a multi-node computer system
US6760817B2 (en) 2001-06-21 2004-07-06 International Business Machines Corporation Method and system for prefetching utilizing memory initiated prefetch write operations
US6901485B2 (en) 2001-06-21 2005-05-31 International Business Machines Corporation Memory directory management in a multi-node computer system
US6654857B2 (en) * 2001-06-21 2003-11-25 International Business Machines Corporation Non-uniform memory access (NUMA) computer system having distributed global coherency management
US6862634B2 (en) 2001-06-29 2005-03-01 Fujitsu Limited Mechanism to improve performance in a multi-node computer system
US6721853B2 (en) * 2001-06-29 2004-04-13 International Business Machines Corporation High performance data processing system via cache victimization protocols
US7103728B2 (en) * 2002-07-23 2006-09-05 Hewlett-Packard Development Company, L.P. System and method for memory migration in distributed-memory multi-processor systems
US7062610B2 (en) * 2002-09-30 2006-06-13 Advanced Micro Devices, Inc. Method and apparatus for reducing overhead in a data processing system with a cache
US7155572B2 (en) * 2003-01-27 2006-12-26 Advanced Micro Devices, Inc. Method and apparatus for injecting write data into a cache
US7334102B1 (en) 2003-05-09 2008-02-19 Advanced Micro Devices, Inc. Apparatus and method for balanced spinlock support in NUMA systems
US7085897B2 (en) * 2003-05-12 2006-08-01 International Business Machines Corporation Memory management for a symmetric multiprocessor computer system
CN100383763C (en) * 2004-02-27 2008-04-23 中国人民解放军国防科学技术大学 Page Migration and Copy Method Based on Reverse Page Table of Operating System
US8078818B2 (en) * 2004-05-11 2011-12-13 Hewlett-Packard Development Company, L.P. Method and system for migrating memory segments
JP4535784B2 (en) * 2004-06-15 2010-09-01 日本電気株式会社 Process placement apparatus, process placement method, and process placement program
WO2006014573A2 (en) * 2004-07-07 2006-02-09 Yotta Yotta, Inc. Systems and methods for providing distributed cache coherence
US7287122B2 (en) * 2004-10-07 2007-10-23 International Business Machines Corporation Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashing
US7457922B2 (en) * 2004-11-20 2008-11-25 International Business Machines Corporation Cache line placement prediction for multiprocessor non-uniform cache architecture systems
US20080263279A1 (en) * 2006-12-01 2008-10-23 Srinivasan Ramani Design structure for extending local caches in a multiprocessor system
US8719547B2 (en) 2009-09-18 2014-05-06 Intel Corporation Providing hardware support for shared virtual memory between local and remote physical memory
KR101662829B1 (en) * 2009-11-19 2016-10-05 삼성전자주식회사 Multi-processor and apparatus and method for managing cache coherence for the same
FR2968792B1 (en) * 2010-12-13 2013-01-11 Bull Sas METHOD, COMPUTER PROGRAM, AND MEMORY ACCESS MANAGEMENT DEVICE IN NUMA TYPE MULTIPROCESSOR ARCHITECTURE
EP2437433B1 (en) * 2011-04-19 2017-09-06 Huawei Technologies Co., Ltd. Memory access monitoring method and device
US9477590B2 (en) * 2011-09-16 2016-10-25 Apple Inc. Weave sequence counter for non-volatile memory systems
US9684600B2 (en) * 2011-11-30 2017-06-20 International Business Machines Corporation Dynamic process/object scoped memory affinity adjuster
JP5223018B1 (en) 2012-05-30 2013-06-26 楽天株式会社 Information processing apparatus, information processing method, information processing program, and recording medium
CN104956341A (en) * 2013-12-31 2015-09-30 华为技术有限公司 Data migration method, device and processor
CN105468538B (en) * 2014-09-12 2018-11-06 华为技术有限公司 A kind of internal memory migration method and apparatus
US9563572B2 (en) 2014-12-10 2017-02-07 International Business Machines Corporation Migrating buffer for direct memory access in a computer system
EP3519970A1 (en) * 2016-09-28 2019-08-07 INTEL Corporation Measuring per-node bandwidth within non-uniform memory access (numa) systems
US11113440B1 (en) * 2017-03-17 2021-09-07 Synopsys, Inc. Memory migration in hybrid emulation
US10503658B2 (en) 2017-04-27 2019-12-10 Advanced Micro Devices, Inc. Page migration with varying granularity
US10782908B2 (en) 2018-02-05 2020-09-22 Micron Technology, Inc. Predictive data orchestration in multi-tier memory systems
US11099789B2 (en) 2018-02-05 2021-08-24 Micron Technology, Inc. Remote direct memory access in multi-tier memory systems
US12135876B2 (en) 2018-02-05 2024-11-05 Micron Technology, Inc. Memory systems having controllers embedded in packages of integrated circuit memory
US11416395B2 (en) 2018-02-05 2022-08-16 Micron Technology, Inc. Memory virtualization for accessing heterogeneous memory components
US10880401B2 (en) 2018-02-12 2020-12-29 Micron Technology, Inc. Optimization of data access and communication in memory systems
US10877892B2 (en) * 2018-07-11 2020-12-29 Micron Technology, Inc. Predictive paging to accelerate memory access
US10691611B2 (en) 2018-07-13 2020-06-23 Micron Technology, Inc. Isolated performance domains in a memory system
US10852949B2 (en) 2019-04-15 2020-12-01 Micron Technology, Inc. Predictive data pre-fetching in a data storage device
US11036720B2 (en) * 2019-06-28 2021-06-15 Advanced New Technologies Co., Ltd. Blockchain-based hierarchical data storage
US10789222B2 (en) 2019-06-28 2020-09-29 Alibaba Group Holding Limited Blockchain-based hierarchical data storage
US12249189B2 (en) 2019-08-12 2025-03-11 Micron Technology, Inc. Predictive maintenance of automotive lighting
US11733902B2 (en) 2021-04-30 2023-08-22 International Business Machines Corporation Integrating and increasing performance of disaggregated memory in operating systems
US20220012209A1 (en) * 2021-09-20 2022-01-13 Intel Corporation Apparatus, system and method to sample page table entry metadata between page walks
CN114780015B (en) * 2022-02-26 2025-08-05 山东云海国创云计算装备产业创新中心有限公司 Data migration method, system, storage medium and device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5269013A (en) * 1991-03-20 1993-12-07 Digital Equipment Corporation Adaptive memory management method for coupled memory multiprocessor systems
US5313631A (en) * 1991-05-21 1994-05-17 Hewlett-Packard Company Dual threshold system for immediate or delayed scheduled migration of computer data files

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