WO1996032746A1

WO1996032746A1 - Integrated circuit packages

Info

Publication number: WO1996032746A1
Application number: PCT/GB1996/000873
Authority: WO
Inventors: David Yorke Armstrong
Original assignee: HYBRID MEMORY PRODUCTS Ltd
Current assignee: HYBRID MEMORY PRODUCTS Ltd
Priority date: 1995-04-08
Filing date: 1996-04-09
Publication date: 1996-10-17
Anticipated expiration: 1997-10-08
Also published as: AU5284096A; JPH11503569A; EP0820643A1

Abstract

An integrated circuit memory package comprises a plurality of integrated circuit assemblies (62) attached to a base (63), each assembly (62) comprises a flat substrate (31) having a plurality of contact terminals (33) arranged along a lower edge thereof and integrated circuit memory devices attached to respective opposite sides thereof (10R, 10S). The assemblies (62) are bonded to each other prior to attachment to the base (63), such that their respective lower edges are arranged in a plane which extends perpendicular to the substrates (31). The contact terminals (33) are connected to respective contact terminals (63) on the upper surface of the base (64) by means of a conductive butt joint. A good connection is formed between the substrates (31) and the base (64) because bonding the assemblies (62) together helps to ensure that the contact terminals (33) on each substrate (31) are aligned correctly with the corresponding terminals (63) on the base (64).

Description

Integrated Circuit Packages

This invention relates to integrated circuit packages, and more particularly to an integrated circuit package and to a method of assembly thereof.

It is known to improve the performance of electronic systems, such as microprocessors, by reducing the separation between their component parts. The signal delay, say between integrated circuit (IC) memory devices and a CPU is greatly reduced as their physical separation decreases. Most of the improvements in performance arise from better device design, however some improvements also arise from the device packaging.

US 5,279,029 discloses a package which comprises a plurality of IC memory devices arranged in a stack, so as to maximise the use of space inside the electronic system and hence reduce delays. Most ICs comprise a semiconductor wafer housed inside a glass-fibre, ceramics or plastics body. External electrical connections to the wafer are made by way of leads which extend from the body. A disadvantage of the arrangement disclosed in US 5,279,029 is that is uses non-standard ICs, which are expensive to manufacture. Furthermore, any changes in IC design are costly and complicated to make.

We have now devised an integrated circuit package which alleviates the above-mentioned problems.

In accordance with this invention, there is provided an integrated circuit package comprising a plurality of integrated circuit assemblies attached to a base, each assembly comprising a flat substrate having a plurality of contact terminals arranged along a lower edge thereof and an integrated circuit device, the assemblies being fixed to each other prior to attachment to the base, such that their respective substrates lie in parallel planes with their respective lower edges being arranged in a j.lane which extends perpendicular to said substrates, each of the contact terminals being connected to respective contact terminals on a surface of the base by means of a conductive butt joint.

The package is cheap and simple to manufacture using standard integrated circuit devices mounted to the substrates. Interconnections between the various devices can be made on the base. A good strong conductive butt connection is formed between the substrates and the base, owing to the assemblies being fixed together prior to attachment to the base, so that the respective contact terminals on each substrate are aligned correctly. The assemblies also form a rigid structure so that individual assemblies cannot flex and break away from the base. The conductive butt joint may comprise solder or a conductive adhesive.

Preferably integrated circuit devices are mounted on opposite sides of each substrate.

Preferably the integrated circuit devices of adjacent assemblies are bonded face-to-face. Preferably the integrated circuit devices on opposite sides of each substrate are symmetrical about that substrate. Preferably an integrated circuit is provided on the base for controlling and/or processing signals from the integrated circuit devices of the assemblies. Preferably the integrated circuit devices of the assemblies comprise memory devices.

In one embodiment the base may be provided with terminals for connection to other components in an electronic system. Preferably each substrate comprises a printed circuit board, or a ceramic or polyamide film.

Preferably a plurality of bases each carrying respective integrated circuit assemblies are mounted to a motherboard. In an alternative embodiment, groups of bases each having respective integrated circuit assemblies attached thereto, are attached to a substrate provided with terminals for connection to other components in an electronic system.

Also, in accordance with this invention, there is provided a method of manufacturing an integrated circuit package comprising forming a plurality of integrated circuit assemblies each comprising an integrated circuit device attached to a flat substrate which has a plurality of contact terminals arranged along a lower edge thereof, fixing said plurality of assemblies to each other such that their respective substrates lie in parallel planes with their respective lower edges being arranged in a plane which extends perpendicular to said substrates, arranging said assemblies on a base such that their lower edges lie on the upper surface of the base, and mechanically and electrically connecting respective contact terminals on the assemblies to respective contact terminals on the upper surface of the base.

Preferably the contact terminals on the upper surface of the base are printed with solder or conductive adhesive prior to arranging said assemblies thereon. Preferably heat is applied to the under surface of the base to melt the solder or adhesive on the upper surface of the base and thus provide a good mechanical and electrical connection between each of the assemblies and the base.

Preferably integrated circuit devices are attached to opposite sides of the substrate.

Preferably the assemblies are bonded to each other. Preferably the assemblies are bonded to each other by applying adhesive between the faces of abutting integrated circuit devices.

An embodiment of this invention will now be described by way of example only and with reference to the accompanying drawings, in which: FIGURE 1 is a side view of an integrated circuit memory device used in an integrated circuit memory package in accordance with this invention;

FIGURE 2 is a plan view of the integrated circuit memory device of Figure 1; FIGURE 3 is a plan view of an interposed printed circuit board used in a memory package in accordance with this invention;

FIGURES 4 to 6 are perspective views showing the first assembly stages of an integrated circuit memory package in accordance with this invention;

FIGURE 7 is a view in the direction VII of Figure 6 following assembly; and

FIGURES 8 and 9 are perspective views showing the final assembly stages of the integrated circuit memory package in accordance with this invention.

Referring to Figures 1 and 2 of the drawings there is shown a conventional integrated circuit (IC) memory device 10 comprising a thin rectangular plastics body 11 which houses a semiconductor wafer. The plastics body 11 is only slightly larger than the semiconductor wafer which it houses. A plurality of electrical leads 12, that are connected to the semiconductor wafer, project outwardly from opposite end edges of the body 11. The leads 12 are bent downwardly and outwardly such that their free ends lie in the plane of the rear surface of the body 11.

Such memory devices or so-called thin-small-outline- packages (TSOPs) are available in the aforementioned standard footprint and also in a reverse footprint version. In the reverse footprint version, the electrical leads 12 are bent upwardly and outwardly such that their free ends lie in the plane of the front surface of the body 11.

Referring to Figure 3 of the drawings, there is shown an interposer printed circuit board (PCB) 30 used in a memory package in accordance with the invention. The PCB 30 comprises a rectangular substrate 31 formed from glass-fibre, ceramics or plastics material. A plurality of electrical contact pads 32 are arranged along opposite end edges of the substrate 31 on opposite sides of the PCB. A plurality of connection pads 33 are arranged along one side of the substrate 31 on opposite sides of the PCB. The contact pads 32 are connected to the connection pads 33 by means of tracks 34 which extend across both sides of the PCB.

Referring to Figure 4 of the drawings, the pads 32,33 on both sides of the interposer PCB 30 are printed with solder paste. Next, in accordance with the invention, standard and reverse memory ICs 10S,10R are attached to opposite sides of the PCB respectively by reflowing the solder paste, such that the leads 12 of the ICs connect to respective contact pads 32. In this manner the corresponding electrical leads 12 on the standard and reverse footprint ICs 10S,10R lie directly opposite each other on opposite sides of the PCB. It is common in memory packages to interconnect the row and column-select leads and the read/write leads on one memory IC to the corresponding leads on other similar ICs in the package. Each IC can then be individually selected using the device select lead, which is not connected to the leads of other devices. The leads of the standard and reverse footprint ICs 10S,10R which have to be interconnected can be interconnected by providing plated-through holes between opposite sides of the PCB.

Referring to Figure 5 of the drawings, once four such interposer assemblies 35 have been assembled, they are bonded side-by-side by applying adhesive to the front surfaces of the abutting ICs 10S,10R, e.g. at 36. The assemblies 35 are bonded such that their side edges having the connection pads 33 lie in the same plane. Care also has to be taken that the corresponding connection pad 33 on each assembly 35 lies on a straight line which extends perpendicular to the plane of the interposer substrate 31.

Referring to Figures 6 and 7 of the drawings, a leadless-chip-carrier (LCC) 60 comprises a rectangular substrate 61 formed from glass-fibre, ceramics or plastics material. A plurality of rows of connection pads 63 are disposed on the upper surface of the LCC 60. The pads 63 are connected to respective edge connection pads 64 and to pads (not shown) on the under surface of the LCC. A decoder/buffer IC 65 is connected to the pads on the under surface of the LCC 60, and sealed thereto by means of a metal cover 66. Next, the pads 63 on the upper surface of the LCC 60 are printed with solder paste. Then the memory block assembly 62 is placed on the upper surface of the LCC 60, such that the connection pads 33 on the edges of each interposed assembly 35 are in contact with respective connection pads 63 on the LCC 60. The memory block assembly is then connected to the LCC 60 by applying heat to the underside of the base PCB, so as to reflow the solder paste which is printed on its upper surface. A strong mechanical and electrical connection is thus made between the respective pads 33,63 on each of the interposed assemblies 35 and the LCC 60.

Referring to Figures 8 and 9 of the drawings, a mother board or so-called pin-grid-array (PGA) 80 comprises a ceramic substrate 81 having an array of pins 82 on its under surface. A plurality of contact pads 83 are arranged on the upper surface of the PGA 80. The pads 83 are screen-printed with conductive epoxy resin. Four LCC assemblies 84 are arranged on the upper surface of the PGA 80 such that their edge connections 64 make contact with the pads 83 on the PGA. The epoxy resin is then cured to firmly adhere the LCC assemblies 84 to the PGA 80. A metal lid 90 is then sealed onto the PGA 80 to cover the memory ICs inside. Decoupling capacitors 85 may be attached to terminals (now shown) on the underside of the LCC. In an alternative embodiment the motherboard may comprise a ball grid array.

It will be appreciated that the memory package uses standard low-cost off-the-shelf memory devices, so that costly tooling and fabrication processes are avoided. The package occupies minimal space on a printed circuit board, owing to the memory devices being stacked perpendicular thereto. Furthermore, the arrangement of the package provides a convenient and simple means of forming connections between respective row and column select leads of the memory devices.

Claims

7 Claims

1) An integrated circuit package comprising a plurality of integrated circuit assemblies attached to a base, each assembly comprising a flat substrate having a plurality of contact terminals arranged along a lower edge thereof and an integrated circuit device, the assemblies being fixed to each other prior to attachment to the base, such that their respective substrates lie in parallel planes with their respective lower edges being arranged in a plane which extends perpendicular to said substrates, each of the contact terminals being connected to respective contact terminals on a surface of the base by means of a conductive butt joint.

2) An integrated circuit package as claimed in claim l, in which the conductive butt joint comprises solder.

3) An integrated circuit package as claimed in claim 1, in which the conductive butt joint comprises a conductive adhesive.

4) An integrated circuit package as claimed in any preceding claim, in which the integrated circuit devices are mounted on opposite sides of each substrate.

5) An integrated circuit package as claimed in claim 4, in which the integrated circuit devices of adjacent assemblies are bonded face-to-face.

6) An integrated circuit package as claimed in claims 4 or 5, in which the integrated circuit devices on opposite sides of each substrate are symmetrical about that substrate.

7) An integrated circuit package as claimed in any preceding claim, in which an integrated circuit device is provided on the base for controlling and/or processing signals from the integrated circuit devices of the assemblies.

8) An integrated circuit package as claimed in any preceding claim, in which the integrated circuit devices of the assemblies comprise memory devices.

9) An integrated circuit package as claimed in any preceding claim, in which the base is provided with terminals for connection to other components in an electronic system.

10) An integrated circuit package as claimed in any preceding claim, in which each substrate comprises a printed circuit board.

11) An integrated circuit package as claimed in any of claims 1 to 9, in which each substrate comprises a ceramic film.

12) An integrated circuit package as claimed in any of claims 1 to 9, in which each substrate comprises a polyamide film.

13) An integrated circuit package as claimed in any preceding claim, comprising a plurality of bases mounted to a motherboard, each base carrying respective integrated circuit assemblies.

14) An integrated circuit package as claimed in any of claims 1 to 12, in which groups of bases, each having respective integrated circuit assemblies attached thereto, are attached to a substrate provided with terminals for connection to other components in an electronic system.

15) A method of manufacturing an integrated circuit package comprising forming a plurality of integrated circuit assemblies each comprising an integrated circuit device attached to a flat substrate which has a plurality of contact terminals arranged along a lower edge thereof, fixing said plurality of assemblies to each other such that their respective substrates lie in parallel planes with their respective lower edges being arranged in a plane which extends perpendicular to said substrates, arranging said assemblies on a base such that their lower edges lie on the upper surface of the base, and mechanically and electrically connecting respective contact terminals on the assemblies to respective contact terminals on the upper surface of the base.

16) A method of manufacturing an integrated circuit package as claimed in claim 15, in which the contact terminals on the upper surface of the base are printed with solder prior to arranging said assemblies thereon.

17) A method of manufacturing an integrated circuit package as claimed in claim 16, in which heat is applied to the under surface of the base to melt the solder.

18) A method of manufacturing an integrated circuit package as claimed in claim 15, in which the contact terminals on the upper surface of the base are printed with conductive adhesive prior to arranging said assemblies thereon.

19) A method of manufacturing an integrated circuit package as claimed in claim 18, in which the heat is applied to the under surface of the base to melt the conductive adhesive.

20) A method of manufacturing an integrated circuit package as claimed in any of claims 15 to 19, in which integrated circuit devices are attached to opposite sides of each substrate.

21) A method of manufacturing an integrated circuit package as claimed in claim 20, in which the assemblies are bonded to each other by applying adhesive between the faces of abutting integrated circuit devices.