WO1994005082A1 - Method for transmission of a high frequency logical signal by means of inductive coupling with high galvanic isolation - Google Patents

Abstract

Method of copying a signal with high galvanic isolation consisting in dissociating the signal's leading edge from its trailing edge, and passing these edges across an inductive coupling, the turns (23, 24) being printed on each of the surfaces of the plate (9) supporting the means for dissociating said signal and the means for recreating it; the latter means comprising a dual input RESET-SET type flip-flop. Application in low energy consumption coupling for use in dangerous environments.

Description

"METHOD OF TRANSMITTING A HIGH FREQUENCY LOGIC SIGNAL BY INDUCTIVE COUPLING WITH VERY HIGH GALVANIC INSULATION"

The present invention is in the field of electronics and it relates to means for transmitting signals, in particular binary or logic signals, in slots. The object of the invention is to faithfully copy a logic signal through high galvanic isolation, for example to ensure safety against overvoltages between a part I without danger of an installation and a part II in a dangerous atmosphere. reuse, the said installation parts each having their own mass reference.

We know, to electrically isolate two parts of a circuit, the two parts each having their own mass (reference potential), the opto-electronic coupling technique; however, this technique consumes energy (approximately five to ten times more than the means of the invention) with a relatively high cost of the coupler (approximately twenty times more), it is therefore another object of the invention to replace the opto-electronic coupling with an inductive coupling using conventional components with lower cost and lower energy consumption.

The basic idea which led to the present invention was to use the printing of inductors on the same plate on which the circuits are printed, technique known in itself, to isolate the two parts of installation mentioned above, and to design, around these coils, the electronic circuits suitable for transmitting through them a logic signal which may be of high frequency.

Thus and according to the invention, a method for carrying out the faithful copying of a logic signal at high frequency (which can reach a few MHz) with high galvanic isolation, of the order of at least 1500 v, and with a current low power supply, of the order of 250 uA, is characterized in its greatest general in that it consists in dissociating the rising edge of the logic signal from its falling edge to make these edges pass separately through, each, an inductive coupling, then to recompose the logic signal by means of a flip-flop of RESET type- SET (RS) with two inputs, the inductances of each coupling being printed opposite one another on the plate on which the dissociation circuits are printed on the one hand and the redialing circuits on the other. The present invention will be better understood, and details will be apparent from the description which will be given of the method and of an example of means of its implementation, in relation to the figures of the appended plates, in which: - fig.l is a diagram of the steps of the method,

- Fig.2 is a perspective representation of an inductor printed on the plate, - Fig.3 is a partial plan of double-sided printed circuit board (3a, 3b) comprising coils of the previous figure, and

- Fig.4 is a diagram of an electronic circuit implementing the steps of the method illustrated in fig.l.

In FIG. 1, the method of the invention intended to perform the faithful copying, from part I of an installation to part II, of a high frequency logic signal (which can reach a few MHz) with high galvanic isolation, of the order of at least 1500 v, and with a low supply current, of the order of 250 uA, consists in dissociating the rising edge lm of the logic signal 1 from its falling edge ld for pass these edges separately each through an inductive coupling, each coupling consisting of a transformer 5,6, then recompose the logic signal by means of a flip-flop 7 of the RESET-SET type with two inputs, the inductances of each coupling being printed opposite one another on the plate 9 on which the dissociation 2 and recomposition 3 circuits are printed. More precisely, the method comprises the steps consisting in inverting by means of a first inverter 12 the polarity of the logic input signal 1 to obtain an inverted logic signal 13, then a: on the one hand,

-apply said reverse logic signal 13 to a second inverter 14 to obtain a so-called restored logic signal 15, then to -apply said restored signal to a first differentiating circuit 16 to transform the rising 17 and falling edges 18 of the restored signal , in first positive impulses respectively 19 and negative 20, then

-applying said pulses to first selector-amplifier means 21 so as to let transit and amplify only the single positive pulse and produce a first amplified positive pulse 22, then to -apply said first amplified positive pulse to a first inductance 23 printed on plate and forming the primary of a first transformer 5, then at-

-collect on the secondary of said first transformer, constituted by a second inductor 24 printed on the other face of the plate opposite the first inductor, a first transformed pulse 25, in the same direction, then at

-apply said first transformed pulse to first means 26 called Logical Leveling (MNL) at two levels: high and low, then to

apply the output 27 of said first means MNL to the input SET 28 of the flip-flop RS 7; on the other hand, -apply said inverted signal 13 to a second differentiating circuit 30 to transform the falling edges

31 and amount 32 of the inverted signal 13, in second pulses respectively negative 33 and positive 34, then at

-apply said second pulses to second selector-amplifier means 35 so that only the positive pulse 34 can pass and amplify, and produce a second amplified positive pulse 36 corresponding to the falling edge ld of the input signal l, then at

-apply said second amplified positive pulse to a third inductance 37 printed on the first face of the plate 9 and forming the primary of a second transformer 6, then to

-collect on a fourth inductor 38 forming the secondary of said second transformer, said second inductor also being printed on the other face of the plate 9 opposite the primary, a second transformed pulse 39, likewise sense then to

-apply said second transformed pulse, which is positive, to second means 40 of Logical Leveling that MNL at two logical levels. : high and low, then to -apply the output of said second means MNL to the input RESET 42 of said flip-flop RS.

It will be noted that from the MNL means 26 and 40 it is no longer pulses, or signals, which transit, since these pulses become virtual and appear only in their effects, which are the changes of state of the components ( transistors and gates as will be described later).

It follows from this way of operating, that the output signal 10 is the almost instantaneous logical image of the input logic signal 1, with, thanks to the inductive connections operated through the plate, an extremely important galvanic isolation. between the input and output circuits.

In Fig.2, an indu¬ ctance coil such as 23 of the following figures is constituted by a spiral formed of rectilinear segments connected at 90 °; this spiral is printed on one of the faces of the plate 9 of the circuits, while a similar spiral 24 is printed on the other face of the plate opposite the first sprirale. It is clear that the number of turns (two to three in the case of the drawing) is determined by the self-inductance value required by the nature, particularly the frequency, of the signal to be transmitted, but it will be noted that in the present application this value can be very low. Note that the turns could just as well be curvilinear like a Cornu spiral.

In Fig.3 there is shown on a scale which can be up to ten times larger than reality, spirals of the previous figure, as they can appear on printed circuit boards; the width of these spirals can be from ten millimeters up to several hundred meters.

In fig.4, the differentiating circuits 16,30 of fig.l receiving the restored 15 and inverted 13 signals each consist of a capacitor 50 and a resistor 51 connected to a ground 60; the selector-amplifier means 21 and 35 of fig.l, each consist of a saturable transistor 52 whose base 53 is connected to the capacitor 50, whose emitter 54 is connected to said mass 60 and whose collector 55 is connected to one end of one of said primary inductors, namely: first 23 or third 37, the other end of which is connected to a + terminal through a resistor 56, and to a capacitor 57 connected to the mass 60.

In fig.4 again, it appears that the said first and second Logical Leveling means which together with the flip-flop RS together form the recomposition means 3 of fig.l, are constituted by a pair of NAND gates 72,73 and by a pair of transis- bipolar tors 74,75 of which, for each of them, the base 76,77 is connected to the secondary inductance of one of the said printed transformers, the transmitter 78,79 is connected to a ground 80, and the collector _81_, 82 is connected on the one hand to an input _8_3_, 84 of one of the two NAND gates 72,73, and on the other hand, through a resistor _8_5_, 86, to the other input _8_7_, 88 from the same door _7_2 ^'73 and at the exit 89.90 from the other NAND gate 72.73.

It follows from this constructive arrangement that the current consumption is interrupted very quickly after the conduction of the transistors, whereby the resistances (61, 62) can be low and, therefore, the response speed of the flip-flop increased without increased current consumption.

Although particular forms of application of the method have been described and represented, it should be understood that the scope of the invention is not limited to these forms but that it extends to the most general definitions. given above.

Claims

1.- Method for performing the faithful copying of a logic signal at high frequency (which can reach a few MHz) with high galvanic isolation, of the order of at least 1500 v, and with a low supply current, of the order of 250 uA, from a first part I of an installation to a part II in a dangerous atmosphere, characterized: in that it consists in dissociating the rising edge dm) from the logic signal (1) from its falling edge (ld) for separately passing these edges each through an inductive coupling, each coupling consisting of a transformer (5,6), then recomposing the logic signal by means of a flip-flop (7) of RESET type- SET (RS) with two inputs, the inductances of each coupling being printed opposite one another on the plate (9) on which the dissociation (2) and redial (3) circuits are printed; 2.- method according to claim 1, characterized: in that it comprises the steps consisting in inverting by means of a first inverter (12) the polarity of the logic signal (1) input to obtain a logic signal inverted (13), then to: on the one hand, apply the said inverted logic signal (13) to a second inverter (14) to obtain a so-called restored logic signal (15), then to applying the said restored signal to a first differentiating circuit (16) to transform the rising (17) and falling (18) edges of the restored signal into first respectively positive pulses (19) and negative (20), then in -applying said pulses to first selector-amplifier means (21) so as to let only amplify the positive pulse and produce a first amplified positive pulse (22), - then to apply the said first amplified positive pulse to a first inductor (23) printed on the plate and forming the primary of the first transformer (5), then to collecting on the secondary of said first transformer, constituted by a second inductor (24) printed on the other face of the plate opposite the first inductor, a first transformed pulse (25), in the same direction, then to -apply said first transformed pulse to first means (26) called Logical Leveling (MNL) at two levels: high and low, then to -apply the output (27) of said first MNL means to the input SET (28) of the RS rocker (7); on the other hand, apply the said inverted signal (13) to a second differentiated cir¬ cuit (30) to transform the falling (31) and rising edges (32) of the inverted signal (13) into second pulses respectively nega ¬ tive (33) and positive (34), then to -apply said second pulses to second selector-amplifier means (35) so as to allow only the positive pulse (34) to pass and amplify and produce a second negative amplifier pulse ¬ relied (36), then to -apply said second amplified negative pulse to a third inductor (37) printed on plate and forming the primary of the second transformer, then -collect on a fourth inductor (38) forming the secondary of said second transformer, said second inductor also being printed on a plate opposite the primary, a second transformed pulse (39), in the same direction, then to -applying said second transformed pulse which is positive to second Logical Leveling means (40) at two logical levels: high and low, then a **. -apply the output of said second means MNL to 10 the RESET input (42) of said RS flip-flop, from which it follows that the output signal (10) is the almost instantaneous logical image of the input logic signal (1), with, thanks to the links ¬ inductive sound carried through the plate, an extremely important isola¬ ⁱ t tion between galvanic cir¬ cooked input and output; 3.- Method according to claim 2, characterized: in that the said first 20 and second means of MNL consist of: a pair of NAND gates (52,53) and by a couple of bipolar transistors (54 , 55) of which, for each of them, the base (56,57) "is connected to the secondary inductance (.24., 38) of one of the said printed transformers, the transmitter (56,57) is connected to a ground (58), and the collector (61,60) is connected on the one hand to an input (_6_3_, 64) of a NAND gate (52,53), and on the other hand, through a resis- 30 tance (_6_5_, 66), at the other entrance (.67., 68) of the same door and at the exit (69, .70.) Of the other NAND door (52, .53.) , from which it follows that the current consumption is interrupted very quickly after 35 the conduction of the transistors whereby the resistances (61,62) can be low and, therefore, the response speed of the flip-flop increased without increasing the current consumption.