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WO1993007567A1 - Multiordinateur professionnel a architecture multiprocesseurs - Google Patents

Multiordinateur professionnel a architecture multiprocesseurs Download PDF

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Publication number
WO1993007567A1
WO1993007567A1 PCT/CH1992/000196 CH9200196W WO9307567A1 WO 1993007567 A1 WO1993007567 A1 WO 1993007567A1 CH 9200196 W CH9200196 W CH 9200196W WO 9307567 A1 WO9307567 A1 WO 9307567A1
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WO
WIPO (PCT)
Prior art keywords
individual
computers
computer
displayed
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CH1992/000196
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German (de)
English (en)
Inventor
Martin Giger
Thomas Giger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of WO1993007567A1 publication Critical patent/WO1993007567A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • G06F3/023—Arrangements for converting discrete items of information into a coded form, e.g. arrangements for interpreting keyboard generated codes as alphanumeric codes, operand codes or instruction codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/12—Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels

Definitions

  • Multi-business computer with multi-processor architecture Multi-business computer with multi-processor architecture.
  • the present invention has the purpose of making working with a wide variety of programs clearer, simpler, faster and more efficient. If you work on a PC with different programs, in most cases you have to leave the program and start the new one when changing from one program to another.
  • a parallel computer is much better, in which different programs with different or same operating systems run simultaneously.
  • the present invention represents a computer which makes the use of programs running in parallel user-friendly, which makes handling clear and does not reduce the computing speed.
  • the person who operates the computer needs almost no new knowledge in order to be able to jointly operate the programs that are now known and run in parallel. All programs now run in parallel on the computer at hand. All screen outputs of the individual parallel computers are simultaneously visible on a single monitor. The individual screen outputs can be displayed in any display type and form.
  • Programs from different operating systems run side by side on the same monitor. These are operating systems such as MS-DOS, WINDOWS, OS2, UNIX, GEO WORK or others. Each operating system has its own video output, which is displayed on a monitor together with the electronic circuit. The purpose of this screen control is to coordinate the various screen outputs and to display them together on one monitor. Furthermore, this screen control has the purpose of controlling the division on the screen for each image signal from each computer. This means that every image signal can be displayed in whole or in part at any point in any form on the screen.
  • IBM compatible personal computers are installed in a housing of 45 cm x 70 cm x 40 cm.
  • Each of the mainboards is fully functional as a PC, i.e. fully equipped with all connections such as I / O ports, serial and parallel interfaces, monitor, keyboard, mouse and game port, as well as interfaces for floppy disk drives, hard disks and bus slots.
  • Each computer has a hard drive of any storage capacity and a graphics card.
  • two floppy drives, i.e. A and B drive the large 3 1/2 inch and 5 1/4 inch are installed in the housing.
  • a monitor, a keyboard and a mouse are also connected to this computer.
  • Another part of this invention relates to the electronic circuit, which can control, connect and assign all the ports of the individual computers to one another.
  • This electronic circuit is programmable and is coupled to the individual computers in such a way that it is controlled by a program that runs in one of the computers. It is now possible to assign the floppy disk drive from one computer to another. In this way, data can be transferred from one computer to another and each computer therefore has access to the floppy disk drive.
  • all 4 PC computers can access printers, image storage disks or other devices that are connected to the computer. This is done by connecting the devices to the respective PC computer via the electronic circuit. Likewise, the PC computers can access network cards inserted in the bus slot.
  • the electronic monitor circuit is designed in such a way that it has the following functions: It synchronizes the individual horizontal and vertical signals of the individual PC computers with one another in order to obtain still images.
  • the circuit also has the effect that the starting point of the individual images is at the same location.
  • the circuit can also shift the starting points of the monitor images of the individual computers as desired by phase-shifting the Hsync and Vsync signals. This means that a monitor image can be displayed over the whole, without influencing or changing the program of the respective computer Screen moved and positioned anywhere.
  • This monitor circuit can also display the individual monitor images of the computers as desired on the screen; in every size and shape. An image can also be displayed in several places on the monitor. These overlays appear in the form of rectangles, clouds, bubbles or any shape.
  • the display is controlled by the graphics card of a PC, according to which all other graphics cards are synchronized. For example: If the controlling graphics card draws a red area of any shape, the picture is shown by PC 2 at this point, a blue area is drawn, the picture is shown by PC 3 at this point, etc.
  • the switch-on signals for the respective images are decoded from the color bits of the control graphics card.
  • This circuit Another function of this circuit is the dynamic overlay of the individual monitor signals. This means that an overlaid image of a PC computer moves horizontally or vertically or in any direction back and forth or uniformly. This means that this overlay is recognized very well compared to the still image.
  • the electronic monitor circuit is programmable and is controlled by a program that runs in one of the PCs. For its part, this program can again be displayed on the screen with its screen mask in any size and shape.
  • This overlaid The program provides information about the individual programs in the respective computers, the type of display and also controls the screen layout.
  • the program also appears in the form of input masks.
  • the program organizes the entire division of the PC and the connected devices and bus cards, the division of the screen and the management of all screen masks and the calling of programs.
  • This program also generates, saves and retrieves masks for image division and port assignment.
  • the control program also has the following function:
  • the vertical and horizontal screen resolutions are programmed with a higher number of points than the effectively displayed bitmap. In this way, several screen contents can be displayed in their effective score at the same time next to and among each other freely movable.
  • This representation which shows a visible image area of, for example, 1280 x 700 points, in which four full images with 640 x 350 points have space. requires the hardware programming of the video timing register of the graphics cards and the programming of the electronic circuit.
  • the horizontal and vertical synchronization and the offset of the individual bitmaps are programmed.
  • the running programs with different or the same operating systems can be activated at the push of a button with their associated peripheral settings.
  • All independent PC computers connected in parallel are located in one housing.
  • a keyboard and a mouse are connected to the computer and are assigned to the active computer when the switch is made. Switching takes place by pressing • the additional keyboard on the computer, on the mouse, on the original keyboard (102 keys) or as an additional keyboard on a cable.
  • all ports are optionally assigned to the respective computers.
  • the interface between the controllers of the floppy disk drive, the hard disk, the compact disk, optical storage disks and the streamer tape, tape storage device are optionally assigned to the respective PC computers.
  • Block 5 with the ports of all PC computers shows the electronic programmable circuit with which the individual ports can be assigned to any PC computer.
  • RB is the common memory bank to which all PC computers have access.
  • FIG. 2 shows a schematic representation of the individual port circuits. This changeover switches 4 PC computers with the associated ports.
  • A is the electronic, programmable switching switch for the parallel port.
  • Pl, P2, P3, P4 are the connection points to the respective parallel ports of the 4 independent PC computers.
  • P5 is the switched port, P1, P2, P3 or P4.
  • PA1 and PA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0.0 0.1 1.0 and 1.0.
  • B is the electronic, programmable changeover switch for the serial port.
  • Sl, S2, S3, S4 are the connection points to the respective serial ports of the 4 independent PC computers.
  • S5 is the switched port, Sl, S2, S3 or S4.
  • SA1 and SA2 are the programmable and switchable control selection signals.
  • C is the electronic, programmable changeover switch for the monitor port.
  • Ml, M2, M3, M4 are the connection points to the respective monitor ports of the 4 independent PC computers.
  • M5 is the switched port, Ml, M2, M3 or M4.
  • MAI and MA2 are the programmable and switchable control selection signals.
  • D is the electronic, programmable switch for the game port.
  • Gl, G2, G3, G4 are the connection points to the respective game ports of the 4 independent PC computers.
  • G5 is the switched port, Gl, G2, G3 or G4.
  • GA1 and GA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0.0 0.1 1.0 and 1.1.
  • E is the electronic, programmable changeover switch for the keyboard port.
  • Tl, T2, T3, T4 are the connection points to the respective keyboard ports of the 4 independent PC computers.
  • T5 is the switched port, T1, T2, T3 or T4.
  • TA1 and TA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0.0 0.1 1.0 and 1.0.
  • F is the electronic, programmable changeover switch for the bus slot.
  • B1, B2, B3, B4 are the connection points to the respective bus slot of the 4 independent PC computers.
  • B5 is the switched port, Bl, B2, B3 or B4.
  • BAI and BA2 are the programmable and switchable Control selection signals. There are 4 states due to the 2 scatter signals: 0, 0 0, II, 0 and I, I.
  • G is the electronic, programmable switch for the acoustic port AI, A2, A3, A4 are the connection points to the respective acoustic port of the 4 independent PC computers.
  • A5 is the through port, AI, A2, A3 or A4.
  • AA1 and AA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0.0 0.1 1.0 and 1.0.
  • FIG. 3 shows a schematic illustration of the individual controller port circuits. This changeover switches 4 PC computers with the associated control ports.
  • H is the electronic, programmable changeover switch for the controller port of the floppy disk drive.
  • Dl, D2, D3, D4 are the connection points to the respective floppy controller port of the 4 independent PC computers.
  • D5 is the connected controller port, Dl, D2, D3 or D4.
  • DA1 and DA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0, 0 0, I I, 0 and I, I.
  • I is the electronic, programmable changeover switch for the controller port of the hard disk drive.
  • Fl, F2, F3, F4 are the connection points to the respective hard disk controller port of the 4 independent PC computers.
  • F5 is the switched controller port, Fl, F2, F3 or F4.
  • FA1 and FA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0, 0 0, II, 0 and I, I.
  • K is the electronic, programmable changeover switch for the control port of the compact disc work.
  • Cl, C2, C3, C4 are the connection points to the respective CD controller port of the 4 independent PC computers.
  • C5 is the switched controller port, Cl, C2, C3 or C4.
  • CA1 and CA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0, 0 0, I I, 0 and 1, 1.
  • L is the electronic, programmable changeover switch for the controller port of the tape storage device.
  • Ul, U2, U3, U4 are the connection points to the respective tape storage controller port of the 4 independent PC computers.
  • U5 is the connected controller port, Ul, U2, U3 or U4.
  • UA1 and UA2 are the programmable and switchable control selection signals. There are 4 states due to the 2 scatter signals: 0.0 0.1 1.0 and 1.0.
  • FIG. 4 shows the synchronization of all 4 graphics cards of the 4 PC computers with one another, 3 graphics cards GR1, GR2 and GR3 being synchronized according to the master graphics card GRM.
  • the vertical signal VSl of the graphics card GRl is compared with the reference vertical signal of the master graphics card VSM and, if they are identical, the switch X is compared with the Signal El opened, which in turn switches through the quartz frequency 01 to the graphics card GR1. If the signal VSl is not the same as the signal VSM, the quartz frequency 01 that reaches GRl is halved or stopped.
  • the GRl waits until the signals VSM and VSl are congruent, which means that the images displayed on both graphics cards have the congruent starting point (top left on the monitor).
  • GR2 is the graphics card of the 2nd PC computer and GR3 is the graphics card of the 3rd PC computer.
  • VS2 and VS3 are the corresponding vertical synchronizing signals and E2 and. E3 are the corresponding switch-on signals of the respective graphics cards.
  • GR2 and GR3 are synchronized in the same way as GR1 after the VSM signal.
  • FIG. 5 shows the synchronization of all 4 graphics cards of the 4 PC computers with one another, 3 graphics cards GR1, GR2 and GR3 being synchronized according to the master graphics card GRM.
  • the reference vertical signal is different for each of the 3 graphics cards GR1, GR2 and GR3 and is generated by the color data bits from GRM.
  • each graphics card is based on its own reference vertical sync signal, which, out of phase with VSM, causes the start position of each individual screen to be freely selected and precisely.
  • the vertical signal VS1 of the graphics card GR1 is compared with the reference vertical signal of the master graphics card FB6 and, if they are identical, the switch X is opened with the signal El, which in turn switches the quartz frequency 01 through to the graphics card GRl.
  • GR2 is the graphics card of the 2nd PC computer and GR3 is the graphics card of the 3rd PC computer.
  • VS2 and VS3 are the corresponding vertical synchronizing signals and E2 and E3 are the corresponding switch-on signals of the respective graphics cards.
  • GR2 and GR3 are synchronized in the same way as GR1 after the signals FB5 and FB4.
  • the color data bits FBO and FBI of the GRM graphics card control the monitor selection signals MAI and MA2 of the switching switch C.
  • FIG. 6 shows a representation of the screen with superimposed image signals from the individual computers.
  • the cutouts shown are freely selectable in size and shape. They are determined precisely. These sections are drawn and determined with a program that runs in one of the computers. The mask created in this way gives a clear view of the images of the individual computers underneath, figuratively speaking. These individual images in the sections can be moved freely.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

Au moins deux ordinateurs personnels compatibles IBM équipés des processeurs (8066, 80286, 80386, 80486) ou suivants ou d'autres ordinateurs personnels d'autres marques sont disposés dans un boîtier. Les emplacements correspondant aux périphériques sur les différentes cartes sont connectés à un circuit électronique qui relie les équipements périphériques aux différents PC. Au moyen d'un ensemble de touches ou d'un programme, il est possible de passer d'un calculateur à un autre pendant que les ordinateurs travaillent. Un circuit électronique permet de superposer et de mélanger tous les signaux de contrôle sur un écran unique. L'ordinateur est relié à un clavier et une souris qui sont affectés à l'ordinateur actif lorsqu'on change de calculateur.
PCT/CH1992/000196 1991-10-11 1992-09-29 Multiordinateur professionnel a architecture multiprocesseurs Ceased WO1993007567A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH2987/91-0 1991-10-11
CH298791 1991-10-11

Publications (1)

Publication Number Publication Date
WO1993007567A1 true WO1993007567A1 (fr) 1993-04-15

Family

ID=4246114

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Application Number Title Priority Date Filing Date
PCT/CH1992/000196 Ceased WO1993007567A1 (fr) 1991-10-11 1992-09-29 Multiordinateur professionnel a architecture multiprocesseurs

Country Status (2)

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EP (1) EP0562071A1 (fr)
WO (1) WO1993007567A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0860771A1 (fr) * 1997-02-12 1998-08-26 Nanao Corporation Appareil pour exploitation sélective de plusieurs ordinateurs avec un seul ensemble de dispositif d'entrée de données et moniteur
FR2840753A1 (fr) * 2002-06-06 2003-12-12 Artabel Procede et dispositif pour traiter des signeaux video numeriques generes par un ensemble d'ordinateurs pour produire une image numerique
FR2840701A1 (fr) * 2002-06-06 2003-12-12 Artabel Procede et dispositif pour synchroniser un ensemble d'ordinateurs utilises en cluster pour traitement graphique
CN111753309A (zh) * 2020-06-29 2020-10-09 西安易朴通讯技术有限公司 一种显卡切换方法及服务器、存储介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0130733A2 (fr) * 1983-06-29 1985-01-09 Fujitsu Limited Système multiprocesseur
US4920481A (en) * 1986-04-28 1990-04-24 Xerox Corporation Emulation with display update trapping

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0130733A2 (fr) * 1983-06-29 1985-01-09 Fujitsu Limited Système multiprocesseur
US4920481A (en) * 1986-04-28 1990-04-24 Xerox Corporation Emulation with display update trapping

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PROCEEDINGS OF THE 1976 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING 1976, NEW YORK, NY, USA Seite 221 KRUTZ ET AL. 'A SHARED MEMORY TECHNIQUE FOR DIFFERENT MICROPROCESSORS' *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0860771A1 (fr) * 1997-02-12 1998-08-26 Nanao Corporation Appareil pour exploitation sélective de plusieurs ordinateurs avec un seul ensemble de dispositif d'entrée de données et moniteur
US6138191A (en) * 1997-02-12 2000-10-24 Nanao Corporation Apparatus for selectively operating a plurality of computers
FR2840753A1 (fr) * 2002-06-06 2003-12-12 Artabel Procede et dispositif pour traiter des signeaux video numeriques generes par un ensemble d'ordinateurs pour produire une image numerique
FR2840701A1 (fr) * 2002-06-06 2003-12-12 Artabel Procede et dispositif pour synchroniser un ensemble d'ordinateurs utilises en cluster pour traitement graphique
CN111753309A (zh) * 2020-06-29 2020-10-09 西安易朴通讯技术有限公司 一种显卡切换方法及服务器、存储介质

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Publication number Publication date
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