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WO1991000527A3 - Methode et appareil pour localiser les defauts dans unites electroniques - Google Patents

Methode et appareil pour localiser les defauts dans unites electroniques Download PDF

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Publication number
WO1991000527A3
WO1991000527A3 PCT/US1990/003809 US9003809W WO9100527A3 WO 1991000527 A3 WO1991000527 A3 WO 1991000527A3 US 9003809 W US9003809 W US 9003809W WO 9100527 A3 WO9100527 A3 WO 9100527A3
Authority
WO
WIPO (PCT)
Prior art keywords
changes
functional
functional test
constraints
block
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US1990/003809
Other languages
English (en)
Other versions
WO1991000527A2 (fr
Inventor
Charles W Buenzli Jr
Ravi Rastogi
Kenneth Francis Sierzega
Maurice M Tayeh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Diagnostics Inc
Original Assignee
Applied Diagnostics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Diagnostics Inc filed Critical Applied Diagnostics Inc
Publication of WO1991000527A2 publication Critical patent/WO1991000527A2/fr
Publication of WO1991000527A3 publication Critical patent/WO1991000527A3/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2257—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using expert systems
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2836—Fault-finding or characterising
    • G01R31/2846—Fault-finding or characterising using hard- or software simulation or using knowledge-based systems, e.g. expert systems, artificial intelligence or interactive algorithms
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Evolutionary Computation (AREA)
  • Medical Informatics (AREA)
  • Health & Medical Sciences (AREA)
  • Quality & Reliability (AREA)
  • Artificial Intelligence (AREA)
  • Geometry (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

Une méthode et un appareil d'intelligence artificielle servant à localiser les défauts dans des unités électroniques comprennent une technique pour le modelage d'unités électroniques en terme de contraintes de comportement. Les contraintes de comportement façonnent les composantes du circuit en terme de variations de leurs sorties qui résultent des variations de leurs entrées. Ces variations connues comme des ''variations de phase'' peuvent être complétées par des contraintes de gain et de docilité pour façonner une unité électronique à tous les niveaux d'extraction fonctionnelle ou de décomposition. En plus d'une méthode universelle de modelage, les relations de contrainte de comportement fournissent une indication très précise de variations subtiles dans un circuit, pour la localisation ou le dépistage des défauts. Le dépistage des défauts se produit en appliquant une stratégie de retouche prédéterminée sur l'unité de contrôle qui est représentée par des contraintes de comportement. La stratégie de recherche commence avec une recherche hiérarchisée vers le bas. Quand un bloc défectueux est repéré, la recherche se dirige vers un niveau inférieur d'extraction fonctionnelle et recherche le prochain bloc inférieur ayant une sortie correspondant à la sortie du bloc du niveau plus haut. Si le prochain bloc du niveau plus bas n'est pas défectueux, des blocs adjacents sont explorés. Le test de l'unité électronique est amorcé selon l'essai de fonctionnement pour l'unité. Chaque essai de fonctionnement dans le plan d'essai de fonctionnement est associé avec un ou plusieurs blocs à un niveau d'extraction fonctionnelle. Quand un essai de fonctionnement échoue, le dépistage des défauts commence au niveau de l'extraction fonctionnelle et au niveau du bloc correspondant à l'essai de fonctionnement qui a échoué.
PCT/US1990/003809 1989-07-05 1990-07-05 Methode et appareil pour localiser les defauts dans unites electroniques Ceased WO1991000527A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US375,839 1989-07-05
US07/375,839 US5157668A (en) 1989-07-05 1989-07-05 Method and apparatus for locating faults in electronic units

Publications (2)

Publication Number Publication Date
WO1991000527A2 WO1991000527A2 (fr) 1991-01-10
WO1991000527A3 true WO1991000527A3 (fr) 1991-02-21

Family

ID=23482582

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1990/003809 Ceased WO1991000527A2 (fr) 1989-07-05 1990-07-05 Methode et appareil pour localiser les defauts dans unites electroniques

Country Status (2)

Country Link
US (1) US5157668A (fr)
WO (1) WO1991000527A2 (fr)

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WO2006039322A2 (fr) * 2004-10-01 2006-04-13 Wms Gaming Inc. Appareil de jeux de hasard avec interface utilisateur graphique de reproduction en fac-simile
US7302418B2 (en) * 2004-10-15 2007-11-27 Microsoft Corporation Trade-off/semantic networks
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US8572528B1 (en) * 2009-11-25 2013-10-29 Xilinx, Inc. Method and apparatus for analyzing a design of an integrated circuit using fault costs
JP5691723B2 (ja) * 2011-03-25 2015-04-01 富士通株式会社 監視方法、情報処理装置および監視プログラム
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Also Published As

Publication number Publication date
US5157668A (en) 1992-10-20
WO1991000527A2 (fr) 1991-01-10

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