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WO1987000370A1 - Systeme de bus de donnees serielles - Google Patents

Systeme de bus de donnees serielles Download PDF

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Publication number
WO1987000370A1
WO1987000370A1 PCT/GB1986/000372 GB8600372W WO8700370A1 WO 1987000370 A1 WO1987000370 A1 WO 1987000370A1 GB 8600372 W GB8600372 W GB 8600372W WO 8700370 A1 WO8700370 A1 WO 8700370A1
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Prior art keywords
sequence
serial data
signal
data network
code
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PCT/GB1986/000372
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English (en)
Inventor
Christopher Timothy Spracklen
Colin Smythe
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UK Secretary of State for Defence
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UK Secretary of State for Defence
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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0022—PN, e.g. Kronecker
    • H04J13/0025—M-sequences
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/0007—Code type
    • H04J13/0022—PN, e.g. Kronecker
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J13/00—Code division multiplex systems
    • H04J13/10—Code generation

Definitions

  • the invention relates to digital communications and in particular "to-serial data local area networks interconnecting multiple nodes.
  • serial data local area networks interconnecting multiple nodes.
  • parallel channels may be used.
  • the cost would be high and then a serial data highway is used.
  • Present day local area networks employing coaxial or fibre- optic cable linking the nodes of the network generally operate as time - division multiplex networks. These require each node to transmit at the full medium bandwidth even though the average data rate of a node way be considerably less than the medium bandwidth.
  • a 100-node Ethernet network for example, with a medium bandwidth of 10 M bits/sec, data is transmitted from each node at the 10 M bits/sec rate even though the average data rate for a node may be only 10 K bits/sec.
  • Future system bandwidth requirements may be higher than is possible with existing networks.
  • Raw pixel data for example may be required for transmission by such networks so that greater use of graphics may be made. Future demands may al30 include digital voice transmissions, adding to bandwidth require ⁇ ments.
  • the system constraint of present networks is the terminal hardware.
  • the transmission medium ie. the cables, is able to transmit data at many hundreds of megabits/sec.
  • node hardware is implemented using NMOS or CMOS technology. Assuming that the minimum circuit feature size in the foreseeable future will be ⁇ 1.5 microns, then the maximum clock rate of these circuits will be ⁇ *- * 21 MHz. Thus a network should be capable of handling data rates up to this clock rate to have a reasonably long future usefulness.
  • present networks do not allow simultaneous use of the network by different nodes. Control of access to the network is required and this lead3 to commun ⁇ ications delays and reliability problems.
  • a central controller may be employed, using a poll - response protocol technique. Relia ⁇ bility of this type of network can be improved by providing a duplicate controller to automatically take over on failure of the primary unit. Even here, the requirement for a controller is critical to the reliability of the system, particularly for example in a modern warship where survivability depends upon the communications network.
  • Other protocols may be adopted to control access to the medium eg. the node - distributed controller function as in the Litton - DPS system.
  • the object of the invention is to provide a serial data highway which overcomes problems associated with current networks.
  • the invention provides a serial data local area network system comprising a serial data highway interconnecting a plurality of transmitting/receiving nodes having transmitters and/or receivers connected thereto characterised in that each transmitter includes means to spread-spectrum modulate digital data signals and address said data signals and means to connect the baseband modulated signal to the highway and each receiver includes means to selectively demodulate the respective addressed signals from the received signal to reconstitute the data signals, the arrangement being such that multiple simultaneous data signals can be connected to the highway.
  • Preferably direct sequence spread spectrum modulation is used where the signal is modulo - 2 added to a pre-determined pseudo-random binary sequence.
  • the data transmission can either be asynchronous with respect to the code sequence clock, or synchronous, inwhich case the number of data bits transmitted for each sequence period is restricted by the process gain and the system threshold.
  • a locally generated identical pseudo-random number sequence is synchronised with the incoming spreadspectrum signal to demodulate the transmitted data.
  • a plurality of orthogonal pseudo ⁇ random number sequences is used, each number sequence serving to characterise.the required
  • the orthogonal codes are chosen to have low cross-correlation and high auto-correlation coefficients, the number of psuedo-random bits used to modulate each data bit determining the spreading of the bandwidth of the original signal.
  • CDMA Code Division Multiple Access
  • the codes are generated by a maximal length code generator (m-sequence) .
  • Data bits can be synchonised by detecting the all "1"s state of the m-sequence generator and starting a data bit at that time.
  • a cyclic counter may be used to determine the start of subsequent data bits.
  • the system can be arranged to operate in a number of modes by appropriate use of different pseudo-random number sequences: each sequence forming a pseudo-random number (pn) code.
  • pn pseudo-random number
  • a transmitting node uses the pn code appropriate to a selected destination node.
  • Each receiver in the network is then provided with a correlator programmed to search for the pn code associated with its own address.
  • the receiver is provided with a stack of pn codes and the receiver correlator constantly searches for correlations with the pn codes in the stack.. *
  • each code in the stack of a particular user repre ⁇ sents the source or type of transmitted message which will be accepted.
  • the correlator output is connected to a demodulator arranged such that when the correlator determines that a transmitted pn code is in phase with one of the locally generated pn codes, the demodulator then decodes the signal data.
  • a threshold detector is connected to the correlator output.
  • an adaptive threshold detector is used, the threshold level being adjusted in dependence upon the number of simultaneous spread spectrum signals on the network.
  • a coded signal When a coded signal is to be demodulated by a receiver, other simultaneous signals present on the network will appear as random S noise: producing a variable background signal upon which the required binary coded signal is superimposed.
  • a limiter is provided at the input to the receiver such that a binary signal is presented to the 'correlator.
  • the threshold of the limiter is also adjusted in dependence upon the number of simul ⁇ taneous spread spectrum signals on the network.
  • each data bit - is in the range 10 to 10 .
  • the signal-to-noise ratio of a single node in the absence of other user should be in the range 7dB to 10dB.
  • the efficiency of the spread spectrum system can be maximised by making provisions for changing the length of the code sequences u ⁇ ed in dependence on the number of active u ⁇ ers.
  • the correlator may be freed to search for other pn codes.
  • parallel decoding may be adopted or codes may be assigned priorities.
  • the local pn code generator is prefer ⁇ ably driven by an accurately controlled frequency source such that once the correlator detects the appropriate incoming pn code, the correlator is no longer required to track the incoming spread ⁇ spectrum sequence.
  • the local receiver clock timing may be synchron ⁇ ised with the received spread spectrum signal by oversampling the signal to derive the required timing information.
  • codes for example linear,- non-linear, Gold codes, Kronecker sequences, Bent codes, Walsh functions.
  • the length of code may be selected to suit a particular network. For good corre ⁇ lation properties and ease of generation "maximal" length pseudo- noise sequences (m-sequences) are preferably used.
  • Figure 1 is a block diagram of a serial data highway
  • Figure 2 is a schematic diagram of a spread spectrum serial data highway according to the invention
  • Figure 3 shows a shift register generator for a 127-bit m- sequence
  • Figure 4 shows in more detail a functional block diagram of a spread spectrum transmitter
  • Figure 5 shows a functional block diagram of a spread spectrum receiver
  • Figure 6 illustrates a received signal waveform
  • Figure 7a) and 7b) illustrates the sampling used in the determination of the received bit
  • Figure 8 is a schematic block diagram of the network including receiver circuits for determining the bit sequences
  • Figure 9 is a logical block diagram arrangement of a multi-node spread spectrum local area network (SS LAN) ;
  • SS LAN multi-node spread spectrum local area network
  • Figure 10 is a block diagram illustrating inmore detail a node control arrangement.
  • Figure 11 is a detailedblock diagramof anode receiver.
  • FIG 1 shows a local area network (LAN) comprising a serial data highway 10 having a plurality of nodes 11 to which input/output devices can be added such as the transmitter/receivers (T/R) 12 shown.
  • Figure 2 is a schematic arrangement of transmitter and receiver to illustrate the basic principle of a serial date highway according to the invention.
  • An input signal 20 for transmission is connected to a digitiser 21, and the digitised output signal is modulo - 2 add (22) to the binary output from a pseudo-random noise (pn) number generator 23.
  • pn pseudo-random noise
  • the baseband output from the modulo - 2 adder 22 is connected via a transmitter 24 onto the LAN which may be a screened coaxial cable or a fibre optical cable.
  • the code sequence from the pn generator 23 is selected from one of a family of sequences possessing high auto ⁇ correlation and low cross-correlation properties. This sequence candefine a uniquemessage address.
  • a remote receiver includes a detector 26 connected to the LAN 25 and a local pn generator 27, producing an identical code sequence to the transmitter sequence from the pn generator 23.
  • the received signal is continuously correlated to the local pn sequence in a synchroniser/demodulator 28.
  • On acquiring synchronism the outputs from the detector 26 and the local pn generator 27 are compared, bit by bit, to demodulate the embedded data signal.
  • the demodulated digitised signal is then decoded (29) to reconstruct the original signal.
  • the receiver synchroniser/demodulator can discriminate between a message which is "addressed ** to that receiver
  • the spreading of the bandwidth depends upon how many pseudo-random binary digits are used to modulate each data bit and is well known, determines the process gain which is applied at the receiver to discriminate against other signals.
  • the spread spectrum approach to a local area network is a form of code division multiple access (CDMA) and allows multiple users access to a common medium without fear of contention or access delay. Furthermore, each node is allowed to transmit continuously, if it wishes, at whatever data rate it chooses, rather than having to gather up incoming data into packets for bursting onto the network.
  • the system can be operated in a number of different modes. a. Point-to-Point Mode.
  • the pn code used to modulate the incoming data sequence forms the effective 'address' (either source or destination). Consider a particular pn code to be associated with a particular node (although this is, in fact, not the case).
  • the transmitting node uses a pn code appropriate to the destination node.
  • the correlator which is being used to search for suitable incoming data, will be programmed to look for the pn code that it associates with its own address.
  • the system will be arranged such that the correlators of each receiver are continuously searching through a 'stack' of pn codes supplied to them by an associated control unit.
  • These codes constitute the addresses of the incoming messages that the receiver will accept.
  • One of these codes will be the receiver's own code, which it uses to detect incoming point-to-point messages.
  • the correlator When the correlator has determined the 'phase' of the incoming pn code in relation to the local pn code generator (if indeed the code is being used on the medium) it passes this information to a demodulator, which then decodes the data and passes it to the control unit (a microprocessor based unit that is arranged to handle higher protocol layers). The correlator is then 'freed' to search for other pn codes (either higher priority messages or messages that may be decoded in paral ⁇ lel). After achieving 'lock' with the local pn code, the correlator is not required to 'track' the incoming sequence since the pn generators are provided with sufficient frequency stability to maintain lock.
  • a transmitter uses its own associated pn code to modulate the data. This is effectively tagging the data with the source address. Broadcasting is used to transfer data to a number of terminals in parallel, and is used in a situation where the transmitter may not be aware of which receivers wish to accept data of this type. The receivers load their own pn code stack with the addresses of those nodes from which they would like to receive data.
  • a radio spread spectrum system is also subject to man-made and natural inter ⁇ ference, often of an impulsive (and hence broadband) nature, as well as narrow-band effects. Because the present invention uses a screened medium (co-axial or twisted pair) or optical fibres, it is not subject to such effects.
  • direct sequence modulation is used with the baseband information being added (modulo - 2) to a digital code sequence whose bit rate is much higher than the infor ⁇ mation signal bandwidth. This results in spreading the signal energy over a bandwidth equal to twice the systems code clock rate.
  • m-sequences For good correlation properties and ease of generation, 'maximal' length pseudo-noise sequences (m-sequences) may be used.
  • Binary pseudo-noise (pn) sequences (which are also called shift register sequences or m-sequences) are the basis for direct sequence spread spectrum implementation. These imply a deterministic string of binary digits that repeat only after a relatively long period and have statistical properties similar to those of true random numbers.
  • Figure 3 shows a conventional 7-stage (30) shift register generator for a 127 - bit m-sequence with a feedback term formed by the modulo - 2 addition (3D of the first and last stages (D1 and D7).
  • the code at the output 32 is cyclic with a total period 127 times the clock rate.
  • a property of m-sequences which is exploited in the present multiple correlator system is that the modulo-2 addition of a maximal code and a cyclic shift of itself is another replica with a phase shift different from either of the originals.
  • One approach would be to use a microprocessor simulation of a linear feedback shift register, ie. only exclusive - OR connections appearing in the feedback logic.
  • the contents of the shift register (code sequence) could be stored in one register.
  • the feedback coefficients to each register location could be stored in a second register.
  • the corre ⁇ sponding feedback bit in the feedback register is set to one, otherwise the feedback word bit contains zero.
  • feedback coefficients must be added with the shift register content, and the number of binary ones U counted.
  • FIG. 4 illustrates an alternative transmitter arrangement using a parallel implementation to allow fast - generation of m- sequences.
  • a high speed RAM 40 stores the current code sequence addresses of users on the network.
  • the RAM 40 is controlled by means of a 68000 microprocessor 41 so as to be able to change the current code sequences, for example by altering code addresses or allocating a new code sequence for a new user added to the network. Address information is connected via input 42 to the microprocessor.
  • Data for transmission is connected to a buffer 43 which receives sychronising signals from a connection 44 from the microprocessor such that the data can be synchronously added to the appropriate code sequence at the output 45 from the high speed RAM 40.
  • the output 45 is connected to a detector 46 responsive to a selected binary sequence (eg. the all "T's) which occurs once in the course of a complete cycle of any of the stored m-sequences.
  • the detector 46 produces an output signal which is used to zero a synchronous counter 47 connected to the microprocessor 41.
  • the synchronous counter 47 is used to provide the read out addresses in the high speed RAM 40 and also to provide the source of synch ⁇ ronous pusses for the data stream.
  • the binary data at the output from the buffer 43 are modulo - 2 added (48) to the code sequence.
  • Parallel implementation of the code sequences allows very fast code generation while still retaining the flexibility to change codes at will.
  • Further address lines of the RAM may be used to select the appropriate sequence.
  • the modulo - 2 addition of code and data is called sequence inversion keying (SIK). This has the effect of inverting the code each time a transition occurs in the data stream.
  • SIK sequence inversion keying
  • FIG. 5 illustrates a more detailed receiver for the spread spectrum network.
  • the receiver pn generator 51 is controlled by a microprocessor 52 to generate any of the code sequences currently in use. These current codes are held in a code stack 53-
  • the receiver pn signal is loaded into one serial input 54 of a polarity coin ⁇ cidence correlator 56 and frozen there.
  • the multi-level signal at the receiver node 56 is analysed by an estimator circuit 57 to give an estimate of the number of user signals on the LAN. This number is then used to set the threshold of a hard limiter 58 acting on the received code data connected to a second input 59 to the correlator 55.
  • the output from the limiter 59 to the correlator 55 slides past the stationary local sequence with a complete cross correlation being performed at each chip period.
  • a correlation threshold is passed, as measured by a dis ⁇ criminator 60 connected to the microprocessor 52, the local pn sequence is again shifted through the correlator 55 so as to remain in synchronism with the incoming coded data. If no correlation peak is detected then no signal i3 transmitted from the discriminator 60 to the input 61 to the microprocessor 52. Then the microprocessor is programmed to assume that the current code sequence is not in use on the network and the following sequence in the code stack 53 is loaded into the correlator 55.
  • the coded data and the code sequence pass through the correlator 55 in synchronism to respective inputs of a demodulator 62.
  • the output 63 from the demodulator carries the binary coded data signal which can then be decoded to reconstruct the transmitted message.
  • the conventional problems of initial signal acquisition (or synchroni ⁇ sation) and the subsequent tracking of the signal for demodulation are resolved in the present invention using the digital correlation technique ie a continuous data acquisition is performed in the correlator using the correlation discriminator to indicate signal acquisition.
  • the invention is baseband in nature but demodulation is carried out by a method known as "integrate and dump". At any time the network may have k simultaneous users.
  • Figure 6 illustrates the form of the multilevel signal that will be received from the network.
  • the signal varies between the limits +nV and -nV where n is the total number of transmitting nodes and V is the signal voltage which may be positive or negative for a logical "1" or "O".
  • the signal is the sum of the number of nodes transmitting a "1", A(t) , and the number of nodes transmitting a "0", -B(t) , ignoring the effect of noise.
  • FIG. 7a shows how the correct sequence is recovered from a binary waveform whose sequence rate is correct, but whose phase is non-alignedwith the sampling periods.
  • the case illustrated in Figure 7b) is similar to that in a) , but the sequence rate is slightly faster than the nominal value, resulting in a phase shift of the recovered sequence, which is nevertheless still correct.
  • FIG 8 illustrates the circuit arrangement for sampling and processing the received signal.
  • the transmitted signal 101 formed by the modulo-2 addition (102) of data (103) and code sequences (104) has added signals from other transmitters 105 as well as noise 106 to produce the composite input signal 107 to the receiver 108.
  • the input signal 107 is sampled by the 1 bit A/D converter 109 at a rate nominally twice the bit rate of the transmitted signal 101.
  • In Figures 7a and 7b sampling is done at times indicated by the vertical lines 110 on an example data sequence "00111100110".
  • the data period Ti is exactly twice the sample peried 111 while in Figure 7b the sample period 111 is slightly more than half the data period T2-
  • the signal samples are collected in groups of three and a majority voting circuit 112 gives the received signal bit which is connected to the input of a slidingpolarity coincidence correlator 114. Locally generated code sequences (105) are also placed sequentially into the correlator 114. When a match occurs, the data signal 103 is recovered and dumped into the data sink 116.
  • the sliding polarity coincidence correlator 114 performs a continuous acquisition on the data stream, and so no tracking circuitry is necessary.
  • the correlator works by continuously comparing the local sequence with the input stream and counting the number of agreements (A) or disagreements (D) that occur over the entire sequence length (L) .
  • a calculator 117 calculates the value of their difference divided by the sequence length ((A-D)/L) . Thesevalues are updated each time a new data bit is read in. If the (A-D)/Lvalue exceeds a lower one of a pair of threshold values in a threshold circuit 118, synchronisation is assumed. If the upper threshold is exceeded, then a logical '0' is passed to the data sink.
  • a '1' is passed on if the lower threshold boundary is exceeded. This is because of the modulo-2 addition of the sequence and data at the transmitter, resulting in the sequence itself on adding '0* and the sequence's complement on adding '1' .
  • the reception of data modulated on any other code sequence results in the value of (A-D)/L being within the threshold values and so no data is fed to the correlator. The calculation of this threshold value is dependent on a number of factors as is discussed elsewhere.
  • An improvement in the bit error performance of the 1-bit receiver of Figure 8 is possible by increasing the quantisation of the input waveform.
  • Two methods for doing this are possible.
  • the first involves the use of multibit A/D converters.
  • a converter providing n bits of data identifies n ⁇ signal levels and n parallel correlators are used to correlate the binary signal from the different data bits in the n-bit word.
  • the results from these are then combined, using appropriate weighting factors for the most significant bits, to obtain the data bit.
  • the second method involves the introduction of a dither signal to the received signal, which helps when regulated noise is present on the line.
  • the first method can improve performance by ablut 10-20%, but at great additional complexity and hardware expense.
  • the particular benefits obtained from the second method are obtained with less additional complexity at the receiver.
  • a single code sequence is taken from the code stack according to the type of transmission required eg point-to-point, broadcast or selected receiver groups.
  • the selected code is then used to modulate the data for transmission.
  • Receivers not using the same code sequence will receive a signal appearing as noise.
  • a receiver can be arranged to listen in paral ⁇ lel to a selection of codes. This enables the receiver to operate a priority scheme such that messages of higher priority take prece ⁇ dence over those of lower priority.
  • an interrupt message which arrives sequentially in the conventional LANs can be processed immediately in the spread spectrum network.
  • the present invention uses the concept of code division multiple access (CDMA) involving a trade-off between bandwidth and signal-to-noise for a fixed channel capacity and the sharing of this channel bandwidth between a number of simultaneous users.
  • CDMA code division multiple access
  • Time dependent tranmissions as used in other known forms of CDMA are not used.
  • the spectral compression by the receiver corre ⁇ lation process is able to discriminate against impulsive noise and multi-path signals on the network.
  • R d R. c /(mL) (1)
  • R is the code sequence rate
  • m is the number of sequences per data bit
  • L is the code sequence length
  • *mL' is defined as the process gain. If the number of simultaneous users is K, then the network-wide data throughput (R fcot ) is given by equation (2), provided all the users transmit with the same R , L and m.
  • the quantity SNR is now used in the definition of the proba ⁇ bility of error (P ) and the BER.
  • the probability of error is defined by equation (8) where I is the standard Gaussian cumulative distribution function which provides a good approximation for the real probability of error.
  • Equation (4) shows that the DDF is inversely proportional to the processing gain and it is usually the case that a higher proces ⁇ sing gain permits a larger number of simultaneous users, but at the c expense of a lower point-to-point data rate. It is important to note that the DDF is affected by three factors which can be traded off against each other to provide appropriate operating conditions. A larger number of simultaneous users implies more pn chips per data bit which, for given hardware, implies a lower point-to-point data -
  • the SNR at the output of the receiver improves if the signal level at the transmitter is increased.
  • the SS LAN equation (7) can be used to show 0 that there is a limiting effect on the multiple user SNR. This is because the DDF has a limited SNR resolution ability and once that limit is passed no increase in the signal level will improve the receiver output SNR.
  • the thresholds are set at 5dB and 7dB respectively.
  • the SNR can achieve a value approaching the single user SNR by using a low enough DDF.
  • the BER and the probability of error are related, as shown in equation (9), by the point-to-point data rate. It can be shown that the advantage to be gained in Pe against SNR from improving the DDF 0 gradually diminishes. Clearly there will be some optimum value to be chosen for the DDF to be used in practice. In addition, the probability of error Pe increases dramatically for a specified SNR- as the DDF is worsened. The limiting effect of the probability of error indicates that a value for SNR. of greater than 7dB is most 5 desirable.
  • the DDF should be in the range 10-4 to 10-2.
  • the single user SNR- should be in the range 7dB to 10dB which, if coupled with the lower values of DDF, will give a multi-user SNR approaching that of the single user.
  • c. To keep the efficiency of the network as high as possible all nodes should be transmitting. If this is not the case then the length of the code sequence should be altered so as to reflect the change in the number of active nodes. In general this will lead to a reduction in the length of the pn sequence and a corresponding rise in the bandwidth available to each node, given that the chip rate at each node is fixed.
  • Each work station 65 is composed of four sections: the user devices (66.-66-), the Spreadnet Inter- face Logic (SIL) 67, the Spread Spectrum Node Controller (SSNC) 68 and the Spread Spectrum Asynchronous Receiver and Transmitter
  • the SIL 67 converts the general SS-LAN interface into a form useable • by particular devices and is therefore host device dependent.
  • the SNL 70 module wa ⁇ designed in two sections so that each workstation could be provided with an efficient parallel processing capability while still maintaining a flexible interface.
  • the SSNC 68 is responsible for control of the individual nodes and the overall network management - this includes the distribution of the codes, reconfiguration of the LAN and the logical-to-physical mapping of user requests to SSART 69 availability.
  • the SSART 69 performs the physical transmission and reception of the data, provides low level error detection and correction, and implements the data link level protocols necessary for the individual communication links.
  • Each SSART 69 is a node in the generally accepted definition of the word
  • the common modular SSNC 68 comprises a microprocessor 71 , a ROM 72 containing fixed system information and a RAM 73 for storing programmable system information.
  • a multiplexor 74 is connected between the microprocessor 71 and an input/output connection 75 to a SIL 67 for each device.
  • Each multiplexor 74 is also connected to an input/ output connection 76 for connection to respective SSARTs 69.
  • Each SSART 69 includes a microprocessor 77 connected to a RAM 78 and a ROM 79 and a transmitter 80 and receiver 81.
  • the transmitter is connected to the LAN via an amplifier 82 to launch the binary coded spread spectrum signal.
  • the physical transmission of the signal is either by a raised cosine pulse for a co-axial cable medium or directly by means of optical fibres.
  • the receiver 81 has a hard limiter 83 at its input to convert the signal on the LAN to a binary form. .
  • All requests for the establishment of virtual communications links must be received by the SSNC-CP ⁇ 71. This will in turn either allocate a free SSART 69 or, should none be available, queue the request and inform the host.
  • the SSNC 68 can also request its own virtual link - this is necessary when network management information must be circulated to other SSNC's.
  • the SSNC-RAM 73 contains the updated code distribution mapping tables, the SNL activity tables and other general SNL and network wide housekeeping information.
  • the SSNC 68 is responsible for the self-testing of the SNL's, followed by the current status of the network. It then announces the presence of the newly available nodes to the rest of the network and gathers appropriate information regarding the codes in use and the time.
  • the SSNC 68 informs all other SSNC's of its controlled termination in an attempt to leave the other SSNC's with an accurate and consistant image of the network configuration.
  • the SSART 69 requests the code generation parameters from the SSNC-CPU 71 and stores them in the SSART-RAM 78. Either the transmitter or receiver will be activated and the appropriate code sequence is taken from - the RAM 78 and stored in either the correlators (receive function) or the encryptors (transmit function). In many cases this informa ⁇ tion may already be available in local RAM associated with either the correlators or the encryptors - since the SSNC 68 is arranged such that it attempts to predict the next code sequences to be used 0 and stores them in a code cache.
  • codes may then be accessed by simple pointer operation - no actual transfer of code data being needed - thus speeding the access time.
  • Actual modulation of the data to be transmitted, or demodulation of the received data is handled by dedicated hardware (a custom-programmed logic array), leaving the SSART-CPU 77 free to co-ordinate further data transfers.
  • the transmitter operates at a code sequence rate of 12 MHz with a fixed sequence length of 127 bits using linear codes.
  • Figure il is a schematic diagram of this receiver hardware.
  • the heart of the receiver is a pair of TRW 64-bit correlator-chips 84 connected in series. These devices each contain two 64-bit shift registers, the appropriate exclusive-OR gates and a high speed look-ahead adder (to generate the correlation coefficient).
  • the SSNC 68 loads the upper correlator shift register via a field programmable logic array (FPLA) 85 with a copy of the pn sequence for which the receiver wishes to search.
  • FPLA field programmable logic array
  • the FPLA control logic allows data 86 from the network via a sampling circuit 87 and a limiter 88 into the correlator 84. As this data 86 is 'clocked through' the correlator 84 it effectively slides past the resident sequence. At each clock period the look-ahead adder computes the correlation coefficient between the resident sequence and the sliding sequence. In general the two sequences will not be in step and so the correlation coefficient will be low. However, eventually the output from the look-ahead adder will exceed the threshold of a programmable threshold detector 90 to indicate that the sequences are in step and will show either a maximum (data was logic '1') or a minimum (data was logic '0'). This data is assem ⁇ bled into 16-bit words by the FPLA (85) control logic and then 2 * 2- placed into a buffer 89 where the SSNC 68 is able to access it via the FPLA 85.
  • the sampling circuit 87 operates in real time to derive an appropriate threshold for the limiter 88 such that the data is converted to a binary form suitable for connection to the correlator 84. Exten ⁇ sive, simulations have shown that the correlation threshold of the detector 90 must be changed in real time since the correlation coefficient between two identical sequences falls off relative to the background noise as the number of users increases. This task is also handled by the SSNC 68 via the FPLA 85.
  • the sampling circuit 87 is arranged to over-sample the incoming data 86 to derive time signals to synchronise the correlator clocks with the incoming data.
  • any LAN there are many more nodes connected to the medium than are trying to communicate at any one moment.
  • the medium bandwidth available the maximum number of nodes able to transmit simultaneously and the data rate as discussed earlier. If a large number of nodes wish to transmit simultaneously then the bandwidth available to each will be relatively small.
  • each node In order to effectively utilise the available medium bandwidth each node must employ a long pn sequence - thi3 also facilitates the recovery of that node's signal from amongst the large number of other signals. If only a small number of nodes wish to use the network they have access to a correspondingly larger bandwidth each and so only a short pn sequence will be required.
  • each node in the spread spectrum network has the capa ⁇ bility of receiving and decoding multiple data streams simulta ⁇ neously it is arranged to allocate one channel per node for handling channel management functions.
  • Each node makes known its own code and determines the current usage of pn codes on the network via this channel.
  • a node Before a node establishes a code for use on the network it monitors the network to see whether or not such a code is currently in use. This can be achieved by rapidly loading the local corre ⁇ lator with a copy of the code being tested and by observing whether or not there is significant correlation. If the code is not cur ⁇ rently in use then its value may be communicated to the intended destination node by means of the cryptographic system mentioned earlier.
  • the management channel is used to perform real-time updating of the pn sequences in use on any virtual link. This significantly improves the security of the system and also allows the network to adapt dynamically to load changes. If a ndde finds that a queue of data is waiting to be sent over the network, then it will attempt to increase the rate at which it is sending the data by shortening the pn sequence being used. This can only be accomplished if the number of nodes currently using the system is below a critical level which each node is constantly monitoring.
  • a node may find that it is required to lengthen the code sequence that it is currently using in order to be able to operate in the deteriorating signal-to-noise environment. This in turn will require that node to reduce its data rate and consequently a queue of data may start to build up at a node. If the usage of the network should subsequently reduce then nodes will be able to increase their data rate propor ⁇ tionally.
  • each receiver In order to perform real-time code updating, each receiver must maintain at least one free code channel that can be made available to management functions. This ensures that a smooth changeover can be made from the old pn sequence to the new with no loss of data or comprising of the system integrity.
  • the transmitter informs the receiver of the new code to be employed by use of the techniques already described.
  • the receiver then loads the new pn code into a spare channel and waits for the data being received by the old pn sequence to finish. Simultaneously it should start to receive data on the new channel.
  • the use of the spare channel avoids the problems associated with the finite time required to load the correlators with a new sequence and avoids any reduction in the date throughput while code changeover occurs. Such changeovers are co-ordinated by the management soft ⁇ ware, and only one spare channel is needed per node - irrespective of the number of parallel data channels that node contains.
  • the node management is also able to effect a code chaneover, albeit with a small delay- while the code is loaded into the correlator.
  • the receiver monitors the data on the 'old' channel. When this data terminates, it simply reloads the correlators with the new pn sequence and continues demodulation of the data.
  • the transmitter is made aware of this situation (via the network management) and allows sufficient time, after pn code changeover, for the receiver to re-load its corre ⁇ lators with the new sequence. This is because, at the transmitter, the SSNC only needs to perform a pointer change in the SSART RAM to effect the code change.
  • the FPLA logic control ⁇ ling the SSART and can occur within a chip period - thus there is no pause whatsoever as the code changeover occurs. If the receiver cannot handle this situation (because it has no spare channel) then the SSNC calculates how long it will require the receiver to change over codes (it knows the new code length and so can easily calculate this time) and will instruct the FPLA to place a delay in the code changeover.
  • the present invention has been described in relation to direct sequence linear code sequences. Other sequences having the appro ⁇ priate correlation properties may be employed. Other modifications of the embodiments described will be apparent to those skilled in 2.-0 the art, all falling within the scope of the present invention. Because of its good immunity to medium interference (multipath and impulsive noise) the spread spectrum LAN is suitable, for example, for use in domestic control systems interconnected via the electric mains. The system could also be used for remote reading of domestic or other meters via the mains.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)

Abstract

Un système de réseau local de données sérielles comprend un bus (10) de données sérielles qui interconnecte une pluralité de noeuds émetteurs/récepteurs qui lui sont connectés. Chaque émetteur comprend un dispositif (22, 23) qui module les signaux (21) de données numériques par diffusion du spectre et adresse lesdits signaux et un dispositif (24) qui connecte les signaux modulés de la bande de base au bus. Chaque récepteur comprend des dispositifs (26-29) qui démodulent sélectivement les signaux adressés respectifs du signal reçu afin de reconstituer les signaux de données, de sorte que des signaux multiples de données peuvent être simultanément connectés au bus. On utilise de préférence une modulation par diffusion du spectre à séquence directe avec un code sélectionné dans un groupe de codes orthogonaux. Chaque code forme alors une adresse de noeud ou de zone, ce qui permet d'établir des communications diverses, par exemple point à point, de multidiffusion, de zone sélectionnée, prioritaire, etc. Le signal reçu est suréchantillonné (110, 113) et converti en un signal binaire pour que l'on en dérive la séquence reçue et pour synchroniser la cadence du récepteur. Chaque récepteur peut comprendre une pile (53) de codes d'adressage qui sont successivement fournis à un corrélateur (114) à polarité variable à travers lequel passe la séquence. Un dispositif peut être ajouté pour modifier la longueur des séquences de codage en fonction du nombre d'utilisateurs actuels.
PCT/GB1986/000372 1985-07-01 1986-06-25 Systeme de bus de donnees serielles Ceased WO1987000370A1 (fr)

Applications Claiming Priority (2)

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GB8516581 1985-07-01
GB858516581A GB8516581D0 (en) 1985-07-01 1985-07-01 Serial data highway system

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WO1987000370A1 true WO1987000370A1 (fr) 1987-01-15

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US8213485B2 (en) 1996-05-28 2012-07-03 Qualcomm Incorporated High rate CDMA wireless communication system using variable sized channel codes
CN110658930A (zh) * 2014-05-12 2020-01-07 株式会社和冠 计算机可读的非暂时性存储介质、方法和手写笔

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Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396515A (en) * 1989-08-07 1995-03-07 Omnipoint Corporation Asymmetric spread spectrum correlator
AU644113B2 (en) * 1989-11-07 1993-12-02 Daikin Industries, Ltd. Data transmission methods and apparatus, data processing apparatus and a neural network
US5423001A (en) * 1989-11-07 1995-06-06 Daikin Industries, Ltd. Data transmission and apparatus, data processing apparatus and a neural network which utilize phase shifted, modulated, convolutable pseudo noise
EP0428046A3 (en) * 1989-11-07 1992-07-01 Daikin Industries, Limited Data transmission methods and apparatus, data processing apparatus and a neural network
EP0777352A1 (fr) * 1989-11-07 1997-06-04 Daikin Industries, Ltd. Dispositif de traitement de données et un réseau neuronal utilisant ces dispositifs
US7120187B2 (en) 1991-06-03 2006-10-10 Intel Corporation Spread spectrum wireless communication system
CN1074620C (zh) * 1993-06-30 2001-11-07 卡西欧计算机公司 扩展频谱通信系统及方法、该系统中的发送站和接收站
EP0722636B1 (fr) * 1993-10-04 2006-04-12 Nokia Corporation Procede d'amelioration de la qualite de signaux par ajustage du rapport d'etalement dans un systeme cellulaire de radiotelephonie de type amdc
EP0652647A1 (fr) * 1993-11-10 1995-05-10 Alcatel Mobile Communication France Procédé de construction d'un code d'étalement associé à un utilisateur d'un système de transmisssion numérique à accès multiple par répartition par codes et à séquence directe, et procédé correspondant de génération d'un tableau
AU683694B2 (en) * 1993-11-10 1997-11-20 Alcatel N.V. A method of generating a spread code
US5559829A (en) * 1993-11-10 1996-09-24 Alcatel Mobile Communication France Method of constructing a spreading code associated with one user of a direct sequence code division multiple access digital transmission system and corresponding method of generating a table
FR2712444A1 (fr) * 1993-11-10 1995-05-19 Alcatel Mobile Comm France Procédé de construction d'un code d'étalement associé à un utilisateur d'un système de transmission numérique à accès multiple par répartition par codes et à séquence directe, et procédé correspondant de génération d'un tableau.
US8588277B2 (en) 1996-05-28 2013-11-19 Qualcomm Incorporated High data rate CDMA wireless communication system using variable sized channel codes
US8213485B2 (en) 1996-05-28 2012-07-03 Qualcomm Incorporated High rate CDMA wireless communication system using variable sized channel codes
US6947469B2 (en) 1999-05-07 2005-09-20 Intel Corporation Method and Apparatus for wireless spread spectrum communication with preamble processing period
WO2003094380A1 (fr) * 2002-04-30 2003-11-13 Qualcomm Incorporated Generation pseudo-aleatoire basee sur la memoire rom pour communications sans fil
CN100350754C (zh) * 2002-04-30 2007-11-21 高通股份有限公司 在正交接收机内的幅度和相位不平衡校准和补偿
US6937643B2 (en) 2002-04-30 2005-08-30 Qualcomm Inc ROM-based PN generation for wireless communication
CN110658930A (zh) * 2014-05-12 2020-01-07 株式会社和冠 计算机可读的非暂时性存储介质、方法和手写笔
CN110658930B (zh) * 2014-05-12 2023-08-11 株式会社和冠 计算机可读的非暂时性存储介质、方法和手写笔

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