[go: up one dir, main page]

US20230410722A1 - Driving structure for display panel - Google Patents

Driving structure for display panel Download PDF

Info

Publication number
US20230410722A1
US20230410722A1 US18/091,819 US202218091819A US2023410722A1 US 20230410722 A1 US20230410722 A1 US 20230410722A1 US 202218091819 A US202218091819 A US 202218091819A US 2023410722 A1 US2023410722 A1 US 2023410722A1
Authority
US
United States
Prior art keywords
driving
drivers
enable
group
architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
US18/091,819
Inventor
Chung-Hsin Su
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sitronix Technology Corp
Original Assignee
Sitronix Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sitronix Technology Corp filed Critical Sitronix Technology Corp
Priority to US18/091,819 priority Critical patent/US20230410722A1/en
Assigned to SITRONIX TECHNOLOGY CORP. reassignment SITRONIX TECHNOLOGY CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SU, CHUNG-HSIN
Publication of US20230410722A1 publication Critical patent/US20230410722A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0452—Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0204—Compensation of DC component across the pixels in flat panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto

Definitions

  • the present application is related to a driving architecture, in particular to a driving architecture for a display panel.
  • FIG. 1 shows a schematic diagram of the driving architecture according to an embodiment of the prior art.
  • the driving architecture according to the prior art is used for driving a display panel 10 to display images.
  • the driving architecture comprises a controller 1 , N rows of drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N, and enable signal lines 3 .
  • N rows of drivers and the controller 1 are used to illustrate the driving architecture according to the prior art.
  • the controller 1 is coupled to and controls the N rows of drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N.
  • the controller 1 may be an independent chip.
  • Each row of drivers includes a plurality of drivers.
  • the first row includes a plurality of drivers 2 _ 1 ;
  • the second row includes a plurality of drivers 2 _ 2 , and so on.
  • the drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N disposed on the same column are mutually coupled.
  • the drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N disposed on the same column are mutually coupled by signal lines for transmitting pulse-width modulation (PWM) signals, input data (Din), clock signal (DCK), and enable signal (Enable).
  • PWM pulse-width modulation
  • the enable signal lines 3 are used as an example for illustration.
  • the controller 1 sends the enable signal via the enable signal line 3 to the drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N disposed on the same column.
  • the display panel applying this driving architecture needs to include scan lines, which will increase the complexity of the structure of the display panel.
  • the amount of the drivers 2 _ 1 , 2 _ 2 , . . . , 2 _N disposed on the display panel 10 may be massive. If each driver is directly connected to the controller 1 by the enable signal line 3 , there will be extremely numerous signal lines.
  • the enable signal will not be transmitted to next one of the drivers, thereby, leading to failure of subsequent drivers by receiving no enable signal, the corresponding display elements also may not be driven.
  • the present application provides a driving architecture for display panel that may solve the above technical problem and simplify the structure of display panel.
  • An objective of the present application is to provide a driving architecture for a display panel, in which the driving architecture comprises a plurality of drivers and a plurality of driving groups.
  • Each driver includes an enable input terminal and is coupled to at least one display element of the display panel.
  • the driving groups are disposed on the display panel and mutually coupled in series.
  • the present application provides a driving architecture for a display panel, in which the driving architecture comprises a plurality of driving groups, which are disposed on the display panel and mutually coupled in series.
  • Each driving group includes the drivers.
  • the enable input terminals of the drivers of the at least one driving group are mutually coupled for mutually transmitting an enable signal.
  • the drivers are driven by the enable signal.
  • FIG. 1 shows a schematic diagram of the driving architecture according to an embodiment of the prior art
  • FIG. 2 shows a schematic diagram of the driving architecture according to an embodiment of the present application
  • FIG. 3 shows a block diagram of the drivers and the display elements according to an embodiment of the present application
  • FIG. 4 shows a block diagram of the drivers in FIG. 3 according to an embodiment of the present application
  • FIG. 5 shows a schematic diagram of the driving architecture according to an embodiment of the present application
  • FIG. 6 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • FIG. 7 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • FIG. 2 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • the driving architecture according to the present application is used for driving a display panel 10 to display images.
  • the driving architecture comprises a controller 20 and a plurality of driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N.
  • the controller 20 is coupled to the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N.
  • Each of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N includes a plurality of drivers 30 _ 1 , 30 _ 2 , . . . , respectively.
  • the driving group 100 _ 1 includes a plurality of drivers 30 _ 1 ; the driving group 100 _ 2 includes a plurality of drivers 30 _ 2 , and so on.
  • the arrangement direction of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N is different from the arrangement direction of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N.
  • the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N disposed on the same column are coupled in series.
  • N rows of driving groups and N rows of drivers are adopted for illustrating the driving architecture of the present application.
  • the display panel 10 is a mini-LED or micro-LED display panel. Nonetheless, the driving architecture according to the present application is not limited to the above two types of display panel.
  • FIG. 3 shows a block diagram of the drivers and the display elements according to an embodiment of the present application.
  • the driving architecture according to the present application further comprises a pulse-width modulation (PWM) signal line PWMLine, a data line DLine, a clock signal line DCKLine, enable signal lines ENLine 1 , . . . , ENLine 3 , and at least one display element 40 .
  • the controller 20 is coupled to the drivers 30 _ 1 , 30 _ 2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine.
  • the drivers 30 _ 1 , 30 _ 2 are coupled in series via the enable signal lines ENLine 1 , ENLine 2 .
  • the controller 20 transmits the PWM signal PWM 1 , the input data Din 1 , and the clock signal DCK to the drivers 30 _ 1 , 30 _ 2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine.
  • the controller 20 transmits the enable signal EN 1 to the drivers 30 _ 1 of the driving group 100 _ 1 for driving the drivers 30 _ 1 via the enable signal line ENLine 1 .
  • the drivers 30 _ 1 generate and transmit the enable signal EN 2 to the drivers 30 _ 2 of the driving group 100 _ 2 for driving the drivers 30 _ 2 .
  • the drivers 30 _N- 1 of the driving group 100 _N- 1 transmit the enable signal ENN (not shown in the figure) to the drivers 30 _N of the driving group 100 _N and thus completing the enable operations for the whole display panel 10 .
  • each of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N includes an enable input terminal ENin and an enable output terminal ENout.
  • the enable signal transmitted by the controller 20 via the enable signal line ENLine 1 is also called the initial enable signal, indicating the first enable signal.
  • the drivers 30 _ 1 , 30 _ 2 include at least one display element 40 , respectively.
  • six display elements 40 are taken as an example.
  • the enable signal EN 1 is transmitted to the driver 30 _ 1 for enabling the driver 30 _ 1
  • the driver 30 _ 1 drives the six display elements 40 coupled to the driver 30 _ 1 for driving the display elements 40 to emit light for displaying images.
  • each three display elements 40 may represent red, green, and blue (RGB) colors and form a pixel.
  • the display elements 40 may be mini LEDs or micro LEDs.
  • FIG. 4 shows a block diagram of the drivers in FIG. 3 according to an embodiment of the present application.
  • the controller 20 is coupled to the drivers 30 _ 1 , 30 _ 2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine.
  • the drivers 30 _ 1 , 30 _ 2 include an enable circuit 32 , a storage circuit 34 , and a driving circuit 36 , respectively.
  • the storage circuit 34 is coupled to the controller 20 and stores input data Din 1 transmitted by the controller 20 .
  • the enable circuit 32 is coupled to the storage circuit 34 and enables the storage circuit 34 to receive the input data Din 1 .
  • the enable circuit 32 disables the storage circuit 34 and drives the enable circuit 32 of another driver of another driving group to enable the storage circuit 34 of that driver to receive the input data Din 1 transmitted by the controller 20 .
  • the enable circuit 32 disables the storage circuit 34 and drives the enable circuit 32 of the driver 30 _ 2 of the driving group 100 _ 2 to enable the storage circuit 34 of the driver 30 _ 2 to receive the input data Din 1 transmitted by the controller 20 .
  • the driving circuit 36 drives at least one display element according to the input data Din 1 .
  • FIG. 5 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • the driving architecture according to the present application is used for driving a display panel 10 to display images.
  • the driving architecture for the display panel 10 comprises a controller 20 , a plurality of drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N, and a plurality of driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N.
  • Each of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N comprises an enable input terminal ENin (as shown in FIG.
  • the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N are disposed on the display panel 10 and mutually coupled in series.
  • Each of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N includes the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N.
  • the enable signals (such as the enable signals EN 1 , EN 2 shown in FIG. 3 and FIG. 4 ) for driving the corresponding drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N.
  • the enable signal EN 1 drives the driver 30 _ 1 .
  • the enable signal EN 2 drives the driver 30 _ 2 , and so on.
  • the Xth driving group receives the Xth enable signal ENX, where X is a positive integer greater than 1.
  • the controller 20 transmits the enable signal EN 1 (as shown in FIG. 4 ). At least one of the driving groups 100 _ 1 , 100 _ 2 , . . .
  • 100 _N receives the enable signal EN 1 for driving the drivers 30 _ 2 , . . . , 30 _N of the at least one driving group.
  • the controller 20 transmits the enable signal EN 1 to the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N of the driving group 100 _ 1 via the enable signal line ENLine 1 for driving the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N.
  • the signal transmission method for the PWM signal PWM 1 , the input data Din 1 , and the click signal DCK is the same as the one in the embodiment of FIG. 2 .
  • the enable input terminals ENin of the drivers 30 _ 2 , . . . , 30 _N of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N are mutually coupled, and the enable out terminals ENout of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N are mutually coupled.
  • the controller 20 transmits the enable signal EN 1 to the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N of the driving group 100 _ 1 via the enable signal line ENLine 1 for driving the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N.
  • the drivers 30 _ 1 , 30 _ 2 , . . . , of the driving group 100 _ 1 transmit the enable signal EN 2 to the drivers 30 _ 1 , 30 _ 2 , . . . , of the driving group 100 _ 2 .
  • the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N may receive the enable signals EN 1 , EN 2 , . . . , ENN from the previous stage simultaneously or non-simultaneously for being driven simultaneously or non-simultaneously.
  • connection method of the enable signal lines and the signal transmission method described above the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime.
  • FIG. 6 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N includes an Xth driving group and a Yth driving group.
  • the Z driving group difference is between the Xth driving group and the Yth driving group.
  • the Z timing difference is between the timing of the Xth driving group receiving the Xth enable signal and the timing of the Yth driving group receiving the Yth enable signal.
  • X, Y, and Z are positive integers greater 0; Y is greater than X.
  • the first and the third driving groups of the driving groups 100 _ 1 , 100 _ 2 , . . . , 100 _N are the driving group 100 _ 1 and the driving group 100 _ 3 .
  • the driving group difference between the driving group 100 _ 1 and the driving group 100 _ 3 is one (the driving group 100 _ 2 ).
  • the driving group 100 _ 1 and the driving group 100 _ 3 receive the first enable signal EN 1 and the third enable signal EN 3 correspondingly with one timing difference. According to the pattern, the situation may be deduced to the driving group 100 _N- 2 and the driving group 100 _N.
  • the enable signals EN 1 , EN 3 , . . . , ENN- 2 , ENN are transmitted by the controller 20 .
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the (X+1)th driving group are not mutually coupled.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the second driving group 100 _ 2 are not mutually coupled.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the (Y+1)th driving group are not mutually coupled.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the fourth driving group 100 _ 4 are not mutually coupled.
  • connection method of the enable signal lines and the signal transmission method of the driving architecture described above the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime.
  • the enable input terminals of all drivers are not required to be mutually coupled, the number of signal lines may be reduced effectively and hence simplifying the driving architecture of the display panel.
  • FIG. 7 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the (X+1)th driving group are mutually coupled.
  • X is equal to 1
  • Y is equal to 3
  • Z is equal to 1.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the second driving group 100 _ 2 are mutually coupled.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the (Y+1)th driving group are mutually coupled.
  • the enable input terminals ENin of the drivers 30 _ 1 , 30 _ 2 , . . . , 30 _N in the fourth driving group 100 _ 4 are mutually coupled.
  • connection method of the enable signal lines and the signal transmission method of the driving architecture described above the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime.
  • the enable input terminals of all drivers are not required to be mutually coupled, the number of signal lines may be reduced effectively and hence simplifying the driving architecture of the display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Gas Discharge Display Tubes (AREA)

Abstract

The present application discloses a driving architecture for display panel, which comprises a plurality of drivers and a plurality of driving groups. Each driver includes an enable input terminal and is coupled to at least one display element of a display panel. The driving groups are disposed on the display panel and mutually coupled in series. Each driving group includes the drivers, the enable input terminals of the drivers of at least one driving group are mutually coupled for mutually transmitting an enable signal, and the enable signal is configured to drive the drivers. The driving architecture according to the present application is applied to the display panel, the number of signal lines may be reduced effectively, the normal operation of the display panel may be maintained, and the usage lifetime of the display panel may be extended.

Description

    FIELD OF THE INVENTION
  • The present application is related to a driving architecture, in particular to a driving architecture for a display panel.
    • BACKGROUND OF THE INVENTION
  • Display devices have become an indispensable part of electronic products for displaying information. The display devices have been evolved from liquid crystal displays to mini-LED displays and micro-LED displays. Please refer to FIG. 1 , which shows a schematic diagram of the driving architecture according to an embodiment of the prior art. As shown in the figure, the driving architecture according to the prior art is used for driving a display panel 10 to display images. The driving architecture comprises a controller 1, N rows of drivers 2_1, 2_2, . . . , 2_N, and enable signal lines 3. According to the present embodiment, N rows of drivers and the controller 1 are used to illustrate the driving architecture according to the prior art. The drivers 2_1, 2_2, . . . , 2_N and the controller 1 are disposed on the display panel 10. The controller 1 is coupled to and controls the N rows of drivers 2_1, 2_2, . . . , 2_N. According to an embodiment of the present application, the controller 1 may be an independent chip.
  • Each row of drivers includes a plurality of drivers. For example, the first row includes a plurality of drivers 2_1; the second row includes a plurality of drivers 2_2, and so on. The drivers 2_1, 2_2, . . . , 2_N disposed on the same column are mutually coupled. For example, the drivers 2_1, 2_2, . . . , 2_N disposed on the same column are mutually coupled by signal lines for transmitting pulse-width modulation (PWM) signals, input data (Din), clock signal (DCK), and enable signal (Enable). For convenience, according to the present embodiment, the enable signal lines 3 are used as an example for illustration. The controller 1 sends the enable signal via the enable signal line 3 to the drivers 2_1, 2_2, . . . , 2_N disposed on the same column. The display panel applying this driving architecture needs to include scan lines, which will increase the complexity of the structure of the display panel. In addition, the amount of the drivers 2_1, 2_2, . . . , 2_N disposed on the display panel 10 may be massive. If each driver is directly connected to the controller 1 by the enable signal line 3, there will be extremely numerous signal lines. Moreover, when one of the drivers is failed, the enable signal will not be transmitted to next one of the drivers, thereby, leading to failure of subsequent drivers by receiving no enable signal, the corresponding display elements also may not be driven.
  • Accordingly, the present application provides a driving architecture for display panel that may solve the above technical problem and simplify the structure of display panel.
    • SUMMARY OF THE INVENTION
  • An objective of the present application is to provide a driving architecture for a display panel, in which the driving architecture comprises a plurality of drivers and a plurality of driving groups. Each driver includes an enable input terminal and is coupled to at least one display element of the display panel. The driving groups are disposed on the display panel and mutually coupled in series.
  • The present application provides a driving architecture for a display panel, in which the driving architecture comprises a plurality of driving groups, which are disposed on the display panel and mutually coupled in series. Each driving group includes the drivers. The enable input terminals of the drivers of the at least one driving group are mutually coupled for mutually transmitting an enable signal. The drivers are driven by the enable signal. By adopting the driving architecture according to the present application to drive the display panel, the problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime of the display panel. Besides, since the enable input terminals of all drivers are not required to be mutually coupled, the number of signal lines may be reduced effectively and hence simplifying the driving architecture of the display panel.
    • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1 shows a schematic diagram of the driving architecture according to an embodiment of the prior art;
  • FIG. 2 shows a schematic diagram of the driving architecture according to an embodiment of the present application;
  • FIG. 3 shows a block diagram of the drivers and the display elements according to an embodiment of the present application;
  • FIG. 4 shows a block diagram of the drivers in FIG. 3 according to an embodiment of the present application;
  • FIG. 5 shows a schematic diagram of the driving architecture according to an embodiment of the present application;
  • FIG. 6 shows a schematic diagram of the driving architecture according to an embodiment of the present application; and
  • FIG. 7 shows a schematic diagram of the driving architecture according to an embodiment of the present application.
    •  DETAILED DESCRIPTION OF THE INVENTION
  • In order to make the structure and characteristics as well as the effectiveness of the present application to be further understood and recognized, the detailed description of the present application is provided as follows along with embodiments and accompanying figures.
  • In the specifications and subsequent claims, certain words are used for representing specific devices. A person having ordinary skill in the art should know that hardware manufacturers might use different nouns to call the same device. In the specifications and subsequent claims, the differences in names are not used for distinguishing devices. Instead, the differences in functions are the guidelines for distinguishing. In the whole specifications and subsequent claims, the word “comprising/including” is an open language and should be explained as “comprising but not limited to”. Besides, the word “couple” includes any direct and indirect electrical connection. Thereby, if the description is that a first device is coupled to a second device, it means that the first device is connected electrically to the second device directly, or the first device is connected electrically to the second device via other device or connecting means indirectly.
  • Please refer to FIG. 2 , which shows a schematic diagram of the driving architecture according to an embodiment of the present application. The driving architecture according to the present application is used for driving a display panel 10 to display images. As shown in the figure, the driving architecture comprises a controller 20 and a plurality of driving groups 100_1, 100_2, . . . , 100_N. The controller 20 is coupled to the driving groups 100_1, 100_2, . . . , 100_N. Each of the driving groups 100_1, 100_2, . . . , 100_N includes a plurality of drivers 30_1, 30_2, . . . , respectively. For example, the driving group 100_1 includes a plurality of drivers 30_1; the driving group 100_2 includes a plurality of drivers 30_2, and so on. The arrangement direction of the driving groups 100_1, 100_2, . . . , 100_N is different from the arrangement direction of the drivers 30_1, 30_2, . . . , 30_N. The drivers 30_1, 30_2, . . . , 30_N disposed on the same column are coupled in series. For example, the drivers 30_1, 30_2, . . . , 30_N disposed on the same column are coupled in series by enable signal lines ENLine1, ENLine2, . . . , ENLineN. According to the present embodiment, N rows of driving groups and N rows of drivers are adopted for illustrating the driving architecture of the present application. The display panel 10 is a mini-LED or micro-LED display panel. Nonetheless, the driving architecture according to the present application is not limited to the above two types of display panel.
  • Please refer to FIG. 2 and FIG. 3 . FIG. 3 shows a block diagram of the drivers and the display elements according to an embodiment of the present application. For convenience, only the drivers 30_1, 30_2 are shown in FIG. 3 . The driving architecture according to the present application further comprises a pulse-width modulation (PWM) signal line PWMLine, a data line DLine, a clock signal line DCKLine, enable signal lines ENLine1, . . . , ENLine3, and at least one display element 40. The controller 20 is coupled to the drivers 30_1, 30_2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine. The drivers 30_1, 30_2 are coupled in series via the enable signal lines ENLine1, ENLine2.
  • The controller 20 transmits the PWM signal PWM1, the input data Din1, and the clock signal DCK to the drivers 30_1, 30_2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine. In addition, the controller 20 transmits the enable signal EN1 to the drivers 30_1 of the driving group 100_1 for driving the drivers 30_1 via the enable signal line ENLine1. Then, the drivers 30_1 generate and transmit the enable signal EN2 to the drivers 30_2 of the driving group 100_2 for driving the drivers 30_2. Following this sequence, at last, the drivers 30_N-1 of the driving group 100_N-1 transmit the enable signal ENN (not shown in the figure) to the drivers 30_N of the driving group 100_N and thus completing the enable operations for the whole display panel 10.
  • For example, refer to FIG. 3 . The controller 20 transmits the enable signal EN1 to the driver 30_1 of the driving group 100_1 via the enable signal line ENLine1 for driving the driver 30_1. Then the driver 30_1 generates the enable signal EN2 to the next stage, the driver 30_2 of the driving group 100_2 for driving the driver 30_2, and so on. According to the present embodiment, each of the drivers 30_1, 30_2, . . . , 30_N includes an enable input terminal ENin and an enable output terminal ENout. Each of the drivers 30_1, 30_2, . . . , 30_N receives the enable signals EN1, EN2, . . . , ENN via the enable input terminal ENin and transmits the enable signals EN2, EN3, . . . , ENN via the enable output terminal ENout. According to another embodiment, the enable signal transmitted by the controller 20 via the enable signal line ENLine1 is also called the initial enable signal, indicating the first enable signal.
  • The drivers 30_1, 30_2 include at least one display element 40, respectively. According to the present embodiment, six display elements 40 are taken as an example. When the enable signal EN1 is transmitted to the driver 30_1 for enabling the driver 30_1, the driver 30_1 drives the six display elements 40 coupled to the driver 30_1 for driving the display elements 40 to emit light for displaying images. For example, each three display elements 40 may represent red, green, and blue (RGB) colors and form a pixel. According to the present embodiment, the display elements 40 may be mini LEDs or micro LEDs.
  • Please refer to FIG. 4 , which shows a block diagram of the drivers in FIG. 3 according to an embodiment of the present application. As shown in the figure, the controller 20 is coupled to the drivers 30_1, 30_2 via the PWM signal line PWMLine, the data line DLine, and the clock signal line DCKLine. The drivers 30_1, 30_2 include an enable circuit 32, a storage circuit 34, and a driving circuit 36, respectively. The storage circuit 34 is coupled to the controller 20 and stores input data Din1 transmitted by the controller 20. The enable circuit 32 is coupled to the storage circuit 34 and enables the storage circuit 34 to receive the input data Din1. After the enable circuit 32 enables the storage circuit 34, the enable circuit 32 disables the storage circuit 34 and drives the enable circuit 32 of another driver of another driving group to enable the storage circuit 34 of that driver to receive the input data Din1 transmitted by the controller 20. For example, after the enable circuit 32 of the driver 30_1 enables the storage circuit 34, the enable circuit 32 disables the storage circuit 34 and drives the enable circuit 32 of the driver 30_2 of the driving group 100_2 to enable the storage circuit 34 of the driver 30_2 to receive the input data Din1 transmitted by the controller 20. The driving circuit 36 drives at least one display element according to the input data Din1.
  • Please refer to FIG. 5 , which shows a schematic diagram of the driving architecture according to an embodiment of the present application. The driving architecture according to the present application is used for driving a display panel 10 to display images. As shown in the figure, the driving architecture for the display panel 10 comprises a controller 20, a plurality of drivers 30_1, 30_2, . . . , 30_N, and a plurality of driving groups 100_1, 100_2, . . . , 100_N. Each of the drivers 30_1, 30_2, . . . , 30_N comprises an enable input terminal ENin (as shown in FIG. 3 ) and is coupled to at least one display element 40 of the display panel 10 (as shown in FIG. 3 and FIG. 4 ). The driving groups 100_1, 100_2, . . . , 100_N are disposed on the display panel 10 and mutually coupled in series. Each of the driving groups 100_1, 100_2, . . . , 100_N includes the drivers 30_1, 30_2, . . . , 30_N. The enable input terminals ENin of all of the drivers 30_1, 30_2, . . . , of at least one of the driving groups 100_1, 100_2, . . . , 100_N are mutually coupled for mutually transmitting the enable signals (such as the enable signals EN1, EN2 shown in FIG. 3 and FIG. 4 ) for driving the corresponding drivers 30_1, 30_2, . . . , 30_N. For example, the enable signal EN1 drives the driver 30_1. The enable signal EN2 drives the driver 30_2, and so on. The Xth driving group receives the Xth enable signal ENX, where X is a positive integer greater than 1. The controller 20 transmits the enable signal EN1 (as shown in FIG. 4 ). At least one of the driving groups 100_1, 100_2, . . . , 100_N receives the enable signal EN1 for driving the drivers 30_2, . . . , 30_N of the at least one driving group. For example, the controller 20 transmits the enable signal EN1 to the drivers 30_1, 30_2, . . . , 30_N of the driving group 100_1 via the enable signal line ENLine1 for driving the drivers 30_1, 30_2, . . . , 30_N.
  • In the embodiment of FIG. 5 , the signal transmission method for the PWM signal PWM1, the input data Din1, and the click signal DCK is the same as the one in the embodiment of FIG. 2 . Hence, the details will not be described again. The enable input terminals ENin of the drivers 30_2, . . . , 30_N of the driving groups 100_1, 100_2, . . . , 100_N are mutually coupled, and the enable out terminals ENout of the drivers 30_1, 30_2, . . . , 30_N of the driving groups 100_1, 100_2, . . . , 100_N are mutually coupled. The controller 20 transmits the enable signal EN1 to the drivers 30_1, 30_2, . . . , 30_N of the driving group 100_1 via the enable signal line ENLine1 for driving the drivers 30_1, 30_2, . . . , 30_N. In the next driving stage, the drivers 30_1, 30_2, . . . , of the driving group 100_1 transmit the enable signal EN2 to the drivers 30_1, 30_2, . . . , of the driving group 100_2. In this manner, the drivers 30_1, 30_2, . . . , 30_N of the driving group 100_N are driven and hence completing the enable operations of the whole display panel According to an embodiment, the drivers 30_1, 30_2, . . . , 30_N of the driving groups 100_1, 100_2, . . . , 100_N may receive the enable signals EN1, EN2, . . . , ENN from the previous stage simultaneously or non-simultaneously for being driven simultaneously or non-simultaneously.
  • By using the connection method of the enable signal lines and the signal transmission method described above, the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime.
  • Please refer to FIG. 6 , which shows a schematic diagram of the driving architecture according to an embodiment of the present application. The difference between the embodiment in FIG. 6 and the one in FIG. 5 is that, according to the embodiment in FIG. 6 , the driving groups 100_1, 100_2, . . . , 100_N includes an Xth driving group and a Yth driving group. The Z driving group difference is between the Xth driving group and the Yth driving group. The Z timing difference is between the timing of the Xth driving group receiving the Xth enable signal and the timing of the Yth driving group receiving the Yth enable signal. X, Y, and Z are positive integers greater 0; Y is greater than X. In FIG. 6 , X is equal to 1; Y is equal to 3; and Z is equal to 1. The first and the third driving groups of the driving groups 100_1, 100_2, . . . , 100_N are the driving group 100_1 and the driving group 100_3. The driving group difference between the driving group 100_1 and the driving group 100_3 is one (the driving group 100_2). The driving group 100_1 and the driving group 100_3 receive the first enable signal EN1 and the third enable signal EN3 correspondingly with one timing difference. According to the pattern, the situation may be deduced to the driving group 100_N-2 and the driving group 100_N. According to the present embodiment, the enable signals EN1, EN3, . . . , ENN-2, ENN are transmitted by the controller 20.
  • According to an embodiment, the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the (X+1)th driving group are not mutually coupled. In FIG. 6 , the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the second driving group 100_2 are not mutually coupled.
  • According to an embodiment, the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the (Y+1)th driving group are not mutually coupled. In FIG. 6 , the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the fourth driving group 100_4 are not mutually coupled.
  • By using the connection method of the enable signal lines and the signal transmission method of the driving architecture described above, the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime. Besides, since the enable input terminals of all drivers are not required to be mutually coupled, the number of signal lines may be reduced effectively and hence simplifying the driving architecture of the display panel.
  • Please refer to FIG. 7 , which shows a schematic diagram of the driving architecture according to an embodiment of the present application. The difference between the embodiment in FIG. 7 and the one in FIG. 6 is that, according to the embodiment in FIG. 7 , the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the (X+1)th driving group are mutually coupled. In FIG. 7 , X is equal to 1; Y is equal to 3; and Z is equal to 1. The enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the second driving group 100_2 are mutually coupled.
  • According to an embodiment, the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the (Y+1)th driving group are mutually coupled. In FIG. 7 , the enable input terminals ENin of the drivers 30_1, 30_2, . . . , 30_N in the fourth driving group 100_4 are mutually coupled.
  • By using the connection method of the enable signal lines and the signal transmission method of the driving architecture described above, the technical problem of inability of transmitting the enable signal to the next driver when one of the drivers fails may be solved and thus maintaining normal operations of the display panel and extending the usage lifetime. Besides, since the enable input terminals of all drivers are not required to be mutually coupled, the number of signal lines may be reduced effectively and hence simplifying the driving architecture of the display panel.
  • Accordingly, the present application conforms to the legal requirements owing to its novelty, nonobviousness, and utility. However, the foregoing description is only embodiments of the present application, not used to limit the scope and range of the present application. Those equivalent changes or modifications made according to the shape, structure, feature, or spirit described in the claims of the present application are included in the appended claims of the present application.

Claims (13)

1. A driving architecture for a display panel, comprising:
a plurality of drivers, each said driver including an enable input terminal, and each said driver coupled to at least one display element of said display panel; and
a plurality of driving groups, disposed on said display panel and mutually coupled in series, each said driving group including said drivers, said enable input terminals of all said drivers of at least one of said driving groups mutually coupled for mutually transmitting an enable signal, and said enable signal driving said drivers.
2. The driving architecture of claim 1, further comprising:
a controller, transmitting said enable signal, at least one of said driving groups receiving said enable signal for driving said drivers in said at least one driving group.
3. The driving architecture of claim 1, wherein a driver in one of said driving groups transmits said enable signal for driving another driver in another of said driving groups.
4. The driving architecture of claim 2, wherein said driving groups include a first driving group adjacent to said controller and receiving said enable signal for driving said drivers in said driving group.
5. The driving architecture of claim 2, wherein said driving groups include an Xth driving group, said Xth driving group receives the Xth enable signal; and X is a positive integer greater than 1.
6. The driving architecture of claim 2, wherein said driving groups include an Xth driving group and a Yth driving group, a Z driving group difference is between said Xth driving group and said Yth driving group, a Z timing difference is between the timing of said Xth driving group receiving said enable signal and the timing of said Yth driving group receiving said enable signal, X, Y, and Z are positive integers greater than 0; and Y is greater than X.
7. The driving architecture of claim 6, wherein said driving groups further include a (X+1)th driving group, and said enable input terminals of said drivers in said (X+1)th driving group are not mutually coupled.
8. The driving architecture of claim 6, wherein said driving groups further include the (Y+1)th driving group; and said enable input terminals of said drivers in said (Y+1)th driving group are not mutually coupled.
9. The driving architecture of claim 6, wherein said driving groups further include the (X+1)th driving group, and said enable input terminals of said drivers in said (X+1)th driving group are mutually coupled.
10. The driving architecture of claim 6, wherein said driving groups further include the (Y+1)th driving group, and said enable input terminals of said drivers in said (Y+1)th driving group are mutually coupled.
11. The driving architecture of claim 2, wherein each said driver includes:
a storage circuit, coupled to said controller, and storing input data transmitted by said controller; and
an enable circuit, coupled to and enabling said storage circuit for receiving said input data;
wherein after said enable circuit enables said storage circuit, said enable circuit disables said storage circuit and drives said enable circuit of another driver in another driving group to enable said storage circuit of said another driver to receive said input data transmitted by said controller.
12. The driving architecture of claim 1, wherein each said driver comprises:
a driving circuit, driving said at least one display element according to input data.
13. The driving architecture of claim 1, wherein an arrangement direction of said driving groups is different from an arrangement direction of said drivers.
US18/091,819 2021-12-30 2022-12-30 Driving structure for display panel Pending US20230410722A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US18/091,819 US20230410722A1 (en) 2021-12-30 2022-12-30 Driving structure for display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US202163266199P 2021-12-30 2021-12-30
US18/091,819 US20230410722A1 (en) 2021-12-30 2022-12-30 Driving structure for display panel

Publications (1)

Publication Number Publication Date
US20230410722A1 true US20230410722A1 (en) 2023-12-21

Family

ID=86964508

Family Applications (3)

Application Number Title Priority Date Filing Date
US18/091,693 Active US12008949B2 (en) 2021-12-30 2022-12-30 Driver for display panel
US18/091,819 Pending US20230410722A1 (en) 2021-12-30 2022-12-30 Driving structure for display panel
US18/091,788 Active US12118923B2 (en) 2021-12-30 2022-12-30 Driving circuit for display panel

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US18/091,693 Active US12008949B2 (en) 2021-12-30 2022-12-30 Driver for display panel

Family Applications After (1)

Application Number Title Priority Date Filing Date
US18/091,788 Active US12118923B2 (en) 2021-12-30 2022-12-30 Driving circuit for display panel

Country Status (4)

Country Link
US (3) US12008949B2 (en)
CN (3) CN116386515A (en)
TW (4) TWI878767B (en)
WO (1) WO2023126027A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI878767B (en) * 2021-12-30 2025-04-01 矽創電子股份有限公司 Driving circuit for display panel
CN117456894A (en) * 2022-07-25 2024-01-26 矽创电子股份有限公司 Display driving device and testing method of driver thereof
CN116825020A (en) * 2023-07-03 2023-09-29 厦门天马显示科技有限公司 Display panel, dimming method and display device thereof

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6580657B2 (en) * 2001-01-04 2003-06-17 International Business Machines Corporation Low-power organic light emitting diode pixel circuit
US20070132674A1 (en) * 2003-12-02 2007-06-14 Toshiba Matsushita Display Technology Co., Ltd. Driving method of self-luminous type display unit, display control device of self-luminous type display unit, current output type drive circuit of self-luminous type display unit
US20070195030A1 (en) * 2006-02-21 2007-08-23 Chi Mei Optoelectronics Corp. Liquid crystal display panel utilizing redundancy line as repair line and method of repairing the same
US20170337876A1 (en) * 2016-05-19 2017-11-23 Samsung Display Co., Ltd. Display device
US20180166018A1 (en) * 2017-10-30 2018-06-14 Wuhan Tianma Micro-Electronics Co.,Ltd. Display panel and display device
US20190005884A1 (en) * 2017-06-30 2019-01-03 Lg Display Co., Ltd. Display device and gate driving circuit thereof, control method and virtual reality device
US20200302876A1 (en) * 2019-03-19 2020-09-24 Samsung Display Co., Ltd. Display device
US20210056893A1 (en) * 2019-08-24 2021-02-25 Huayuan Semiconductor (Shenzhen) Limited Company Dynamic assignment of addresses to drivers in a display device
US11011592B2 (en) * 2017-12-29 2021-05-18 Lg Display Co., Ltd. Light emitting display apparatus
US11087663B1 (en) * 2020-05-15 2021-08-10 Novatek Microelectronics Corp. Display device and driving method thereof for reducing difference in brightness between areas with different widths
US20210343231A1 (en) * 2020-05-01 2021-11-04 Huayuan Semiconductor (Shenzhen) Limited Company Power line communication driver circuit
US12008949B2 (en) * 2021-12-30 2024-06-11 Sitronix Technology Corp. Driver for display panel

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI303407B (en) 2004-12-24 2008-11-21 Innolux Display Corp Driving circuit of display and method of driving the circuit
KR101588328B1 (en) 2007-10-30 2016-01-26 삼성디스플레이 주식회사 Liquid crystal display and driving method of the same
US8125472B2 (en) * 2009-06-09 2012-02-28 Global Oled Technology Llc Display device with parallel data distribution
CN102298903B (en) 2010-06-28 2016-03-16 石井房雄 Use the display device of light-pulse generator
DE112012002065T5 (en) * 2011-05-13 2014-02-20 Semiconductor Energy Laboratory Co., Ltd. display device
US9013386B2 (en) * 2012-01-09 2015-04-21 Himax Technologies Limited Liquid crystal display and method for operating the same
KR101910114B1 (en) * 2012-02-10 2018-10-22 삼성디스플레이 주식회사 Display device and arranging method for image data thereof
KR102005496B1 (en) * 2012-09-21 2019-10-02 삼성디스플레이 주식회사 Display apparatus and method of driving the same
KR102126534B1 (en) 2013-10-31 2020-06-25 엘지디스플레이 주식회사 Light Source Driving Device And Liquid Crystal Display Using It
TWI552319B (en) * 2014-05-23 2016-10-01 友達光電股份有限公司 Display device
CN104123923A (en) * 2014-07-24 2014-10-29 深圳市华星光电技术有限公司 Display driving circuit and display driving method for liquid crystal display
KR102211692B1 (en) * 2014-09-03 2021-02-04 삼성디스플레이 주식회사 Organic light emitting display device
KR102268047B1 (en) 2014-09-25 2021-06-22 엘지전자 주식회사 Video processing apparatus and method thereof
CN107735832B (en) * 2015-06-05 2021-10-22 苹果公司 Lighting control device and method for display panel
KR102648367B1 (en) * 2016-11-03 2024-03-15 삼성디스플레이 주식회사 Converter and display apparatus including the same
US10121443B2 (en) * 2017-02-13 2018-11-06 Innolux Corporation Display panel and display device
KR102529152B1 (en) 2018-06-05 2023-05-04 삼성디스플레이 주식회사 Display device and driving method thereof
KR102687614B1 (en) 2018-06-22 2024-07-24 엘지디스플레이 주식회사 Scan Driver and Display Device using the same
US10902793B2 (en) 2018-09-12 2021-01-26 Lg Display Co., Ltd. Gate driver circuit outputting a plurality of emission signals having different delay times or pulse widths or combinations thereof
KR102553594B1 (en) 2018-09-14 2023-07-10 삼성전자주식회사 Display device and control method thereof
CN111540316B (en) 2018-10-18 2021-10-22 联咏科技股份有限公司 Circuit device for controlling backlight source and operation method thereof
CN109308882A (en) * 2018-11-28 2019-02-05 武汉华星光电技术有限公司 The driving method of display panel
KR102652923B1 (en) 2018-12-26 2024-03-29 엘지디스플레이 주식회사 Backlight unit and display device
KR102661704B1 (en) 2019-04-16 2024-05-02 삼성디스플레이 주식회사 Display device and driving method thereof
KR102620829B1 (en) * 2019-08-27 2024-01-03 삼성전자주식회사 Light emitting device package and display apparatus including the same
TWI723819B (en) * 2020-03-26 2021-04-01 聚積科技股份有限公司 Backlight driving method of display
KR102738530B1 (en) 2020-04-22 2024-12-06 주식회사 엘엑스세미콘 Dimming processing apparatus and display device
CN112331137B (en) * 2020-09-14 2021-08-31 汕头超声显示器技术有限公司 Partition driving LED display screen
CN113077762A (en) 2021-03-17 2021-07-06 Tcl华星光电技术有限公司 Driving method and driving circuit of Mini LED backlight module and display device

Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6580657B2 (en) * 2001-01-04 2003-06-17 International Business Machines Corporation Low-power organic light emitting diode pixel circuit
US20070132674A1 (en) * 2003-12-02 2007-06-14 Toshiba Matsushita Display Technology Co., Ltd. Driving method of self-luminous type display unit, display control device of self-luminous type display unit, current output type drive circuit of self-luminous type display unit
US20070195030A1 (en) * 2006-02-21 2007-08-23 Chi Mei Optoelectronics Corp. Liquid crystal display panel utilizing redundancy line as repair line and method of repairing the same
US20170337876A1 (en) * 2016-05-19 2017-11-23 Samsung Display Co., Ltd. Display device
US20190005884A1 (en) * 2017-06-30 2019-01-03 Lg Display Co., Ltd. Display device and gate driving circuit thereof, control method and virtual reality device
US10504442B2 (en) * 2017-06-30 2019-12-10 Lg Display Co., Ltd. Display device and gate driving circuit thereof, control method and virtual reality device
US20180166018A1 (en) * 2017-10-30 2018-06-14 Wuhan Tianma Micro-Electronics Co.,Ltd. Display panel and display device
US11011592B2 (en) * 2017-12-29 2021-05-18 Lg Display Co., Ltd. Light emitting display apparatus
US11127354B2 (en) * 2019-03-19 2021-09-21 Samsung Display Co., Ltd. Display device
US20200302876A1 (en) * 2019-03-19 2020-09-24 Samsung Display Co., Ltd. Display device
US20210056891A1 (en) * 2019-08-24 2021-02-25 Huayuan Semiconductor (Shenzhen) Limited Company Display device with single package light emitting diode and driver circuit
US20210056893A1 (en) * 2019-08-24 2021-02-25 Huayuan Semiconductor (Shenzhen) Limited Company Dynamic assignment of addresses to drivers in a display device
US11257421B2 (en) * 2019-08-24 2022-02-22 Huayuan Semiconductor (Shenzhen) Limited Company Display device with single package light emitting diode and driver circuit
US20210343231A1 (en) * 2020-05-01 2021-11-04 Huayuan Semiconductor (Shenzhen) Limited Company Power line communication driver circuit
US11393389B2 (en) * 2020-05-01 2022-07-19 Huayuan Semiconductor (Shenzhen) Limited Company Power line communication driver circuit
US11087663B1 (en) * 2020-05-15 2021-08-10 Novatek Microelectronics Corp. Display device and driving method thereof for reducing difference in brightness between areas with different widths
US12008949B2 (en) * 2021-12-30 2024-06-11 Sitronix Technology Corp. Driver for display panel

Also Published As

Publication number Publication date
WO2023126027A3 (en) 2023-08-17
TW202333130A (en) 2023-08-16
TWI878767B (en) 2025-04-01
TW202329077A (en) 2023-07-16
US12008949B2 (en) 2024-06-11
US12118923B2 (en) 2024-10-15
WO2023126027A2 (en) 2023-07-06
CN118355426A (en) 2024-07-16
US20230401996A1 (en) 2023-12-14
CN116386514A (en) 2023-07-04
TW202333132A (en) 2023-08-16
CN116386515A (en) 2023-07-04
TWI868554B (en) 2025-01-01
TW202524462A (en) 2025-06-16
US20230401995A1 (en) 2023-12-14
TWI842320B (en) 2024-05-11

Similar Documents

Publication Publication Date Title
US20230410722A1 (en) Driving structure for display panel
US8902148B2 (en) Backlight driver receiving serially provided optical data via a serial bus and liquid crystal display including the same
US11768413B2 (en) Array substrate, display panel, display device, and driving method
CN111192546B (en) Display panels and electronic devices
JP2005513579A (en) Liquid crystal display module having integrated connector and liquid crystal display device having the same
JP2009302053A (en) Backlight assembly and display device containing the same
CN111028759A (en) Display panel and display device
KR102137636B1 (en) Pixel having less contacting point and digital driving method thereof
US20120139895A1 (en) Timing controller and liquid crystal display using the same
US7812785B2 (en) Display device and method of driving the same
US11017724B2 (en) Gate driving circuit and display apparatus having the same
US20070229442A1 (en) LCD device and driving circuit thereof
US20080030453A1 (en) LCD with source driver and data transmitting method thereof
KR20110066735A (en) LCD and its driving method
WO2012172976A1 (en) Semiconductor integrated device, display device, and debugging method for semiconductor integrated device
KR102727598B1 (en) Light emitting display apparatus
CN113808511A (en) Data driving apparatus, method and system for driving display apparatus
KR102723298B1 (en) Display device and driving circuit thereof
US12165573B2 (en) Display panel and semiconductor display apparatus
JP2007213077A (en) Display device and driving device and method therefor
CN116364025B (en) Display apparatus
US12288504B2 (en) Electrical apparatus and driver apparatus for improving streaking of displayed image
US12198639B2 (en) Display panel assembly, driving method thereof and display apparatus
JP2014038185A (en) Display device
US7880707B2 (en) Liquid crystal module having storing member for controlling working mode of driving chip thereof

Legal Events

Date Code Title Description
AS Assignment

Owner name: SITRONIX TECHNOLOGY CORP., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SU, CHUNG-HSIN;REEL/FRAME:062245/0960

Effective date: 20221230

Owner name: SITRONIX TECHNOLOGY CORP., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNOR'S INTEREST;ASSIGNOR:SU, CHUNG-HSIN;REEL/FRAME:062245/0960

Effective date: 20221230

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: FINAL REJECTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION COUNTED, NOT YET MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED