US20220208802A1 - Display device and manufacturing method thereof - Google Patents
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- US20220208802A1 US20220208802A1 US17/359,636 US202117359636A US2022208802A1 US 20220208802 A1 US20220208802 A1 US 20220208802A1 US 202117359636 A US202117359636 A US 202117359636A US 2022208802 A1 US2022208802 A1 US 2022208802A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
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- H01L27/1248—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0005—Production of optical devices or components in so far as characterised by the lithographic processes or materials used therefor
- G03F7/0007—Filters, e.g. additive colour filters; Components for display devices
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/162—Coating on a rotating support, e.g. using a whirler or a spinner
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/168—Finishing the coated layer, e.g. drying, baking, soaking
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2022—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure
- G03F7/203—Multi-step exposure, e.g. hybrid; backside exposure; blanket exposure, e.g. for image reversal; edge exposure, e.g. for edge bead removal; corrective exposure comprising an imagewise exposure to electromagnetic radiation or corpuscular radiation
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2051—Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H01L27/1259—
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/83—Electrodes
- H10H20/831—Electrodes characterised by their shape
- H10H20/8314—Electrodes characterised by their shape extending at least partially onto an outer side surface of the bodies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
- H10H20/854—Encapsulations characterised by their material, e.g. epoxy or silicone resins
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- H10P50/287—
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/034—Manufacture or treatment of coatings
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/852—Encapsulations
- H10H20/853—Encapsulations characterised by their shape
Definitions
- the disclosure relates to a display device and a manufacturing method thereof, and more particularly, to a display device with good display quality and a manufacturing method thereof.
- Micro LED display devices and Mini LED display devices are to dispose a low-reflection layer (e.g., resin black matrix, black metal, etc.) on the non-display area to meet requirements, such as reducing the high reflectivity of the metal traces and being close to an aesthetic taste of dark appearance.
- a low-reflection layer e.g., resin black matrix, black metal, etc.
- Conventional low-reflection layers can adopt a resin black matrix made in a color filter fab or black metal made in an array fab.
- the resin black matrix a derived cost from the transfer to the color filter fab is generated.
- the black metal an effect of parasitic capacitance is caused since the black metal is a conductor, and an extra photomask process is required.
- a resin black matrix or other photoresist materials are adopted as the low reflection layer in the non-display area, a significant height difference of the topography may then occur, likely leading to the mutual interference between the mass transferring and the topography height caused by the protruding height in the subsequent module manufacturing process during the bonding process of the light-emitting diodes and further resulting in poor electrical connection of the light-emitting diodes.
- the disclosure provides a display device including a flat photoresist pattern layer to carry multiple light-emitting elements.
- a mass transferring process and a bonding process are performed on the multiple light-emitting elements, the yield of the electrical connection between the light-emitting elements and the electrodes may be improved.
- the disclosure provides a manufacturing method of a display device capable of processing the photoresist pattern layer in an array fab without a transfer to a color filter fab, so the cost is saved. In addition, since black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted.
- a display device including a display area and a non-display area.
- the display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and light-emitting elements.
- the element layer is disposed on the substrate.
- the electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes.
- the photoresist pattern layer is disposed on the electrode pattern layer.
- the photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes and a second photoresist pattern disposed corresponding to the non-display area and between the electrodes.
- the light-emitting element is disposed on the photoresist pattern layer and electrically connected to the electrode of the electrode pattern layer.
- a height of the first photoresist pattern is equal to a height of the second photoresist pattern.
- the light-emitting element is disposed on a plane of the photoresist pattern layer formed by the first photoresist pattern and the second photoresist pattern.
- the photoresist pattern layer includes an opening to expose the electrodes of the electrode pattern layer.
- the light-emitting element is electrically connected to the electrodes of the electrode pattern layer through the opening.
- transmittance of a visible light region of the first photoresist pattern ranges from 25% to 100%.
- reflectivity of a visible light region of the first photoresist pattern is less than or equal to 20%.
- transmittance of a visible light region of the second photoresist pattern ranges from 0% to 40%.
- reflectivity of a visible light region of the second photoresist pattern is less than or equal to 15%.
- the light-emitting element includes a micro light-emitting diode (Micro LED) or a sub-millimeter light-emitting diode (Mini LED).
- Micro LED micro light-emitting diode
- Mini LED sub-millimeter light-emitting diode
- a material of the photoresist pattern layer is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof.
- the disclosure further provides a manufacturing method of a display device including a display area and a non-display area.
- the manufacturing method of the display device include the following steps.
- a substrate is disposed.
- An element layer is formed on the substrate.
- An electrode pattern layer is formed on the element layer, and the electrode pattern layer includes multiple electrodes.
- a photoresist layer is formed on the electrode pattern layer.
- First energy is provided to the photoresist layer corresponding to the display area to form a first photoresist pattern, and the first photoresist pattern is formed corresponding to the multiple electrodes.
- Second energy is provided to the photoresist layer corresponding to the non-display area to form a second photoresist pattern, and the second photoresist pattern is formed between the multiple electrodes.
- the first photoresist pattern and the second photoresist pattern form a photoresist pattern layer.
- a light-emitting element is disposed on the photoresist pattern layer, and the light-emitting element is electrically connected to the multiple electrodes of the electrode pattern layer.
- a first laser with the first energy is disposed, the photoresist layer is scanned to form the first photoresist pattern, and an energy range of the first laser ranges from 20 J/g to 400 J/g.
- a second laser with the second energy is disposed, the photoresist layer is scanned to form the second photoresist pattern, and an energy range of the second laser ranges from 300 J/g to 100 J/g.
- a first imprinting device with the first energy is disposed, the photoresist layer is imprinted to form the first photoresist pattern, and a temperature of the first imprinting device ranges from 120° C. to 200°.
- a second imprinting device with the second energy is disposed, the photoresist layer is imprinted to form the second photoresist pattern, and a temperature of the second imprinting device ranges from 150° C. to 300°.
- a baking process is performed on the photoresist layer, and a temperature of the baking process ranges from 80° C. to 110° C. After the baking process, the photoresist layer is imprinted through the first imprinting device and the photoresist layer is imprinted through the second imprinting device.
- a height of the first photoresist pattern is equal to a height of the second photoresist pattern.
- the light-emitting element is disposed on a plane of the photoresist pattern layer formed by the first photoresist pattern and the second photoresist pattern.
- a developer is provided to remove part of the photoresist layer and to form an opening to expose the electrodes of the electrode pattern layer.
- the light-emitting element is electrically connected to the electrode of the electrode pattern layer through the opening.
- transmittance of a visible light region of the first photoresist pattern ranges from 25% to 100%.
- reflectivity of a visible light region of the first photoresist pattern is less than or equal to 20%.
- transmittance of a visible light region of the second photoresist pattern ranges from 0% to 40%.
- reflectivity of a visible light region of the second photoresist pattern is less than or equal to 15%.
- a material of the photoresist pattern layer is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof.
- the display device includes a flat photoresist pattern layer.
- the manufacturing method of the display device in the embodiments of the disclosure can be adapted to process the photoresist pattern layer in an array fab; that is, the photoresist pattern layer can be processed without a transfer to a color filter fab, so the cost is saved.
- black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted.
- FIG. 1 is a schematic cross-sectional view of a display device according to an embodiment of the disclosure.
- FIG. 2A to FIG. 6A are schematic top views of part of the manufacturing process of a display device according to an embodiment of the disclosure.
- FIG. 2B to FIG. 6B are schematic cross-sectional views along the line AA′ of FIG. 2A to FIG. 6A , respectively.
- FIG. 7A to FIG. 7D are schematic cross-sectional views of part of the manufacturing process of a display device according to another embodiment of the disclosure.
- FIG. 8A to FIG. 8E are schematic cross-sectional views of part of the manufacturing process of a display device according to yet another embodiment of the disclosure.
- FIG. 1 is a schematic cross-sectional view of a display device according to an embodiment of the disclosure.
- a display device 100 has a display area 102 and a non-display area 104 .
- the display device 100 includes a substrate 110 , an element layer 120 , an electrode pattern layer 130 , a photoresist pattern layer 140 A, and a light-emitting element 150 .
- the element layer 120 is disposed on the substrate 110 .
- the electrode pattern layer 130 is disposed on the element layer 120 , and the electrode pattern layer 130 has multiple electrodes 132 .
- the photoresist pattern layer 140 A is disposed on the electrode pattern layer 130 .
- the photoresist pattern layer 140 A has a first photoresist pattern 142 and a second photoresist patter 144 .
- the first photoresist pattern 142 is disposed corresponding to the display area 102 and disposed corresponding to the electrode 132 .
- the second photoresist pattern 144 is disposed corresponding to the non-display area 104 and disposed between the electrodes 132 .
- the light-emitting element 150 is disposed on the photoresist pattern layer 140 A and is electrically connected to the electrode 132 of the electrode pattern layer 130 .
- the light-emitting element 150 may be disposed in the display area 102 of the display device 100 to serve as the display pixels of the display device 100 .
- the light-emitting element 150 may include a micro light-emitting diode (Micro LED) or a sub-millimeter light-emitting diode (Mini LED).
- Micro LED micro light-emitting diode
- Mini LED sub-millimeter light-emitting diode
- FIG. 1 only one light-emitting element 150 with two pins 152 is shown.
- the type e.g., with a single pin, two pins, or multiple pins
- the quantity of the light-emitting elements 150 are not limited thereto in the embodiments of the disclosure.
- the non-display area 104 of the display device 100 usually corresponds to a position where metal traces (not shown) are disposed.
- the metal traces are adapted to electrically connect multiple light-emitting elements 150 in the display area 102 and to drive the driving chips (not shown) of the light-emitting elements 150 . Since the second photoresist pattern 144 is disposed in the non-display area 104 of the display device 100 , the metal traces may be shielded to reduce the high reflectivity of the metal traces, and the appearance of the display device 100 may be close to the aesthetic taste of dark appearance.
- the material of the substrate 110 may include glass, quartz, or other suitable materials.
- the element layer 120 may include multiple active elements (not shown), such as a thin film transistor.
- the active element in the element layer 120 may be served as a switch and electrically connected to the pin 152 of the light-emitting element 150 through the electrode 132 of the electrode pattern layer 130 , thereby controlling the on or off of the light-emitting element 150 .
- the type or the quantity of circuit elements disposed in the element layer 120 may be selected according to design requirements, which is not limited thereto in the embodiments of the disclosure.
- a low-reflective resist is adopted to process the photoresist pattern layer 140 A.
- Low energy or a low temperature may be provided to the low-reflective resist, so the low-reflective resist undergoes a low degree of polymerization reaction, and the first photoresist pattern 142 (having higher transmittance and higher reflectivity) is formed in a position corresponding to the display area 102 .
- the transmittance of the visible light region of the first photoresist pattern 142 may range from 25% to 100%.
- the reflectivity of the visible light region of the first photoresist pattern 142 may be less than or equal to 20%. Accordingly, the light emitted by the light-emitting element 150 disposed in the display area 102 may be smoothly output from the display device 100 to present a display screen with good brightness and color.
- the low-reflective resist undergoes a high degree of polymerization reaction, and the second photoresist pattern 144 (having lower transmittance and lower reflectivity) is formed in a position corresponding to the non-display area 104 .
- the transmittance of the visible light region of the second photoresist pattern 144 may range from 0% to 40%; and the reflectivity of the visible light region of the second photoresist pattern 144 may be less than or equal to 15%.
- the second photoresist pattern 144 disposed in the non-display area 104 may be served as a black matrix to shield the metal traces (not shown) in the non-display area 104 , the light reflected by the metal traces in the non-display area 104 may be reduced to provide a display screen with good contrast, and this makes it possible for the appearance of the display device 100 to come with the good aesthetic taste of dark appearance.
- a height H 1 of the first photoresist pattern 142 is equal to a height H 2 of the second photoresist pattern 144 .
- the light-emitting element 150 is disposed on the plane of the photoresist pattern layer 140 A formed by the first photoresist pattern 142 and the second photoresist pattern 144 .
- the photoresist pattern layer 140 A formed by the first photoresist pattern 142 and the second photoresist pattern 144 has a flat topography, so when the mass transferring process and the bonding process are performed on multiple light-emitting elements 150 , the yield of the electrical connection between the light-emitting elements 150 and the electrodes 132 may be improved.
- the photoresist pattern layer 140 A may have openings OP to expose the electrodes 132 of the electrode pattern layer 130 .
- the light-emitting element 150 may be electrically connected to the electrode 132 of the electrode pattern layer 130 through an opening OP.
- the pins 152 of the light-emitting element 150 may be inserted into the opening OP of the photoresist pattern layer 140 A, so the light-emitting element 150 may be stably held on the photoresist pattern layer 140 A.
- two openings OP are shown, but the quantity of the openings OP is not limited thereto in the embodiments of the disclosure, and the quantity of the openings OP can be appropriately set according to the type (e.g. the quantity of pins) of light-emitting elements 150 .
- the material of the photoresist pattern layer 140 A is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof.
- the multiple low-reflective resist materials can be adopted to form a uniform film layer with a flat topography, adapted for carrying multiple light-emitting elements 150 (e.g. Micro LEDs or Mini LEDs). Moreover, by providing different regions of the uniform film layer with different levels of energy, the photoresist pattern layer 140 A having different transmittance and reflectivity may be processed in different regions. Subsequently, a manufacturing method of the display device 100 according to an embodiment of the disclosure is illustrated.
- FIG. 2A to FIG. 6A are schematic top views of part of the manufacturing process of a display device according to an embodiment of the disclosure.
- FIG. 2B to FIG. 6B are schematic cross-sectional views along the line AA′ of FIG. 2A to FIG. 6A .
- FIG. 1 , FIG. 2A to FIG. 6A , and FIG. 2B to FIG. 6B altogether to understand the manufacturing method of the display device 100 according to an embodiment of the disclosure.
- a substrate 110 is disposed, an element layer 120 is formed on the substrate 110 , an electrode pattern layer 130 is formed on the element layer 120 , and the electrode pattern layer 130 has multiple electrodes 132 .
- a thin film deposition process, a photomask process, and an etching process may be adopted to form the element layer 120 having multiple active elements (e.g. thin film transistors) on the substrate 110 .
- the thin film deposition process, the photomask process, and the etching process may be adopted again to form multiple electrodes 132 of the electrode pattern layer 130 on the element layer 120 .
- a photoresist layer 140 is formed on the electrode pattern layer 130 .
- a coating process 200 can be adopted to coat the low-reflective resist on the electrode pattern layer 130 to form the photoresist layer 140 .
- the coating process 200 may be a spin coating process or other suitable methods.
- first energy E 1 is provided to the photoresist layer 140 disposed corresponding to the display area 102 to form a first photoresist pattern 142 , and the first photoresist pattern 142 is formed corresponding to the electrode 132 .
- the form of the first energy E 1 is not limited.
- the first photoresist pattern 142 surrounds the electrode 132 disposed in the display area 102 .
- second energy E 2 is provided to the photoresist layer 140 disposed corresponding to the non-display area 104 to form the second photoresist pattern 144 , the second photoresist pattern 144 is formed between the electrodes 132 , and the first photoresist pattern 142 and the second photoresist pattern 144 form the photoresist pattern layer 140 A.
- the form of the second energy E 2 is not limited. As shown in FIG.
- the second photoresist pattern 144 is disposed corresponding to all the non-display areas 104 , the first photoresist pattern 142 surrounds the electrode 132 disposed in the display area 102 , and the photoresist layer 140 above the electrode 132 does not receive energy and almost does not undergo polymerization reaction.
- a developer 300 may be provided to remove part of the photoresist layer 140 to form the openings OP to expose the electrodes 132 of the electrode pattern layer 130 .
- the developer 300 mainly reacts with the photoresist layer 140 above the electrode 132 to remove the photoresist layer 140 .
- the light-emitting element 150 is disposed on the photoresist pattern layer 140 A, and the light-emitting element 150 is electrically connected to the electrode 132 of the electrode pattern layer 130 .
- the pins 152 of the light-emitting element 150 are electrically connected to the electrode 132 of the electrode pattern layer 130 through the opening OP. Accordingly, the processing of the display device 100 is completed.
- the whole manufacturing process can be performed in an Array Fab; in other words, the manufacturing process processes the photoresist pattern layer 140 A with the low-reflective resist without a transfer to the color filter fab, so the cost can be saved. Moreover, since there is no need to adopt black metal, no effect of parasitic capacitance is caused, and no photomask process is required.
- FIG. 7A to FIG. 7D are schematic cross-sectional views of part of the manufacturing process of a display device according to another embodiment of the disclosure.
- An embodiment of forming the photoresist pattern layer 140 A is illustrated in FIG. 7A to FIG. 7D .
- non-contact laser direct imaging (LDI) technology can be adopted to scan the photoresist layer 140 to form the photoresist pattern layer 140 A, and the details are illustrated in the subsequent paragraphs.
- LLI non-contact laser direct imaging
- the element layer 120 and the electrode pattern layer 130 are sequentially formed on the substrate 110 .
- the photoresist layer 140 is formed on the electrode pattern layer 130 .
- a spin coating process can be adopted to coat a low-reflective resist on the electrode pattern layer 130 to form the photoresist layer 140 .
- a first laser L 1 with the first energy E 1 is disposed, and the photoresist layer 140 is scanned to form the first photoresist pattern 142 .
- the energy range of the first laser L 1 ranges from 20 J/g to 400 J/g.
- the unit of the energy range is defined as “the energy (measured in unit of joule) absorbed by per gram of photoresist material”.
- the relatively transparent first photoresist pattern 142 (having higher transmittance and higher reflectivity) of the photoresist layer 140 may be formed.
- a second laser L 2 with the second energy E 2 is disposed, and the photoresist layer 140 is scanned to form the second photoresist pattern 144 .
- the energy range of the second laser L 2 ranges from 300 J/g to 100 J/g. With the second laser L 2 in the higher energy range, the near-black second photoresist pattern 144 (having lower transmittance and lower reflectivity) of the photoresist layer 140 may be formed.
- the developer 300 may be further provided to remove part of the photoresist layer 140 to form the openings OP to expose the electrodes 132 of the electrode pattern layer 130 .
- the laser direct imaging technology (non-contact laser patterning) is adopted to scan the photoresist layer 140 to form the first photoresist pattern 142 and the second photoresist pattern 144 in the photoresist layer 140 .
- the first laser L 1 and the second laser L 2 may be ultraviolet lasers. With such a laser scanning process, the fine-sized first photoresist pattern 142 and the fine-sized second photoresist pattern 144 can be produced, and they can be relatively compatible with the small-sized light-emitting elements 150 (e.g. Micro LEDs or Mini LEDs) in the subsequent manufacturing process.
- FIG. 8A to FIG. 8E are schematic cross-sectional views of part of the manufacturing process of a display device according to yet another embodiment of the disclosure.
- Another embodiment of forming the photoresist pattern layer 140 A is illustrated in FIG. 8A to FIG. 8E .
- a contact-type high-temperature patterning machine can be adopted to imprint the photoresist layer 140 to form the photoresist pattern layer 140 A. The details are further illustrated in the subsequent paragraphs.
- the element layer 120 and the electrode pattern layer 130 are sequentially formed on the substrate 110 .
- the photoresist layer 140 is formed on the electrode pattern layer 130 .
- the spin coating process can be adopted to coat a low-reflective resist on the electrode pattern layer 130 to form the photoresist layer 140 .
- a baking process 400 may be performed on the photoresist layer 140 to remove the solvent in the photoresist layer 140 , and the photoresist layer 140 is properly hardened.
- the temperature of the baking process 400 ranges from 80° C. to 110° C.
- the photoresist layer 140 is imprinted by a first imprinting device 502
- the photoresist layer 140 is imprinted by a second imprinting device 504 .
- the first imprinting device 502 with the first energy E 1 is disposed to imprint the photoresist layer 140 to form the first photoresist pattern 142 .
- the temperature of the first imprinting device 502 ranges from 120° C. to 200° C.
- the first imprinting device 502 is in contact with the photoresist layer 140 at a contact position 502 A.
- the relatively transparent first photoresist pattern 142 (having higher transmittance and higher reflectivity) of the photoresist layer 140 may be formed.
- the second imprinting device 504 with the second energy E 2 is disposed to imprint the photoresist layer 140 to form the second photoresist pattern 144 .
- the temperature of the second imprinting device 504 ranges from 150° C. to 300° C.
- the second imprinting device 504 is in contact with the photoresist layer 140 at a contact position 504 A. With the second imprinting device 504 in the higher temperature range, the near-black second photoresist pattern 144 (having lower transmittance and lower reflectivity) of the photoresist layer 140 may be formed.
- the developer 300 may be provided to remove part of the photoresist layer 140 to form the openings OP to expose the electrodes 132 of the electrode pattern layer 130 .
- part of the first photoresist pattern 142 located near the second photoresist pattern 144 receives heat and further undergoes the polymerization reaction, so when the developer 300 is adopted to remove the photoresist layer 140 , the part of the first photoresist pattern 142 is retained to form the openings OP as shown in FIG. 8E (corresponding to the position where the light-emitting element 150 is disposed).
- the first imprinting device 502 as shown in FIG. 8C can be further patterned, then another first imprinting device (not shown) is formed, and the middle part formed at the contact position 502 A is not in contact with the photoresist layer 140 .
- the middle part of the another first imprinting device (not shown) corresponds to the position where the formed opening OP is disposed in the subsequent process and is not in contact with the photoresist layer 140 .
- the another first imprinting device (not shown) can be adopted to perform the imprinting process as shown in FIG. 8C ; next, the second imprinting device 504 can be adopted to perform the imprinting process as shown in FIG.
- the developer 300 is adopted to perform the process of removing the photoresist as shown in FIG. 8E . Accordingly, the openings OP as shown in FIG. 8E (corresponding to the position where the light-emitting element 150 is disposed) can also be formed.
- the contact-type high-temperature patterning machine is adopted to imprint the photoresist layer 140 to process the first photoresist pattern 142 and the second photoresist pattern 144 in the photoresist layer 140 .
- the small-sized light-emitting elements 150 e.g. Micro LEDs or Mini LEDs
- the display device of the embodiments in the disclosure has the flat photoresist pattern layer 140 A, so the light-emitting element 150 can be stably held on the photoresist pattern layer 140 A.
- the yield of the electrical connection between the light-emitting elements 150 and the electrodes 132 may be improved.
- the manufacturing method of the display device of the embodiments in the disclosure can be adopted to process the photoresist pattern layer 140 A in the array fab. That is, the photoresist pattern layer 140 A can be processed without the transfer to the color filter fab, so the cost is saved. In addition, since black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted.
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Abstract
Description
- This application claims the priority benefit of Taiwan application serial no. 109146506, filed on Dec. 28, 2020. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
- The disclosure relates to a display device and a manufacturing method thereof, and more particularly, to a display device with good display quality and a manufacturing method thereof.
- Currently, the design goals of Micro LED display devices and Mini LED display devices are to dispose a low-reflection layer (e.g., resin black matrix, black metal, etc.) on the non-display area to meet requirements, such as reducing the high reflectivity of the metal traces and being close to an aesthetic taste of dark appearance.
- Conventional low-reflection layers can adopt a resin black matrix made in a color filter fab or black metal made in an array fab. With the resin black matrix, a derived cost from the transfer to the color filter fab is generated. With the black metal, an effect of parasitic capacitance is caused since the black metal is a conductor, and an extra photomask process is required.
- Moreover, if a resin black matrix or other photoresist materials are adopted as the low reflection layer in the non-display area, a significant height difference of the topography may then occur, likely leading to the mutual interference between the mass transferring and the topography height caused by the protruding height in the subsequent module manufacturing process during the bonding process of the light-emitting diodes and further resulting in poor electrical connection of the light-emitting diodes.
- The disclosure provides a display device including a flat photoresist pattern layer to carry multiple light-emitting elements. When a mass transferring process and a bonding process are performed on the multiple light-emitting elements, the yield of the electrical connection between the light-emitting elements and the electrodes may be improved.
- The disclosure provides a manufacturing method of a display device capable of processing the photoresist pattern layer in an array fab without a transfer to a color filter fab, so the cost is saved. In addition, since black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted.
- Based on the above, a display device including a display area and a non-display area is provided in the disclosure. The display device includes a substrate, an element layer, an electrode pattern layer, a photoresist pattern layer, and light-emitting elements. The element layer is disposed on the substrate. The electrode pattern layer is disposed on the element layer, and the electrode pattern layer includes multiple electrodes. The photoresist pattern layer is disposed on the electrode pattern layer. The photoresist pattern layer includes a first photoresist pattern disposed corresponding to the display area and corresponding to the electrodes and a second photoresist pattern disposed corresponding to the non-display area and between the electrodes. The light-emitting element is disposed on the photoresist pattern layer and electrically connected to the electrode of the electrode pattern layer.
- In an embodiment of the disclosure, a height of the first photoresist pattern is equal to a height of the second photoresist pattern. The light-emitting element is disposed on a plane of the photoresist pattern layer formed by the first photoresist pattern and the second photoresist pattern.
- In an embodiment of the disclosure, the photoresist pattern layer includes an opening to expose the electrodes of the electrode pattern layer. The light-emitting element is electrically connected to the electrodes of the electrode pattern layer through the opening.
- In an embodiment of the disclosure, transmittance of a visible light region of the first photoresist pattern ranges from 25% to 100%.
- In an embodiment of the disclosure, reflectivity of a visible light region of the first photoresist pattern is less than or equal to 20%.
- In an embodiment of the disclosure, transmittance of a visible light region of the second photoresist pattern ranges from 0% to 40%.
- In an embodiment of the disclosure, reflectivity of a visible light region of the second photoresist pattern is less than or equal to 15%.
- In an embodiment of the disclosure, the light-emitting element includes a micro light-emitting diode (Micro LED) or a sub-millimeter light-emitting diode (Mini LED).
- In an embodiment of the disclosure, a material of the photoresist pattern layer is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof.
- Based on the above, the disclosure further provides a manufacturing method of a display device including a display area and a non-display area. The manufacturing method of the display device include the following steps. A substrate is disposed. An element layer is formed on the substrate. An electrode pattern layer is formed on the element layer, and the electrode pattern layer includes multiple electrodes. A photoresist layer is formed on the electrode pattern layer. First energy is provided to the photoresist layer corresponding to the display area to form a first photoresist pattern, and the first photoresist pattern is formed corresponding to the multiple electrodes. Second energy is provided to the photoresist layer corresponding to the non-display area to form a second photoresist pattern, and the second photoresist pattern is formed between the multiple electrodes. The first photoresist pattern and the second photoresist pattern form a photoresist pattern layer. A light-emitting element is disposed on the photoresist pattern layer, and the light-emitting element is electrically connected to the multiple electrodes of the electrode pattern layer.
- In an embodiment of the disclosure, a first laser with the first energy is disposed, the photoresist layer is scanned to form the first photoresist pattern, and an energy range of the first laser ranges from 20 J/g to 400 J/g. A second laser with the second energy is disposed, the photoresist layer is scanned to form the second photoresist pattern, and an energy range of the second laser ranges from 300 J/g to 100 J/g.
- In an embodiment of the disclosure, a first imprinting device with the first energy is disposed, the photoresist layer is imprinted to form the first photoresist pattern, and a temperature of the first imprinting device ranges from 120° C. to 200°. A second imprinting device with the second energy is disposed, the photoresist layer is imprinted to form the second photoresist pattern, and a temperature of the second imprinting device ranges from 150° C. to 300°.
- In an embodiment of the disclosure, the following steps are further included. A baking process is performed on the photoresist layer, and a temperature of the baking process ranges from 80° C. to 110° C. After the baking process, the photoresist layer is imprinted through the first imprinting device and the photoresist layer is imprinted through the second imprinting device.
- In an embodiment of the disclosure, a height of the first photoresist pattern is equal to a height of the second photoresist pattern. The light-emitting element is disposed on a plane of the photoresist pattern layer formed by the first photoresist pattern and the second photoresist pattern.
- In an embodiment of the disclosure, the following steps are further included. A developer is provided to remove part of the photoresist layer and to form an opening to expose the electrodes of the electrode pattern layer. The light-emitting element is electrically connected to the electrode of the electrode pattern layer through the opening.
- In an embodiment of the disclosure, transmittance of a visible light region of the first photoresist pattern ranges from 25% to 100%.
- In an embodiment of the disclosure, reflectivity of a visible light region of the first photoresist pattern is less than or equal to 20%.
- In an embodiment of the disclosure, transmittance of a visible light region of the second photoresist pattern ranges from 0% to 40%.
- In an embodiment of the disclosure, reflectivity of a visible light region of the second photoresist pattern is less than or equal to 15%.
- In the disclosure, a material of the photoresist pattern layer is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof.
- Based on the above, in the embodiments of the disclosure, the display device includes a flat photoresist pattern layer. When a mass transferring process and a bonding process are performed on multiple light-emitting elements, the yield of the electrical connection between the light-emitting elements and the electrodes may be improved. Moreover, the manufacturing method of the display device in the embodiments of the disclosure can be adapted to process the photoresist pattern layer in an array fab; that is, the photoresist pattern layer can be processed without a transfer to a color filter fab, so the cost is saved. In addition, since black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted.
- In order to make the aforementioned features and advantages of the disclosure comprehensible, embodiments accompanied with drawings are described in detail below.
-
FIG. 1 is a schematic cross-sectional view of a display device according to an embodiment of the disclosure. -
FIG. 2A toFIG. 6A are schematic top views of part of the manufacturing process of a display device according to an embodiment of the disclosure. -
FIG. 2B toFIG. 6B are schematic cross-sectional views along the line AA′ ofFIG. 2A toFIG. 6A , respectively. -
FIG. 7A toFIG. 7D are schematic cross-sectional views of part of the manufacturing process of a display device according to another embodiment of the disclosure. -
FIG. 8A toFIG. 8E are schematic cross-sectional views of part of the manufacturing process of a display device according to yet another embodiment of the disclosure. -
FIG. 1 is a schematic cross-sectional view of a display device according to an embodiment of the disclosure. Referring toFIG. 1 , adisplay device 100 has adisplay area 102 and anon-display area 104. Thedisplay device 100 includes asubstrate 110, anelement layer 120, anelectrode pattern layer 130, aphotoresist pattern layer 140A, and a light-emittingelement 150. Theelement layer 120 is disposed on thesubstrate 110. Theelectrode pattern layer 130 is disposed on theelement layer 120, and theelectrode pattern layer 130 hasmultiple electrodes 132. Thephotoresist pattern layer 140A is disposed on theelectrode pattern layer 130. Thephotoresist pattern layer 140A has afirst photoresist pattern 142 and asecond photoresist patter 144. Thefirst photoresist pattern 142 is disposed corresponding to thedisplay area 102 and disposed corresponding to theelectrode 132. Thesecond photoresist pattern 144 is disposed corresponding to thenon-display area 104 and disposed between theelectrodes 132. The light-emittingelement 150 is disposed on thephotoresist pattern layer 140A and is electrically connected to theelectrode 132 of theelectrode pattern layer 130. - Referring to
FIG. 1 , the light-emittingelement 150 may be disposed in thedisplay area 102 of thedisplay device 100 to serve as the display pixels of thedisplay device 100. The light-emittingelement 150 may include a micro light-emitting diode (Micro LED) or a sub-millimeter light-emitting diode (Mini LED). InFIG. 1 , only one light-emittingelement 150 with twopins 152 is shown. However, the type (e.g., with a single pin, two pins, or multiple pins) and the quantity of the light-emittingelements 150 are not limited thereto in the embodiments of the disclosure. By disposing multiple light-emittingelements 150 in thedisplay area 102 as display pixels, thedisplay device 100 with flexibility and fine screen may be processed. - The
non-display area 104 of thedisplay device 100 usually corresponds to a position where metal traces (not shown) are disposed. The metal traces are adapted to electrically connect multiple light-emittingelements 150 in thedisplay area 102 and to drive the driving chips (not shown) of the light-emittingelements 150. Since thesecond photoresist pattern 144 is disposed in thenon-display area 104 of thedisplay device 100, the metal traces may be shielded to reduce the high reflectivity of the metal traces, and the appearance of thedisplay device 100 may be close to the aesthetic taste of dark appearance. - The material of the
substrate 110 may include glass, quartz, or other suitable materials. Theelement layer 120 may include multiple active elements (not shown), such as a thin film transistor. The active element in theelement layer 120 may be served as a switch and electrically connected to thepin 152 of the light-emittingelement 150 through theelectrode 132 of theelectrode pattern layer 130, thereby controlling the on or off of the light-emittingelement 150. The type or the quantity of circuit elements disposed in theelement layer 120 may be selected according to design requirements, which is not limited thereto in the embodiments of the disclosure. - Referring to
FIG. 1 , in thedisplay device 100, a low-reflective resist is adopted to process thephotoresist pattern layer 140A. Low energy or a low temperature may be provided to the low-reflective resist, so the low-reflective resist undergoes a low degree of polymerization reaction, and the first photoresist pattern 142 (having higher transmittance and higher reflectivity) is formed in a position corresponding to thedisplay area 102. In an embodiment, the transmittance of the visible light region of thefirst photoresist pattern 142 may range from 25% to 100%. The reflectivity of the visible light region of thefirst photoresist pattern 142 may be less than or equal to 20%. Accordingly, the light emitted by the light-emittingelement 150 disposed in thedisplay area 102 may be smoothly output from thedisplay device 100 to present a display screen with good brightness and color. - Moreover, high energy or a high temperature may also be provided to the low-reflective resist, so the low-reflective resist undergoes a high degree of polymerization reaction, and the second photoresist pattern 144 (having lower transmittance and lower reflectivity) is formed in a position corresponding to the
non-display area 104. In an embodiment, the transmittance of the visible light region of thesecond photoresist pattern 144 may range from 0% to 40%; and the reflectivity of the visible light region of thesecond photoresist pattern 144 may be less than or equal to 15%. Accordingly, thesecond photoresist pattern 144 disposed in thenon-display area 104 may be served as a black matrix to shield the metal traces (not shown) in thenon-display area 104, the light reflected by the metal traces in thenon-display area 104 may be reduced to provide a display screen with good contrast, and this makes it possible for the appearance of thedisplay device 100 to come with the good aesthetic taste of dark appearance. - Referring to
FIG. 1 , a height H1 of thefirst photoresist pattern 142 is equal to a height H2 of thesecond photoresist pattern 144. The light-emittingelement 150 is disposed on the plane of thephotoresist pattern layer 140A formed by thefirst photoresist pattern 142 and thesecond photoresist pattern 144. Thephotoresist pattern layer 140A formed by thefirst photoresist pattern 142 and thesecond photoresist pattern 144 has a flat topography, so when the mass transferring process and the bonding process are performed on multiple light-emittingelements 150, the yield of the electrical connection between the light-emittingelements 150 and theelectrodes 132 may be improved. - Referring to
FIG. 1 , thephotoresist pattern layer 140A may have openings OP to expose theelectrodes 132 of theelectrode pattern layer 130. The light-emittingelement 150 may be electrically connected to theelectrode 132 of theelectrode pattern layer 130 through an opening OP. Note that thepins 152 of the light-emittingelement 150 may be inserted into the opening OP of thephotoresist pattern layer 140A, so the light-emittingelement 150 may be stably held on thephotoresist pattern layer 140A. InFIG. 1 , two openings OP are shown, but the quantity of the openings OP is not limited thereto in the embodiments of the disclosure, and the quantity of the openings OP can be appropriately set according to the type (e.g. the quantity of pins) of light-emittingelements 150. - In an embodiment of the disclosure, the material of the
photoresist pattern layer 140A is selected from ionomer resin, thermally sensitive resin, thermosetting resin, hydrocarbon resin, acrylonitrile butadiene styrene resin, acrylic resin, fluorocarbon resin, acetal resin, epoxide resin, ion exchange resin, ionic polymer, amino resin, furfural resin, furfural phenol resin, phenolic resin, phenol ether resin, urea-formaldehyde resin, urea resin, carbamide resin, polyvinyl chloride, polyethylene terephthlate, polyamide, ethylene-vinyl alcohol copolymer, ethylene-propylene copolymer, ethylene-tetrafluoroethylene copolymer, melamine-phenol-formaldehyde resin, and combinations thereof. - In the
display device 100 of an embodiment in the disclosure, the multiple low-reflective resist materials can be adopted to form a uniform film layer with a flat topography, adapted for carrying multiple light-emitting elements 150 (e.g. Micro LEDs or Mini LEDs). Moreover, by providing different regions of the uniform film layer with different levels of energy, thephotoresist pattern layer 140A having different transmittance and reflectivity may be processed in different regions. Subsequently, a manufacturing method of thedisplay device 100 according to an embodiment of the disclosure is illustrated. -
FIG. 2A toFIG. 6A are schematic top views of part of the manufacturing process of a display device according to an embodiment of the disclosure.FIG. 2B toFIG. 6B are schematic cross-sectional views along the line AA′ ofFIG. 2A toFIG. 6A . Refer toFIG. 1 ,FIG. 2A toFIG. 6A , andFIG. 2B toFIG. 6B altogether to understand the manufacturing method of thedisplay device 100 according to an embodiment of the disclosure. - First, referring to
FIG. 2A andFIG. 2B , the following steps are performed. Asubstrate 110 is disposed, anelement layer 120 is formed on thesubstrate 110, anelectrode pattern layer 130 is formed on theelement layer 120, and theelectrode pattern layer 130 hasmultiple electrodes 132. A thin film deposition process, a photomask process, and an etching process may be adopted to form theelement layer 120 having multiple active elements (e.g. thin film transistors) on thesubstrate 110. After theelement layer 120 is formed, the thin film deposition process, the photomask process, and the etching process may be adopted again to formmultiple electrodes 132 of theelectrode pattern layer 130 on theelement layer 120. - Next, referring to
FIG. 3A andFIG. 3B , aphotoresist layer 140 is formed on theelectrode pattern layer 130. Acoating process 200 can be adopted to coat the low-reflective resist on theelectrode pattern layer 130 to form thephotoresist layer 140. Thecoating process 200 may be a spin coating process or other suitable methods. - Next, referring to
FIG. 4A andFIG. 4B , first energy E1 is provided to thephotoresist layer 140 disposed corresponding to thedisplay area 102 to form afirst photoresist pattern 142, and thefirst photoresist pattern 142 is formed corresponding to theelectrode 132. In the embodiments of the disclosure, the form of the first energy E1 is not limited. As shown inFIG. 4A , thefirst photoresist pattern 142 surrounds theelectrode 132 disposed in thedisplay area 102. - Next, referring to
FIG. 5A andFIG. 5B , second energy E2 is provided to thephotoresist layer 140 disposed corresponding to thenon-display area 104 to form thesecond photoresist pattern 144, thesecond photoresist pattern 144 is formed between theelectrodes 132, and thefirst photoresist pattern 142 and thesecond photoresist pattern 144 form thephotoresist pattern layer 140A. In the embodiments of the disclosure, the form of the second energy E2 is not limited. As shown inFIG. 5A , thesecond photoresist pattern 144 is disposed corresponding to all thenon-display areas 104, thefirst photoresist pattern 142 surrounds theelectrode 132 disposed in thedisplay area 102, and thephotoresist layer 140 above theelectrode 132 does not receive energy and almost does not undergo polymerization reaction. - Referring to
FIG. 6A andFIG. 6B , adeveloper 300 may be provided to remove part of thephotoresist layer 140 to form the openings OP to expose theelectrodes 132 of theelectrode pattern layer 130. Thedeveloper 300 mainly reacts with thephotoresist layer 140 above theelectrode 132 to remove thephotoresist layer 140. - Subsequently, referring to
FIG. 1 , the light-emittingelement 150 is disposed on thephotoresist pattern layer 140A, and the light-emittingelement 150 is electrically connected to theelectrode 132 of theelectrode pattern layer 130. Note that, as shown inFIG. 1 , thepins 152 of the light-emittingelement 150 are electrically connected to theelectrode 132 of theelectrode pattern layer 130 through the opening OP. Accordingly, the processing of thedisplay device 100 is completed. - The whole manufacturing process can be performed in an Array Fab; in other words, the manufacturing process processes the
photoresist pattern layer 140A with the low-reflective resist without a transfer to the color filter fab, so the cost can be saved. Moreover, since there is no need to adopt black metal, no effect of parasitic capacitance is caused, and no photomask process is required. -
FIG. 7A toFIG. 7D are schematic cross-sectional views of part of the manufacturing process of a display device according to another embodiment of the disclosure. An embodiment of forming thephotoresist pattern layer 140A is illustrated inFIG. 7A toFIG. 7D . In the embodiment, non-contact laser direct imaging (LDI) technology can be adopted to scan thephotoresist layer 140 to form thephotoresist pattern layer 140A, and the details are illustrated in the subsequent paragraphs. - First, referring to
FIG. 7A , theelement layer 120 and the electrode pattern layer 130 (with the electrodes 132) are sequentially formed on thesubstrate 110. Next, thephotoresist layer 140 is formed on theelectrode pattern layer 130. A spin coating process can be adopted to coat a low-reflective resist on theelectrode pattern layer 130 to form thephotoresist layer 140. - Next, referring to
FIG. 7B , a first laser L1 with the first energy E1 is disposed, and thephotoresist layer 140 is scanned to form thefirst photoresist pattern 142. The energy range of the first laser L1 ranges from 20 J/g to 400 J/g. The unit of the energy range is defined as “the energy (measured in unit of joule) absorbed by per gram of photoresist material”. With the first laser L1 in the lower energy range, the relatively transparent first photoresist pattern 142 (having higher transmittance and higher reflectivity) of thephotoresist layer 140 may be formed. - Next, referring to
FIG. 7C , a second laser L2 with the second energy E2 is disposed, and thephotoresist layer 140 is scanned to form thesecond photoresist pattern 144. The energy range of the second laser L2 ranges from 300 J/g to 100 J/g. With the second laser L2 in the higher energy range, the near-black second photoresist pattern 144 (having lower transmittance and lower reflectivity) of thephotoresist layer 140 may be formed. - Next, referring to
FIG. 7D , thedeveloper 300 may be further provided to remove part of thephotoresist layer 140 to form the openings OP to expose theelectrodes 132 of theelectrode pattern layer 130. - In the embodiment of
FIG. 7A toFIG. 7D , the laser direct imaging technology (non-contact laser patterning) is adopted to scan thephotoresist layer 140 to form thefirst photoresist pattern 142 and thesecond photoresist pattern 144 in thephotoresist layer 140. The first laser L1 and the second laser L2 may be ultraviolet lasers. With such a laser scanning process, the fine-sizedfirst photoresist pattern 142 and the fine-sizedsecond photoresist pattern 144 can be produced, and they can be relatively compatible with the small-sized light-emitting elements 150 (e.g. Micro LEDs or Mini LEDs) in the subsequent manufacturing process. -
FIG. 8A toFIG. 8E are schematic cross-sectional views of part of the manufacturing process of a display device according to yet another embodiment of the disclosure. Another embodiment of forming thephotoresist pattern layer 140A is illustrated inFIG. 8A toFIG. 8E . In the embodiment, a contact-type high-temperature patterning machine can be adopted to imprint thephotoresist layer 140 to form thephotoresist pattern layer 140A. The details are further illustrated in the subsequent paragraphs. - First, referring to
FIG. 8A , theelement layer 120 and the electrode pattern layer 130 (with the electrodes 132) are sequentially formed on thesubstrate 110. Next, thephotoresist layer 140 is formed on theelectrode pattern layer 130. The spin coating process can be adopted to coat a low-reflective resist on theelectrode pattern layer 130 to form thephotoresist layer 140. - Referring to
FIG. 8B , abaking process 400 may be performed on thephotoresist layer 140 to remove the solvent in thephotoresist layer 140, and thephotoresist layer 140 is properly hardened. The temperature of thebaking process 400 ranges from 80° C. to 110° C. After thebaking process 400, subsequently thephotoresist layer 140 is imprinted by afirst imprinting device 502, and thephotoresist layer 140 is imprinted by asecond imprinting device 504. - Next, referring to
FIG. 8C , thefirst imprinting device 502 with the first energy E1 is disposed to imprint thephotoresist layer 140 to form thefirst photoresist pattern 142. The temperature of thefirst imprinting device 502 ranges from 120° C. to 200° C. As shown inFIG. 8C , thefirst imprinting device 502 is in contact with thephotoresist layer 140 at acontact position 502A. With thefirst imprinting device 502 in the lower temperature range, the relatively transparent first photoresist pattern 142 (having higher transmittance and higher reflectivity) of thephotoresist layer 140 may be formed. - Next, referring to
FIG. 8D , thesecond imprinting device 504 with the second energy E2 is disposed to imprint thephotoresist layer 140 to form thesecond photoresist pattern 144. The temperature of thesecond imprinting device 504 ranges from 150° C. to 300° C. As shown inFIG. 8D , thesecond imprinting device 504 is in contact with thephotoresist layer 140 at acontact position 504A. With thesecond imprinting device 504 in the higher temperature range, the near-black second photoresist pattern 144 (having lower transmittance and lower reflectivity) of thephotoresist layer 140 may be formed. - Next, referring to
FIG. 8E , thedeveloper 300 may be provided to remove part of thephotoresist layer 140 to form the openings OP to expose theelectrodes 132 of theelectrode pattern layer 130. Referring to bothFIG. 8D andFIG. 8E , in the embodiment, due to the thermal diffusion of thesecond imprinting device 504, part of thefirst photoresist pattern 142 located near thesecond photoresist pattern 144 receives heat and further undergoes the polymerization reaction, so when thedeveloper 300 is adopted to remove thephotoresist layer 140, the part of thefirst photoresist pattern 142 is retained to form the openings OP as shown inFIG. 8E (corresponding to the position where the light-emittingelement 150 is disposed). - In another embodiment, the
first imprinting device 502 as shown inFIG. 8C can be further patterned, then another first imprinting device (not shown) is formed, and the middle part formed at thecontact position 502A is not in contact with thephotoresist layer 140. The middle part of the another first imprinting device (not shown) corresponds to the position where the formed opening OP is disposed in the subsequent process and is not in contact with thephotoresist layer 140. Similarly, the another first imprinting device (not shown) can be adopted to perform the imprinting process as shown inFIG. 8C ; next, thesecond imprinting device 504 can be adopted to perform the imprinting process as shown inFIG. 8D ; and subsequently, thedeveloper 300 is adopted to perform the process of removing the photoresist as shown inFIG. 8E . Accordingly, the openings OP as shown inFIG. 8E (corresponding to the position where the light-emittingelement 150 is disposed) can also be formed. - In the embodiment of
FIG. 8A toFIG. 8E , the contact-type high-temperature patterning machine is adopted to imprint thephotoresist layer 140 to process thefirst photoresist pattern 142 and thesecond photoresist pattern 144 in thephotoresist layer 140. In the subsequent manufacturing process, the small-sized light-emitting elements 150 (e.g. Micro LEDs or Mini LEDs) can be well disposed on thephotoresist pattern layer 140A with a flat topography. - Based on the above, the display device of the embodiments in the disclosure has the flat
photoresist pattern layer 140A, so the light-emittingelement 150 can be stably held on thephotoresist pattern layer 140A. When the mass transferring process and the bonding process are performed on the multiple light-emittingelements 150, the yield of the electrical connection between the light-emittingelements 150 and theelectrodes 132 may be improved. - Moreover, the manufacturing method of the display device of the embodiments in the disclosure can be adopted to process the
photoresist pattern layer 140A in the array fab. That is, thephotoresist pattern layer 140A can be processed without the transfer to the color filter fab, so the cost is saved. In addition, since black metal is not required, no effect of parasitic capacitance is caused, and the photomask process can be omitted. - Although the disclosure has been described with reference to the above embodiments, they are not intended to limit the disclosure. It will be apparent to one of ordinary skill in the art that modifications and changes to the described embodiments may be made without departing from the spirit and the scope of the disclosure. Accordingly, the scope of the disclosure will be defined by the attached claims and their equivalents and not by the above detailed descriptions.
Claims (20)
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| TW109146506 | 2020-12-28 | ||
| TW109146506A TWI747690B (en) | 2020-12-28 | 2020-12-28 | Display device and manufacturing method thereof |
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| US20220208802A1 true US20220208802A1 (en) | 2022-06-30 |
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| US12218153B2 (en) | 2025-02-04 |
| TW202230770A (en) | 2022-08-01 |
| CN113725335A (en) | 2021-11-30 |
| TWI747690B (en) | 2021-11-21 |
| CN113725335B (en) | 2023-06-27 |
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