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US20220078922A1 - Circuit board and manufacturing method thereof - Google Patents

Circuit board and manufacturing method thereof Download PDF

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Publication number
US20220078922A1
US20220078922A1 US17/527,320 US202117527320A US2022078922A1 US 20220078922 A1 US20220078922 A1 US 20220078922A1 US 202117527320 A US202117527320 A US 202117527320A US 2022078922 A1 US2022078922 A1 US 2022078922A1
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US
United States
Prior art keywords
circuit board
groove
circuit
substrate
concave portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US17/527,320
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US11665833B2 (en
Inventor
Ming-Jaan Ho
Xian-Qin Hu
Fu-Yun Shen
Hsiao-Ting Hsu
Yong-Chao Wei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
Original Assignee
Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
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Publication date
Application filed by Avary Holding Shenzhen Co Ltd, Qing Ding Precision Electronics Huaian Co Ltd filed Critical Avary Holding Shenzhen Co Ltd
Priority to US17/527,320 priority Critical patent/US11665833B2/en
Assigned to AVARY HOLDING (SHENZHEN) CO., LIMITED., QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD reassignment AVARY HOLDING (SHENZHEN) CO., LIMITED. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HO, MING-JAAN, HSU, HSIAO-TING, HU, Xian-qin, SHEN, FU-YUN, WEI, Yong-chao
Publication of US20220078922A1 publication Critical patent/US20220078922A1/en
Application granted granted Critical
Publication of US11665833B2 publication Critical patent/US11665833B2/en
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0338Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Definitions

  • the disclosure relates to a circuit board and a manufacturing method thereof.
  • the subtractive method and the improved semi-additive method have poor ability to produce fine circuit layers, and the cost of the semi-additive method is high.
  • a circuit board manufacturing method includes the following steps:
  • the groove includes a concave portion, the concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor;
  • the circuit layer includes a connection pad located in the concave portion, the connection pad is shaped as a conductive protrusion which surrounds and is electrically connected to the conductor;
  • step (1) Repeat step (1) to step (8) at least once;
  • step (5) the side wall and bottom wall of the groove are processed by a plasma surface treatment machine.
  • the seed layer is formed by chemical vapor deposition or physical vapor deposition.
  • step (8) and before step (9), the method further includes the steps of: forming a metallization layer on the surface of the circuit layer.
  • step (1) one side of the substrate is connected to a carrier board through a separable film.
  • a circuit board includes at least two stacked circuit board units, and each of the circuit board units includes a substrate and a circuit layer.
  • the substrate is provided with a conductive hole, and a conductor is provided in the conductive hole.
  • a groove is provided on one side of the substrate.
  • the groove includes a concave portion.
  • the concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor.
  • the circuit layer includes a connection pad located in the concave portion, and the connection pad is shaped as a conductive protrusion which surrounds and is electrically connected to the conductor.
  • the circuit layer is located in the groove, and the conductive hole electrically connects the circuit layers of two adjacent circuit board units.
  • a metallization layer is provided on the surface of the circuit layer.
  • a circuit board manufacturing method includes the following steps:
  • each groove including a concave portion, the concave portion located at the conductive hole, and the diameter of the concave portion larger than the diameter of the conductive hole to expose a portion of the conductor;
  • circuit layer in each of the two grooves to obtain a circuit board, the circuit layer including a connection pad in the concave portion, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor.
  • a circuit board includes a substrate and two circuit layers.
  • the substrate is provided with a conductive hole.
  • the conductive hole is provided with a conductor.
  • the substrate is provided with a groove on both sides, and each of the two circuit layers is respectively provided in the corresponding one of the two grooves.
  • the groove includes a concave portion.
  • the concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor.
  • the circuit layer includes a connection pad located in the concave portion.
  • the connection pad is shaped as a conductive protrusion, and the conductive hole electrically connects the two circuit layers.
  • the circuit of the manufactured circuit board is formed in the groove, and the groove is formed by laser ablation. Therefore, the line width of the circuit layer is stable and the precision is high.
  • the connection pad of the circuit board of the present disclosure is a conductive protrusion to improve the conductive yield.
  • FIG. 1 is a cross-sectional view of a through hole formed in a substrate according to a first embodiment of the present disclosure.
  • FIG. 2 is a cross-sectional view of the through hole of the structure shown in FIG. 1 filled with a conductor.
  • FIG. 3 is a cross-sectional view of the structure shown in FIG. 2 covered with a peelable film.
  • FIG. 4 is a cross-sectional view of a groove formed in the peelable film and a cover layer of the structure shown in FIG. 3
  • FIG. 5 is a cross-sectional view of the structure shown in FIG. 4 with the peelable film removed.
  • FIG. 6 is a cross-sectional view of a seed layer formed in the groove of the structure shown in FIG. 5 .
  • FIG. 7 is a cross-sectional view of a circuit layer formed in the groove of the structure shown in FIG. 6 .
  • FIG. 8 is a cross-sectional view of the structure shown in FIG. 7 with a separable film and a carrier board removed.
  • FIG. 9 is a cross-sectional view of a metallization layer formed on the circuit layer of the structure shown in FIG. 8 .
  • FIG. 10 is a cross-sectional view of a circuit board according to the first embodiment and a third embodiment of the present disclosure.
  • FIG. 11 is a cross-sectional view of a through hole formed in a substrate according to a second embodiment of the present disclosure.
  • FIG. 12 is a cross-sectional view of the structure shown in FIG. 11 after a groove is formed.
  • FIG. 13 is a cross-sectional view of a circuit board according to the second embodiment and a fourth embodiment of the present disclosure.
  • an element when an element is considered to be “connected” to another element, it may be directly connected to another element or there may be an element that is centrally located at the same time. When an element is considered to be “provided on” another element, it may be placed directly on another element or there may be an element placed in the middle at the same time.
  • FIGS. 1 to 10 refer to a first embodiment of the present disclosure of a method for manufacturing a circuit board, the method includes the following steps.
  • a substrate 10 is provided, and a hole is formed in the substrate 10 to form a through hole 11 .
  • one side of the substrate 10 is connected to a carrier board 102 through a separable film 101 to facilitate processing, but it is not limited to this. In other embodiments, the separable film 101 and the carrier board 102 may be omitted.
  • the substrate 10 is a low dielectric resin material, preferably a polyester polymer base material or a polyether polymer base material, such as polyether ether ketone (PEEK), liquid crystal polymer (LCP), etc.
  • the through hole 11 is formed by laser processing. It can be understood that, in other examples, the through hole 11 may also be formed by mechanical processing.
  • the through hole 11 is filled with a conductor 111 to form a conductive hole 12 .
  • the conductor 111 is a conductive material such as conductive paste.
  • a peelable film 13 is provided for covering one side of the substrate 10 .
  • the peelable film 13 covers the side of the substrate 10 facing away from the carrier board 102 .
  • the peelable film 13 is a resin material such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), etc.
  • PI polyimide
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • a groove 15 is formed in the peelable film 13 and the substrate 10 by laser ablation.
  • the groove 15 includes a concave portion 151 .
  • the concave portion 151 is located at the conductive hole 12 , and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 to expose a portion of the conductor 111 .
  • the groove 15 is formed by laser ablation to accurately control the line width and stability and facilitate the impedance control tolerance.
  • An excimer laser is preferably used to finely adjust the opening size of the groove 15 .
  • a surface treatment is performed on a side wall and a bottom wall of the groove 15 to increase roughness.
  • the side wall and the bottom wall of the groove 15 are processed by a plasma surface treatment machine to remove residue formed from laser ablation and improve the roughness and an activating effect.
  • sandblasting may also be performed.
  • the peelable film 13 is removed.
  • a seed layer 16 is formed on the side wall and the bottom wall of the groove 15 .
  • the seed layer 16 is formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD).
  • the thickness of the seed layer 16 ranges from 0.08 microns to 2 microns.
  • the seed layer 16 may be made of nickel, copper, gold, graphite, titanium, silver, or other materials.
  • the side wall and the bottom wall of the groove 15 have high roughness, it is easy to form the seed layer 16 , while it is difficult to form the seed layer 16 on other parts.
  • a circuit layer 20 is formed in the groove 15 .
  • the circuit layer 20 includes a connection pad 21 formed in the concave portion 151 .
  • the shape of the connection pad 21 is a conductive protrusion, which surrounds and is electrically connected to the conductor 111 .
  • the circuit layer 20 can be formed by chemical plating, electroplating, sputtering, ion plating, or the like. It can be understood that during plating, the circuit layer 20 is connected to the plating power source by adding leads.
  • a ninth step referring to FIG. 8 , the separable film 101 and the carrier board 102 are removed to obtain a circuit board unit 100 .
  • the ninth step is omitted.
  • a metallization layer 22 is formed on the surface of the circuit layer 20 .
  • the metallization layer 22 is formed by tin (immersion tin). In other embodiments, it may also be silver or other soft metals.
  • the metallization layer 22 is used to ensure the reliability of electrical conduction of multiple layers of the circuit board units 100 in subsequent steps. It can be understood that in other embodiments, the tenth step may be omitted.
  • the first through tenth steps are repeated at least once.
  • a twelfth step referring to FIG. 10 , at least two of the circuit board units 100 are laminated to obtain the circuit board 200 .
  • a second embodiment of the present disclosure of a method for manufacturing a circuit board is provided, which includes following steps.
  • a substrate 10 is provided, and a hole is formed in the substrate 10 to form a through hole 11 .
  • the through hole 11 is filled with a conductor 111 to form a conductive hole 12 .
  • two peelable films 13 are provided to cover opposite sides of the substrate 10 .
  • a groove 15 is formed in each of the opposite sides of the substrate 10 and each of the two peelable films 13 by laser ablation.
  • the groove 15 includes a concave portion 151 .
  • the concave portion 151 is located at the conductive hole 12 , and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 .
  • a surface treatment is performed on a side wall and a bottom wall of each of the two grooves 15 to increase roughness.
  • the two peelable films 13 are removed.
  • a seed layer is formed on the side wall and bottom wall of each of the two grooves 15 .
  • a circuit layer 20 is formed in each of the two grooves 15 to obtain a circuit board 300 .
  • Each of the circuit layers 20 includes a connection pad 21 located in the concave portion 151 .
  • the shape of the connection pad 21 is a conductive protrusion, and the two circuit layers 20 are electrically connected through the conductor 111 .
  • FIG. 10 is a third embodiment of the present disclosure of the circuit board 200 .
  • the circuit board 200 includes at least two stacked circuit board units 100 .
  • Each of the circuit board units 100 includes a substrate 10 and a circuit layer 20 .
  • the substrate 10 has a conductive hole 12 penetrating therethrough.
  • a conductor 111 is provided in the conductive hole 12 .
  • a groove 15 is provided on one side of the substrate 10 .
  • the groove 15 includes a concave portion 151 .
  • the concave portion 151 is located at the conductive hole 12 , and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 to form a stepped hole structure, to expose a portion of the conductor 111 .
  • the circuit layer 20 is located in the groove 15 .
  • the circuit layer 20 includes a connection pad 21 located in the concave portion 151 .
  • the shape of the connection pad 21 is a conductive protrusion.
  • the connection pad 21 surrounds and is electrically connected to the conductor 111 .
  • a metallization layer 22 is provided on the surface of the circuit layer 20 .
  • the metallization layer 22 is a metal such as tin or silver.
  • FIG. 13 is a fourth embodiment of the circuit board 300 of the present disclosure.
  • the circuit board 300 includes a substrate 10 and two circuit layers 20 disposed on both sides of the substrate 10 .
  • the substrate 10 has a conductive hole 12 penetrating therethrough.
  • a conductor 111 is provided in the conductive hole 12 .
  • the substrate 10 is provided with a groove 15 on both sides.
  • the groove 15 includes a concave portion 151 .
  • the concave portion 151 is located at the conductive hole 12 , and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 .
  • Each of the two circuit layers 20 is disposed in a corresponding one of the grooves 15 .
  • Each of the two circuit layers 20 includes a connection pad 21 located in the concave portion 151 .
  • the two circuit layers 20 are electrically connected through the conductor 111 .
  • the manufacturing method of the circuit board of the present disclosure is relatively simple and the manufacturing cost is low.
  • the circuit of the manufactured circuit board 200 / 300 is formed in the groove 15 , and the groove 15 is formed by laser ablation, therefore, the line thickness of the circuit layer 20 is stable and the precision is higher.
  • the connection pad 21 of the circuit board 200 / 300 of the present disclosure is a conductive protrusion to improve the conductive yield.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

A circuit board includes at least two circuit board units stacked together. Each circuit board unit includes a substrate and a circuit layer. The substrate defines a conductive hole penetrating therethrough. The conductive hole provided with a conductor therein. One side of the substrate further defines a groove, the groove including a concave portion aligned with the conductive hole. The circuit layer includes a connection pad located in the concave portion. The connection pad is shaped as a conductive protrusion, which surrounds and is electrically connected to the conductor. The circuit layer is located in the groove, and the conductive hole is electrically connecting the circuit layers of the circuit board units.

Description

    FIELD
  • The disclosure relates to a circuit board and a manufacturing method thereof.
  • BACKGROUND
  • As the frequency of signal transmission and the number of input/output interfaces increase, higher requirements are placed on the signal transmission loss of the circuit board and the reliability of the circuit layer. In the traditional circuit layer manufacturing method, the subtractive method and the improved semi-additive method have poor ability to produce fine circuit layers, and the cost of the semi-additive method is high.
  • SUMMARY OF THE DISCLOSURE
  • In view of the above, it is necessary to provide a circuit board and a manufacturing method thereof to solve the above problems.
  • A circuit board manufacturing method includes the following steps:
  • (1) Provide a substrate, and make a hole in the substrate to form a through hole;
  • (2) Fill the through hole with a conductor to form a conductive hole;
  • (3) Provide a peelable film to cover one side of the substrate;
  • (4) Form a groove in the peelable film and the substrate by laser ablation, the groove includes a concave portion, the concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor;
  • (5) Perform a surface treatment on a side wall and bottom wall of the groove to improve roughness;
  • (6) Remove the peelable film;
  • (7) Form a seed layer on the side wall and bottom wall of the groove;
  • (8) Make a circuit layer in the groove to obtain a circuit board unit, the circuit layer includes a connection pad located in the concave portion, the connection pad is shaped as a conductive protrusion which surrounds and is electrically connected to the conductor;
  • (9) Repeat step (1) to step (8) at least once; and
  • (10) Laminate the at least two of the circuit board units.
  • Further, in step (5), the side wall and bottom wall of the groove are processed by a plasma surface treatment machine.
  • Further, in step (7), the seed layer is formed by chemical vapor deposition or physical vapor deposition.
  • Further, after step (8) and before step (9), the method further includes the steps of: forming a metallization layer on the surface of the circuit layer.
  • Further, in step (1), one side of the substrate is connected to a carrier board through a separable film.
  • A circuit board includes at least two stacked circuit board units, and each of the circuit board units includes a substrate and a circuit layer. The substrate is provided with a conductive hole, and a conductor is provided in the conductive hole. A groove is provided on one side of the substrate. The groove includes a concave portion. The concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor. The circuit layer includes a connection pad located in the concave portion, and the connection pad is shaped as a conductive protrusion which surrounds and is electrically connected to the conductor. The circuit layer is located in the groove, and the conductive hole electrically connects the circuit layers of two adjacent circuit board units.
  • Further, a metallization layer is provided on the surface of the circuit layer.
  • A circuit board manufacturing method includes the following steps:
  • Providing a substrate, and opening a hole in the substrate to form a through hole;
  • Filling the through hole with a conductor to form a conductive hole;
  • Providing two peelable films covering opposite sides of the substrate, respectively;
  • Forming grooves in the two peelable films and two sides of the substrate by laser ablation, each groove including a concave portion, the concave portion located at the conductive hole, and the diameter of the concave portion larger than the diameter of the conductive hole to expose a portion of the conductor;
  • Performing a surface treatment on a side wall and a bottom wall of each of the two grooves to improve roughness;
  • Removing the two peelable films;
  • Forming a seed layer on the side wall and the bottom wall of each of the two grooves;
  • Forming a circuit layer in each of the two grooves to obtain a circuit board, the circuit layer including a connection pad in the concave portion, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor.
  • A circuit board includes a substrate and two circuit layers. The substrate is provided with a conductive hole. The conductive hole is provided with a conductor. The substrate is provided with a groove on both sides, and each of the two circuit layers is respectively provided in the corresponding one of the two grooves. The groove includes a concave portion. The concave portion is located at the conductive hole, and the diameter of the concave portion is larger than the diameter of the conductive hole to expose a portion of the conductor. The circuit layer includes a connection pad located in the concave portion. The connection pad is shaped as a conductive protrusion, and the conductive hole electrically connects the two circuit layers. The manufacturing method of the circuit board of the present disclosure is relatively simple and the manufacturing cost is low. The circuit of the manufactured circuit board is formed in the groove, and the groove is formed by laser ablation. Therefore, the line width of the circuit layer is stable and the precision is high. The connection pad of the circuit board of the present disclosure is a conductive protrusion to improve the conductive yield.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a cross-sectional view of a through hole formed in a substrate according to a first embodiment of the present disclosure.
  • FIG. 2 is a cross-sectional view of the through hole of the structure shown in FIG. 1 filled with a conductor.
  • FIG. 3 is a cross-sectional view of the structure shown in FIG. 2 covered with a peelable film.
  • FIG. 4 is a cross-sectional view of a groove formed in the peelable film and a cover layer of the structure shown in FIG. 3
  • FIG. 5 is a cross-sectional view of the structure shown in FIG. 4 with the peelable film removed.
  • FIG. 6 is a cross-sectional view of a seed layer formed in the groove of the structure shown in FIG. 5.
  • FIG. 7 is a cross-sectional view of a circuit layer formed in the groove of the structure shown in FIG. 6.
  • FIG. 8 is a cross-sectional view of the structure shown in FIG. 7 with a separable film and a carrier board removed.
  • FIG. 9 is a cross-sectional view of a metallization layer formed on the circuit layer of the structure shown in FIG. 8.
  • FIG. 10 is a cross-sectional view of a circuit board according to the first embodiment and a third embodiment of the present disclosure.
  • FIG. 11 is a cross-sectional view of a through hole formed in a substrate according to a second embodiment of the present disclosure.
  • FIG. 12 is a cross-sectional view of the structure shown in FIG. 11 after a groove is formed.
  • FIG. 13 is a cross-sectional view of a circuit board according to the second embodiment and a fourth embodiment of the present disclosure.
  • SYMBOL DESCRIPTION OF MAIN COMPONENTS
  • Circuit board 200, 300
  • Circuit board unit 100
  • Substrate 10
  • Separable film 101
  • Carrier board 102
  • Through hole 11
  • Conductor 111
  • Conductive hole 12
  • Peelable film 13
  • Groove 15
  • Concave portion 151
  • Seed layer 16
  • Circuit layer 20
  • Connection pad 21
  • Metallization layer 22
  • DETAILED DESCRIPTION OF EMBODIMENTS
  • The following specific embodiments will further illustrate the present disclosure with reference to the above drawings. The technical solutions in the embodiments of the present disclosure will be described clearly and completely in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, not all of them. Based on the embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present disclosure.
  • It should be noted that when an element is considered to be “connected” to another element, it may be directly connected to another element or there may be an element that is centrally located at the same time. When an element is considered to be “provided on” another element, it may be placed directly on another element or there may be an element placed in the middle at the same time.
  • Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field of the present disclosure. The terminology used in the description of the present disclosure herein is for the purpose of describing specific embodiments, and is not intended to limit the present disclosure. The term “and/or” as used herein includes any and all combinations of one or more related listed items.
  • FIGS. 1 to 10 refer to a first embodiment of the present disclosure of a method for manufacturing a circuit board, the method includes the following steps.
  • In a first step, referring to FIG. 1, a substrate 10 is provided, and a hole is formed in the substrate 10 to form a through hole 11.
  • In this embodiment, one side of the substrate 10 is connected to a carrier board 102 through a separable film 101 to facilitate processing, but it is not limited to this. In other embodiments, the separable film 101 and the carrier board 102 may be omitted. The substrate 10 is a low dielectric resin material, preferably a polyester polymer base material or a polyether polymer base material, such as polyether ether ketone (PEEK), liquid crystal polymer (LCP), etc.
  • In this embodiment, the through hole 11 is formed by laser processing. It can be understood that, in other examples, the through hole 11 may also be formed by mechanical processing.
  • In a second step, referring to FIG. 2, the through hole 11 is filled with a conductor 111 to form a conductive hole 12.
  • The conductor 111 is a conductive material such as conductive paste.
  • In a third step, referring to FIG. 3, a peelable film 13 is provided for covering one side of the substrate 10.
  • In this embodiment, the peelable film 13 covers the side of the substrate 10 facing away from the carrier board 102.
  • The peelable film 13 is a resin material such as polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), etc.
  • In a fourth step, referring to FIG. 4, a groove 15 is formed in the peelable film 13 and the substrate 10 by laser ablation.
  • The groove 15 includes a concave portion 151. The concave portion 151 is located at the conductive hole 12, and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 to expose a portion of the conductor 111.
  • The groove 15 is formed by laser ablation to accurately control the line width and stability and facilitate the impedance control tolerance. An excimer laser is preferably used to finely adjust the opening size of the groove 15.
  • In a fifth step, a surface treatment is performed on a side wall and a bottom wall of the groove 15 to increase roughness.
  • In this embodiment, the side wall and the bottom wall of the groove 15 are processed by a plasma surface treatment machine to remove residue formed from laser ablation and improve the roughness and an activating effect.
  • It can be understood that, in other embodiments, sandblasting may also be performed.
  • In a sixth step, referring to FIG. 5, the peelable film 13 is removed.
  • In a seventh step, referring to FIG. 6, a seed layer 16 is formed on the side wall and the bottom wall of the groove 15.
  • In the present embodiment, the seed layer 16 is formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD). The thickness of the seed layer 16 ranges from 0.08 microns to 2 microns. The seed layer 16 may be made of nickel, copper, gold, graphite, titanium, silver, or other materials.
  • Since the side wall and the bottom wall of the groove 15 have high roughness, it is easy to form the seed layer 16, while it is difficult to form the seed layer 16 on other parts.
  • In an eighth step, referring to FIG. 7, a circuit layer 20 is formed in the groove 15.
  • The circuit layer 20 includes a connection pad 21 formed in the concave portion 151. The shape of the connection pad 21 is a conductive protrusion, which surrounds and is electrically connected to the conductor 111.
  • The circuit layer 20 can be formed by chemical plating, electroplating, sputtering, ion plating, or the like. It can be understood that during plating, the circuit layer 20 is connected to the plating power source by adding leads.
  • In a ninth step, referring to FIG. 8, the separable film 101 and the carrier board 102 are removed to obtain a circuit board unit 100.
  • It can be understood that in other embodiments, if the separable film 101 and the carrier board 102 are omitted, the ninth step is omitted.
  • In a tenth step, referring to FIG. 9, a metallization layer 22 is formed on the surface of the circuit layer 20. The metallization layer 22 is formed by tin (immersion tin). In other embodiments, it may also be silver or other soft metals. The metallization layer 22 is used to ensure the reliability of electrical conduction of multiple layers of the circuit board units 100 in subsequent steps. It can be understood that in other embodiments, the tenth step may be omitted.
  • In an eleventh step, the first through tenth steps are repeated at least once.
  • In a twelfth step, referring to FIG. 10, at least two of the circuit board units 100 are laminated to obtain the circuit board 200.
  • Referring to FIG. 11 to FIG. 13, a second embodiment of the present disclosure of a method for manufacturing a circuit board is provided, which includes following steps.
  • In a first step, referring to FIG. 11, a substrate 10 is provided, and a hole is formed in the substrate 10 to form a through hole 11.
  • In a second step, the through hole 11 is filled with a conductor 111 to form a conductive hole 12.
  • In a third step, two peelable films 13 are provided to cover opposite sides of the substrate 10.
  • In a fourth step, referring to FIG. 12, a groove 15 is formed in each of the opposite sides of the substrate 10 and each of the two peelable films 13 by laser ablation.
  • The groove 15 includes a concave portion 151. The concave portion 151 is located at the conductive hole 12, and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12.
  • In a fifth step, a surface treatment is performed on a side wall and a bottom wall of each of the two grooves 15 to increase roughness.
  • In a sixth step, the two peelable films 13 are removed.
  • In a seventh step, a seed layer is formed on the side wall and bottom wall of each of the two grooves 15.
  • In an eighth step, referring to FIG. 13, a circuit layer 20 is formed in each of the two grooves 15 to obtain a circuit board 300.
  • Each of the circuit layers 20 includes a connection pad 21 located in the concave portion 151. The shape of the connection pad 21 is a conductive protrusion, and the two circuit layers 20 are electrically connected through the conductor 111.
  • FIG. 10 is a third embodiment of the present disclosure of the circuit board 200. The circuit board 200 includes at least two stacked circuit board units 100. Each of the circuit board units 100 includes a substrate 10 and a circuit layer 20.
  • The substrate 10 has a conductive hole 12 penetrating therethrough. A conductor 111 is provided in the conductive hole 12.
  • A groove 15 is provided on one side of the substrate 10. The groove 15 includes a concave portion 151. The concave portion 151 is located at the conductive hole 12, and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12 to form a stepped hole structure, to expose a portion of the conductor 111.
  • The circuit layer 20 is located in the groove 15. The circuit layer 20 includes a connection pad 21 located in the concave portion 151. The shape of the connection pad 21 is a conductive protrusion. The connection pad 21 surrounds and is electrically connected to the conductor 111.
  • In this embodiment, a metallization layer 22 is provided on the surface of the circuit layer 20. The metallization layer 22 is a metal such as tin or silver.
  • FIG. 13 is a fourth embodiment of the circuit board 300 of the present disclosure. The circuit board 300 includes a substrate 10 and two circuit layers 20 disposed on both sides of the substrate 10.
  • The substrate 10 has a conductive hole 12 penetrating therethrough. A conductor 111 is provided in the conductive hole 12.
  • The substrate 10 is provided with a groove 15 on both sides. The groove 15 includes a concave portion 151. The concave portion 151 is located at the conductive hole 12, and the diameter of the concave portion 151 is larger than the diameter of the conductive hole 12.
  • Each of the two circuit layers 20 is disposed in a corresponding one of the grooves 15. Each of the two circuit layers 20 includes a connection pad 21 located in the concave portion 151. The two circuit layers 20 are electrically connected through the conductor 111.
  • The manufacturing method of the circuit board of the present disclosure is relatively simple and the manufacturing cost is low. The circuit of the manufactured circuit board 200/300 is formed in the groove 15, and the groove 15 is formed by laser ablation, therefore, the line thickness of the circuit layer 20 is stable and the precision is higher. The connection pad 21 of the circuit board 200/300 of the present disclosure is a conductive protrusion to improve the conductive yield.
  • In addition, those skilled in the art can also make other changes within the spirit of the present disclosure. Of course, these changes made in accordance with the spirit of the present disclosure should be included in the scope claimed by the present disclosure.

Claims (6)

What is claimed is:
1. A circuit board comprising:
at least two circuit board units stacked together, each of the at least two circuit board units comprising:
a substrate and a circuit layer, the substrate defining a conductive hole penetrating therethrough, a conductor disposed in the conductive hole, one side of the substrate further defining a groove, the groove comprising a concave portion aligned with the conductive hole, a diameter of the concave portion greater than a diameter of the conductive hole to expose a portion of the conductor, the circuit layer comprising a connection pad located in the concave portion, the connection pad shaped as a conductive protrusion which surrounds and is electrically connected to the conductor, the circuit layer located in the groove, and the conductive hole electrically connecting the circuit layers of the at least stacked circuit board units together.
2. The circuit board according to claim 1, wherein a metallization layer is provided on a surface of the circuit layer.
3. The circuit board according to claim 2, wherein the metallization layer is made of tin or silver.
4. The circuit board according to claim 1, further comprising a seed layer formed on a side wall and a bottom wall of the groove
5. The circuit board according to claim 1, wherein the conductor is a made of a conductive paste.
6. The circuit board according to claim 1, wherein the substrate is made of a polyester polymer base material or a polyether polymer base material.
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US11212922B2 (en) 2021-12-28
US11665833B2 (en) 2023-05-30

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