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US20200035497A1 - Processing apparatus - Google Patents

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US20200035497A1
US20200035497A1 US16/596,056 US201916596056A US2020035497A1 US 20200035497 A1 US20200035497 A1 US 20200035497A1 US 201916596056 A US201916596056 A US 201916596056A US 2020035497 A1 US2020035497 A1 US 2020035497A1
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Prior art keywords
film
silicon
processing apparatus
gas
chamber
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US16/596,056
Inventor
Akinobu Kakimoto
Yoshinobu Hayakawa
Satoshi Mizunaga
Yasuhiro Hamada
Mitsuhiro Okada
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to US16/596,056 priority Critical patent/US20200035497A1/en
Assigned to TOKYO ELECTRON LIMITED reassignment TOKYO ELECTRON LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HAMADA, YASUHIRO, KAKIMOTO, AKINOBU, MIZUNAGA, SATOSHI, HAYAKAWA, YOSHINOBU, OKADA, MITSUHIRO
Publication of US20200035497A1 publication Critical patent/US20200035497A1/en
Priority to US17/902,918 priority patent/US12482663B2/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • H10P50/242
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/52Controlling or regulating the coating process
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54Apparatus specially adapted for continuous coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082Radio frequency generated discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32798Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32899Multiple chambers, e.g. cluster tools
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • H10P50/283
    • H10P50/691
    • H10P50/73
    • H10P72/0421
    • H10P72/0468
    • H10P72/0612
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32Processing objects by plasma generation
    • H01J2237/33Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334Etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H10P50/692
    • H10P50/693

Definitions

  • the present invention relates to substrate processing systems and substrate processing methods.
  • Patent Document 1 Japanese Laid-open Patent Publication No. 2014-17438
  • an etching rate may decrease as the depth of the hole becomes greater because of the decrease in the number of ions in the plasma that reaches the bottom of the hole. Consequently, the aspect ratio becomes low, and desired characteristic of a semiconductor device may not be achieved.
  • An object of an aspect of present invention is to perform a favorable etching process while the formation of the bowing shape is suppressed.
  • a substrate processing system including an etching apparatus configured to supply a gas containing fluorocarbon to generate plasma so as to perform an etching process on a film including silicon formed on a substrate, wherein the etching process is performed by using plasma through a mask formed on the film including silicon; a film forming apparatus configured to supply a gas containing carbon so as to form a film including carbon on the etched film including silicon, wherein the film forming apparatus is provided separately from the etching apparatus, the etching apparatus performing, a first etching step in which the film including silicon is partway etched by using plasma; and a second etching step in which the film including silicon, on which the film including carbon is formed, is further etched by using plasma, the film forming apparatus performing a film forming step in which the film including carbon is formed, without generating plasma, on the film including silicon on which the first etching step has been performed.
  • FIG. 1 is an example configuration of the substrate processing system.
  • FIG. 2 is a longitudinal cross sectional view of the substrate processing system 1 (including PC 1 and PC 2 ).
  • FIG. 3A is a diagram illustrating a bowing shape.
  • FIG. 3B is another diagram illustrating the bowing shape.
  • FIG. 4 is a diagram illustrating a substrate processing method.
  • FIG. 5 is a diagram illustrating examples of carbon film.
  • FIG. 6 is a diagram illustrating an example effect of the substrate processing method.
  • FIG. 7 is a diagram illustrating a substrate processing method of variation 1.
  • FIG. 8 is a diagram illustrating an example effect of the substrate processing method of variation 1.
  • FIG. 9 is a diagram illustrating an example effect of a substrate processing method of variation 2.
  • FIG. 1 is an example configuration of the substrate processing system 1 of the present embodiment.
  • the substrate processing system 1 includes a process chamber (hereinafter simply referred to as “PC”) PC 1 that processes a substrate in-situ and a process chamber PC 2 that processes a substrate ex-situ.
  • the PC 1 and the PC 2 are separately provided as discrete chambers.
  • the PC 1 and the PC 2 are connected via a transfer chamber (hereinafter referred to as “TC”) and a conveyance mechanism 2 .
  • the PC 1 and the TC, and the TC and the conveyance mechanism 2 are connected via a gate valve G so that the connection is open/close by the gate valve G.
  • the interiors of the PC 1 and TC are in a reduced pressure state.
  • a conveyance apparatus 52 for holding and carrying in/out the substrate is provided in the TC.
  • the conveyance apparatus 52 includes a rotation/expansion and contraction unit 53 that is rotatable and able to be expanded and contracted and two blades 54 a and 54 b that hold the substrate at the front end of the rotation/expansion and contraction unit 53 .
  • the blades 54 a and 54 b are mounted on the rotation/expansion and contraction unit 53 so that respective blades face opposite sides.
  • the conveyance mechanism 2 conveys the substrate between the TC and the PC 2 .
  • the conveyance mechanism 2 may be configured so that the conveyance mechanism 2 runs on a rail with holding the substrate on a tray disposed in the conveyance mechanism 2 .
  • the PC 1 generates plasma, and serves as an etching apparatus for performing etching process on a film formed on the substrate by using the plasma.
  • the PC 1 may serve as an ashing apparatus for performing ashing process on the film formed on the substrate by using plasma.
  • PC 2 is a film forming apparatus for forming a film on the substrate without using plasma.
  • the PC 2 serves as a thermal CVD (Chemical Vapor Deposition) apparatus for forming a carbon film on the substrate by using heat.
  • the thermal CVD apparatus is not a limiting example of the PC 2 . Any types of apparatus may be chosen as long as the apparatus can uniformly form a film inside (at least side wall of) a pattern on the substrate etched by the PC 1 .
  • the substrate processing system 1 includes a control unit 40 for controlling an etching process, a film forming process, and an ashing process of the substrate and a conveyance process of the substrate.
  • Control programs for performing the etching process, the film forming process, the ashing process, and the conveyance process, and processing recipe in which respective processing conditions are set are stored in a storage unit 42 .
  • the storage unit 42 may be a hard disk, or may be a portable recording medium such as a CDROM (Compact Disc Read Only Memory), a DVD (Digital Versatile Disk), and a flash memory.
  • the processing recipe may be transmitted from another apparatus through a dedicated line if needed.
  • control unit 40 performs the etching process, the film forming process, the ashing process, and the conveyance process, etc., according to the processing recipe stored in the storage unit 42 in response to user's instruction input through a user interface 41 .
  • FIG. 2 is a longitudinal cross sectional view of the substrate processing system 1 (including PC 1 and PC 2 ) of the present embodiment.
  • FIG. 2 illustrates a non-limiting example configuration of PC 1 and PC 2 .
  • the PC 1 is exemplified as a Capacitively Coupled Plasma (CCP) processing apparatus.
  • CCP Capacitively Coupled Plasma
  • the configuration of PC 1 may be applied to other substrate processing apparatuses.
  • ICP Inductively Coupled Plasma
  • CVD Chemical Vapor Deposition
  • HWP Helicon Wave Plasma
  • ECR Electron Cyclotron Resonance Plasma
  • the PC 1 and the TC perform the process and conveyance of the substrate under a reduced pressure while the conveyance mechanism 2 and the PC 2 perform the process and conveyance of the substrate under an atmospheric pressure.
  • the PC 1 includes processing chamber made of aluminum, etc., having an anodized surface.
  • a mounting table 12 for mounting the substrate W is disposed inside the PC 1 .
  • a high frequency power supply 14 is connected to the mounting table 12 , and high frequency power at a predetermined frequency (e.g. 60 MHz) for generating plasma is supplied from the high frequency power supply 14 .
  • a shower head 16 is disposed at a ceiling of the PC 1 .
  • Gas is supplied in shower-like form from a plurality of gas supply holes 18 formed at lower portion of the shower head 16 .
  • a gas containing fluorocarbon is supplied, and a film including silicon formed on the substrate is etched by the generated plasma.
  • An etching gas may be a single gas of fluorocarbon (CF) gas, or may be a mixed gas containing fluorocarbon gas.
  • the etching gas may include hexafluoro-1,3-butadiene C 4 F 6 gas as the gas containing fluorocarbon.
  • the substrate W is carried into the PC 2 by using the conveyance apparatus 52 of the TC and the conveyance mechanism 2 .
  • the PC 2 includes a cylindrical outer wall 22 having a ceiling and an inner wall 24 provided inside the outer wall 22 .
  • the outer wall 22 and the inner wall 24 are made of quartz.
  • a plurality of substrates W are stored in a processing chamber 30 inside the inner wall 24 .
  • the PC 2 performs a film forming process collectively on a plurality of substrates W.
  • the outer wall 22 and the inner wall 24 are separated from each other having a circular space 26 therebetween, and coupled to a base member 28 at respective lower ends.
  • a gas containing carbon (C) is supplied as a film forming gas.
  • the supplied gas containing carbon flows from lower side to upper side of the processing chamber 30 being sucked by the circular space 26 to be exhausted.
  • the film forming gas may be a single gas containing carbon, or may be a mixed gas including the gas containing carbon.
  • the film forming gas may include ethylene (C 2 H 4 ) gas or other carbon (C x H y ) gas as the gas containing carbon.
  • the film forming gas may include chlorine (Cl 2 ) gas as a thermal decomposition temperature decreasing gas.
  • the film forming gas may include an inactive gas such as nitrogen (N 2 ) gas.
  • the PC 2 thermally decomposes the film forming gas to form a film including carbon on the film including silicon formed on the substrate.
  • the PC 2 may be a single-wafer film forming apparatus.
  • the substrate processing system 1 of the present embodiment firstly, the substrate W is carried into the PC 1 and the etching process is performed by the PC 1 . Then, the substrate W is carried into the PC 2 , and carbon film forming process is performed by the PC 2 . Further, the substrate is carried into the PC 1 , and the etching process is performed again by the PC 1 . Finally, the carbon film is removed by the PC 1 .
  • a silicon oxide (SiO 2 ) film 126 on the silicon substrate 125 , a silicon oxide (SiO 2 ) film 126 , a silicon nitride (SiN) film 127 , and a polysilicon mask 128 are formed.
  • the silicon oxide (SiO 2 ) film is exemplified as a film including silicon that is an etching object film.
  • this is not a limiting example of the film including silicon that is the etching object film.
  • a silicon-containing oxide (SiO x ) film, silicon nitride (SiN) film, or laminated film of the silicon-containing oxide film and the silicon nitride film may be used.
  • the mask may be an amorphous carbon mask, or a metal-containing mask.
  • a hole-shaped or line-shaped pattern as desired is formed on the polysilicon mask 128 .
  • the silicon oxide film 126 is etched into a desired shape such as hole-shape
  • amount of radical in plasma reaching a bottom of the hole decreases as the depth of the etched hole becomes greater. Therefore, not only the bottom of a contact hole but also side portion thereof is etched. Consequently, as illustrated in FIG. 3B , the bowing shape is formed, in which bowing CD at a lower portion of the hole becomes greater than a top CD at upper portion of the hole.
  • the etching pattern is in a bowing shape, favorable device characteristics are unlikely to be obtained in comparison to a case where the etching pattern is in a vertical shape as illustrated in FIG. 3A .
  • the substrate processing system 1 of the present embodiment performs a substrate processing method, in which the formation of the bowing shape is suppressed while favorable etching process can be performed.
  • the substrate processing method performed by the substrate processing system 1 of the present embodiment will be described with reference to FIG. 4 .
  • FIG. 4 illustrates the substrate processing method of the present embodiment.
  • FIG. 4( a ) illustrates the silicon oxide film 126 formed on the silicon substrate 125 before being etched.
  • the silicon oxide film 126 , the silicon nitride film 127 , and the polysilicon mask 128 are formed on the silicon substrate 125 .
  • the polysilicon mask 128 may be the amorphous carbon mask, or the metal-containing mask.
  • the silicon nitride film 127 may not be included.
  • the silicon substrate 125 is carried into the PC 1 .
  • the silicon nitride film 127 and the silicon oxide film 126 are etched in the PC 1 .
  • the silicon oxide film 126 is partway etched in the PC 1 (first etching step: half etching). “partway etched” means not only that the silicon oxide film 126 is etched in a depth direction to approximately half depth but also that the silicon oxide film 126 is etched in a depth direction to an extent without forming the bowing shape.
  • An example etching process condition is that the pressure is 2.66 Pa, the frequency of the high frequency power HF is 60 MHz, the power thereof is 1200 W, and the gas is mixture of C 4 F 6 gas, C 4 F 8 gas, Ar gas, and O 2 gas.
  • the silicon substrate 125 is carried from the PC 1 to the PC 2 .
  • the carbon film 130 is formed on the etched silicon oxide film 126 in the PC 2 .
  • the carbon film 130 is uniformly formed on the inner wall of the pattern formed on the silicon oxide film 126 (film forming step).
  • the film formed on the silicon oxide film 126 may not be carbon film 130 but a film including carbon.
  • An example process condition of the carbon film forming is that the pressure is 997 Pa, the temperature is 400° C., and the gas is mixture of C 2 H 4 gas and Cl 2 gas.
  • FIG. 5 is a diagram illustrating examples of carbon films formed by the thermal CVD apparatus used as the PC 2 of the present embodiment. According to a graph illustrated in FIG. 5 , a thickness of the carbon film 130 illustrated in FIG. 5(A) becomes 4.7 nm at film forming time 50 min., while a thickness of the carbon film 130 illustrated in FIG. 5(B) becomes 10.3 nm at film forming time 90 min. Regarding both carbon films 130 formed on the silicon oxide films 126 illustrated in FIG. 5(A) and FIG. 5(B) , the carbon film 130 with uniform thickness is formed on side walls and bottom walls of the etching pattern formed on the silicon oxide film 126 .
  • the film forming step illustrated in FIG. 4( c ) may be performed in-situ in the PC 1 .
  • the uniformity of thickness of the carbon film 130 is important when the carbon film 130 whose thickness is 1 nm-2 nm is formed.
  • the carbon film 130 becomes thinner at bottom side of the etching pattern than at upper side thereof because the ion is unlikely to enter into the bottom side of the etching pattern, and the like. Accordingly, it is difficult to form the carbon film 130 with uniform thickness on the silicon oxide film 126 .
  • the film forming step of FIG. 4( c ) is performed in non-plasma environment (without using plasma) to form the carbon film 130 .
  • the silicon substrate 125 is carried from the PC 2 to the PC 1 after forming the film.
  • the silicon oxide film 126 is further etched in the PC 1 (second etching step: full etching).
  • the carbon film 130 serves as a protection film formed on the side wall of the silicon oxide film 126 , thereby suppressing formation of the bowing shape in the etching pattern.
  • the process condition of the etching in FIG. 4( d ) may be the same as that in FIG. 4( b ) .
  • the process condition of the etching in FIG. 4( d ) may be different from that in FIG. 4( b ) as long as a gas including fluorocarbon is supplied into the PC 1 .
  • the etching of the silicon oxide film 126 may be finished when the silicon oxide film 126 is fully etched and the silicon substrate 125 , which is a ground layer, is exposed.
  • the etching of the silicon oxide film 126 may be finished when a combination of the second etching step ( FIG. 4( d ) ) and the film forming step ( FIG. 4( c ) ) are performed in the PC 1 and the PC 2 a predetermined times repeatedly.
  • the ashing process is performed in the PC 1 after the second etching step, thereby removing the carbon film 130 (second ashing step).
  • oxygen plasma generated from oxygen gas may be used.
  • FIG. 6 is a diagram illustrating an example effect of the substrate processing method of the present embodiment.
  • FIG. 6( b ) is a diagram illustrating the pattern after the half etching ( FIG. 4( b ) ).
  • FIG. 6( f ) is a diagram illustrating the pattern after the full etching without forming the carbon film.
  • FIG. 6( e ) is a diagram illustrating the pattern after the full etching ( FIG. 4( d ) ) with the carbon film whose thickness is 1 nm.
  • FIG. 6( h ) is a diagram illustrating the pattern after the full etching, where the full etching is performed after forming the carbon film whose thickness is 1 nm and further performing treatment with monosilane (SiH 4 ). Additionally, FIG. 6 illustrates the example in a case where the silicon nitride film 127 is not laminated.
  • the top CD is 43.8 nm and the bowing CD is 46.9 nm.
  • the top CD is 49.7 nm and the bowing CD is 56.2 nm.
  • the top CD is 48.9 nm and the bowing CD is 52.8 nm.
  • the top CD is 48.7 nm and the bowing CD is 51.4 nm.
  • the bowing CD is improved in a case where the carbon film is formed than a case where the carbon film is not formed. That is, when the carbon film is formed during the etching, the carbon film serves as the protection film to suppress the bowing shape formed in the etching.
  • the bowing CD is further improved in a case where treatment with monosilane (SiH 4 ) is performed after than a case where the carbon film is not formed and a case where the carbon film whose thickness is 1 nm is formed. It is conceived that the film including silicon formed on the carbon film serves as the protection film as well as the carbon film to suppress the bowing shape.
  • a single gas of monosilane (SiH 4 ) or mixture of monosilane gas and dilution gas (N 2 gas, H 2 gas, etc.) may be used.
  • the silicon oxide film 126 is protected by the carbon film 130 in the remaining etching step to suppress the bowing shape. Consequently, the etching shape can be vertical and favorable device characteristics can be obtained.
  • FIG. 7 is a diagram illustrating the substrate processing method of variation 1.
  • FIG. 8 is a diagram illustrating an example effect of the substrate processing method of variation 1.
  • the substrate processing method of variation 1 illustrated in FIG. 7 is different from the substrate processing method illustrated in FIG. 4 in that an ashing step illustrated in FIG. 7( g ) is inserted between the half etching step illustrated in FIG. 4( b ) and FIG. 7( b ) and the film forming step illustrated in FIG. 4( c ) and FIG. 7( c ) .
  • reaction product 131 of polymer generated through the etching is deposited on the polysilicon mask 128 after the half etching is performed on the silicon oxide film 126 . Therefore, the film forming step illustrated in FIG. 7( c ) is preferably performed after removing the deposited reaction product 131 in the ashing step illustrated in FIG. 7( g ) .
  • oxygen plasma generated from oxygen gas may be used.
  • the carbon film can be more uniformly formed by removing the reaction product 131 deposited on the polysilicon mask 128 .
  • FIG. 8 illustrates examples in a case where the silicon nitride film 127 is laminated.
  • case 3 the pattern is illustrated, where the pattern of “case 3” is formed through the half etching (200 seconds), the ashing, the carbon film (whose thickness is 1 nm) forming, the full etching (150 seconds), and the ashing.
  • case 4 the pattern is illustrated, where the pattern of “case 4” is formed through the half etching (200 seconds), the ashing, the carbon film (whose thickness is 2 nm) forming, the full etching (150 seconds), and the ashing.
  • the top CD is 55.6 nm in case 2, 52.9 nm in case 3, and 54.2 nm in case 4.
  • the bowing CD is 65.6 nm in case 2, 58.2 nm in case 3, and 57.5 nm in case 4.
  • the bowing shape can be suppressed in a case where the carbon film 130 whose thickness is greater than or equal to 1 nm is formed than a case where the carbon film 130 is not formed.
  • the bowing shape can be more certainly suppressed in a case where the carbon film 130 whose thickness is 2 nm is formed than a case where the carbon film 130 whose thickness is 1 nm is formed.
  • the reaction product 131 deposited on the polysilicon mask 128 can be removed.
  • the carbon film can be more uniformly formed on the inner wall of the etching pattern in the film forming step after the ashing. Consequently, the bowing shape can be effectively suppressed in the remaining etching step.
  • FIG. 9 is a diagram illustrating an example effect of the substrate processing method of variation 2.
  • the carbon film is formed as the protection film.
  • a silicon film is formed instead of the carbon film.
  • a silicon film forming step is performed instead of the carbon film forming step illustrated in FIG. 7( c ) after the half etching step illustrated in FIG. 7( b ) and the ashing step illustrated in FIG. 7( g ) are sequentially performed.
  • the silicon film is formed as a protection film instead of the carbon film 130 illustrated in FIG. 7( c ) .
  • the full etching step illustrated in FIG. 7( d ) is performed.
  • FIG. 9 is a diagram illustrating a result of the substrate processing method of variation 2.
  • the bowing CD after the half etching in a case where the protection film is not formed, the bowing CD after the full etching in a case where the protection film is formed, and bowing CDs after the full etching in a case where the protection film is formed are described in a line before the last line of FIG. 9 .
  • cases where the protection film is formed cases where the carbon (C) films whose thickness are 2 nm and 3 nm are formed and a case where a silicon (Si) film whose thickness is 3 nm is formed are described.
  • Si silicon
  • an example process condition of the silicon film forming is that the pressure is 133 Pa (1 Torr), the temperature is 380° C., the gas is a mixed gas containing Si 2 H 6 /N 2 .
  • the bowing shape can be suppressed in a case where the carbon film or the silicon film is formed, as a protection film, after the half etching in comparison to a case where the full etching is performed without forming the protection film.
  • the bowing shape is hardly formed in a case where the carbon film whose thickness is 3 nm is formed as the protection film after the half etching. Also, according to the result illustrated in FIG. 9 , almost equal effect of suppression of the bowing shape can be obtained in a case where the carbon film whose thickness is 2 nm is formed as the protection film and in a case where the silicon film whose thickness is 3 nm is formed as the protection film.
  • the bowing shape can be suppressed both by the carbon film and by the silicon film.
  • the bowing shape can be more effectively suppressed by forming the carbon film as the protection film than forming the silicon film.
  • the silicon film is formed as the protection film instead of the carbon film, this is not a limiting example.
  • two or more laminated layers of the carbon film and the silicon film may be formed as the protection film.
  • the carbon film may be formed prior to the silicon film, or the silicon film may be formed prior to the carbon film.
  • film forming processes for forming the laminated layer of the carbon film and the silicon film may be performed subsequently in the same chamber of the PC 2 illustrated in FIG. 1 , where the process condition such as the type of gas is changed.
  • a treatment with a single gas of monosilane (SiH 4 ) or mixed gas containing monosilane may be also performed after the film forming step for forming the silicon film or mixture of the silicon film and the carbon film and before the full etching.
  • the substrate processing system and the substrate processing method have been described with respect to a above described embodiment for a complete and clear disclosure, the substrate processing system and the substrate processing method are not to be thus limited but are to be construed as embodying all modifications and alternative constructions within a range of the present invention.
  • the substrate processing system may process various types of substrates such as a wafer, a large substrate used for a FPD (Flat Panel Display) and a substrate used for EL element or solar battery.
  • substrates such as a wafer, a large substrate used for a FPD (Flat Panel Display) and a substrate used for EL element or solar battery.

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Abstract

A processing apparatus includes a chamber having a gas inlet and a gas outlet; a plasma generator; and a controller configured to cause: (a) etching a silicon-containing film to a first depth with a first plasma in the chamber, thereby forming a recess in the silicon-containing film; (b) forming a protection film on a side wall of the recess with a second plasma in the chamber, the protection film having a first thickness at an upper portion of the recess and a second thickness at a lower portion of the recess, the second thickness being smaller than the first thickness; and (c) etching the silicon-containing film to a second depth with the third plasma in the chamber, the second depth being greater than the first depth.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • The present application is a continuation application of U.S. patent application Ser. No. 15/310,840 filed on Nov. 14, 2016, which is the National Stage of International Application No. PCT/JP2015/066114 filed on Jun. 3, 2015, claiming priority based on Japanese Priority Application No. 2014-123164 filed on Jun. 16, 2014, and Japanese Priority Application No. 2014-203619 filed on Oct. 2, 2014, the entire contents of which are hereby incorporated herein by reference.
  • TECHNICAL FIELD
  • The present invention relates to substrate processing systems and substrate processing methods.
  • BACKGROUND ART
  • In plasma etching of contact hole having high aspect ratio, it is difficult for ion to reach a bottom of the contact hole as a depth of the hole becomes greater. Therefore, not only the bottom of the contact hole but also the side wall thereof is etched. Consequently, a bowing shape is formed, in which a diameter (referred to as Critical Dimension (CD) value) at upper side of the hole is greater than the CD at lower side of the hole. Hence, a technology is proposed, in which a desired film is formed on a side wall of a pattern after the etching of the hole is completed so as to repair a form of the pattern (e.g., Patent Document 1).
  • CITATION LIST Patent Document [Patent Document 1]: Japanese Laid-open Patent Publication No. 2014-17438 SUMMARY OF INVENTION Technical Problem
  • However, in a case where the film is formed after the etching of the hole is completed, an etching rate may decrease as the depth of the hole becomes greater because of the decrease in the number of ions in the plasma that reaches the bottom of the hole. Consequently, the aspect ratio becomes low, and desired characteristic of a semiconductor device may not be achieved.
  • An object of an aspect of present invention is to perform a favorable etching process while the formation of the bowing shape is suppressed.
  • Solution to Problems
  • According to an embodiment of the present invention, there is provided a substrate processing system including an etching apparatus configured to supply a gas containing fluorocarbon to generate plasma so as to perform an etching process on a film including silicon formed on a substrate, wherein the etching process is performed by using plasma through a mask formed on the film including silicon; a film forming apparatus configured to supply a gas containing carbon so as to form a film including carbon on the etched film including silicon, wherein the film forming apparatus is provided separately from the etching apparatus, the etching apparatus performing, a first etching step in which the film including silicon is partway etched by using plasma; and a second etching step in which the film including silicon, on which the film including carbon is formed, is further etched by using plasma, the film forming apparatus performing a film forming step in which the film including carbon is formed, without generating plasma, on the film including silicon on which the first etching step has been performed.
  • Advantageous Effects of Invention
  • According to an aspect of the present invention, it is possible to perform a favorable etching process while the formation of the bowing shape is suppressed.
  • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1 is an example configuration of the substrate processing system.
  • FIG. 2 is a longitudinal cross sectional view of the substrate processing system 1 (including PC1 and PC2).
  • FIG. 3A is a diagram illustrating a bowing shape.
  • FIG. 3B is another diagram illustrating the bowing shape.
  • FIG. 4 is a diagram illustrating a substrate processing method.
  • FIG. 5 is a diagram illustrating examples of carbon film.
  • FIG. 6 is a diagram illustrating an example effect of the substrate processing method.
  • FIG. 7 is a diagram illustrating a substrate processing method of variation 1.
  • FIG. 8 is a diagram illustrating an example effect of the substrate processing method of variation 1.
  • FIG. 9 is a diagram illustrating an example effect of a substrate processing method of variation 2.
  • DESCRIPTION OF EMBODIMENTS
  • Herein below, embodiments of the present invention will be described with reference to the accompanying drawings. Additionally, in the present specification and drawings, identical reference numerals will be applied to elements or the like that have substantially similar functions and configurations to those in another embodiment, and descriptions thereof may be omitted.
  • <Example Configuration of Substrate Processing System>
  • First, an example configuration of a substrate processing system 1 of an embodiment of the present invention will be described with reference to FIG. 1. FIG. 1 is an example configuration of the substrate processing system 1 of the present embodiment. The substrate processing system 1 includes a process chamber (hereinafter simply referred to as “PC”) PC1 that processes a substrate in-situ and a process chamber PC2 that processes a substrate ex-situ. The PC1 and the PC2 are separately provided as discrete chambers.
  • The PC1 and the PC2 are connected via a transfer chamber (hereinafter referred to as “TC”) and a conveyance mechanism 2. The PC1 and the TC, and the TC and the conveyance mechanism 2 are connected via a gate valve G so that the connection is open/close by the gate valve G. The interiors of the PC1 and TC are in a reduced pressure state. By carrying in and carrying out the substrate by opening and closing the gate valve G, the inside of the PC1 is isolated from outside air to keep a predetermined vacuum degree.
  • A conveyance apparatus 52 for holding and carrying in/out the substrate is provided in the TC. The conveyance apparatus 52 includes a rotation/expansion and contraction unit 53 that is rotatable and able to be expanded and contracted and two blades 54 a and 54 b that hold the substrate at the front end of the rotation/expansion and contraction unit 53. The blades 54 a and 54 b are mounted on the rotation/expansion and contraction unit 53 so that respective blades face opposite sides.
  • The conveyance mechanism 2 conveys the substrate between the TC and the PC2. For example, the conveyance mechanism 2 may be configured so that the conveyance mechanism 2 runs on a rail with holding the substrate on a tray disposed in the conveyance mechanism 2.
  • The PC1 generates plasma, and serves as an etching apparatus for performing etching process on a film formed on the substrate by using the plasma. The PC1 may serve as an ashing apparatus for performing ashing process on the film formed on the substrate by using plasma.
  • PC2 is a film forming apparatus for forming a film on the substrate without using plasma. In the present embodiment, the PC2 serves as a thermal CVD (Chemical Vapor Deposition) apparatus for forming a carbon film on the substrate by using heat. However, the thermal CVD apparatus is not a limiting example of the PC2. Any types of apparatus may be chosen as long as the apparatus can uniformly form a film inside (at least side wall of) a pattern on the substrate etched by the PC1.
  • The substrate processing system 1 includes a control unit 40 for controlling an etching process, a film forming process, and an ashing process of the substrate and a conveyance process of the substrate. Control programs for performing the etching process, the film forming process, the ashing process, and the conveyance process, and processing recipe in which respective processing conditions are set are stored in a storage unit 42. The storage unit 42 may be a hard disk, or may be a portable recording medium such as a CDROM (Compact Disc Read Only Memory), a DVD (Digital Versatile Disk), and a flash memory. Also, for example, the processing recipe may be transmitted from another apparatus through a dedicated line if needed.
  • For example, the control unit 40 performs the etching process, the film forming process, the ashing process, and the conveyance process, etc., according to the processing recipe stored in the storage unit 42 in response to user's instruction input through a user interface 41.
  • <Example Configuration of PC1/PC2>
  • <PC1: Etching Apparatus>
  • An example configuration of the PC1 and the PC2 of the present embodiment is briefly described with reference to FIG. 2. FIG. 2 is a longitudinal cross sectional view of the substrate processing system 1 (including PC1 and PC2) of the present embodiment. However, FIG. 2 illustrates a non-limiting example configuration of PC1 and PC2. For example, the PC1 is exemplified as a Capacitively Coupled Plasma (CCP) processing apparatus. However, the configuration of PC1 may be applied to other substrate processing apparatuses. An Inductively Coupled Plasma (ICP) processing apparatus, a CVD (Chemical Vapor Deposition) apparatus using a radial line slot antenna, a Helicon Wave Plasma (HWP) processing apparatus, and an Electron Cyclotron Resonance Plasma (ECR) processing apparatus may be included in the other substrate processing apparatuses.
  • The PC1 and the TC perform the process and conveyance of the substrate under a reduced pressure while the conveyance mechanism 2 and the PC2 perform the process and conveyance of the substrate under an atmospheric pressure. The PC1 includes processing chamber made of aluminum, etc., having an anodized surface. A mounting table 12 for mounting the substrate W is disposed inside the PC1. A high frequency power supply 14 is connected to the mounting table 12, and high frequency power at a predetermined frequency (e.g. 60 MHz) for generating plasma is supplied from the high frequency power supply 14.
  • A shower head 16 is disposed at a ceiling of the PC1. Gas is supplied in shower-like form from a plurality of gas supply holes 18 formed at lower portion of the shower head 16. In the present embodiment, a gas containing fluorocarbon is supplied, and a film including silicon formed on the substrate is etched by the generated plasma.
  • An etching gas may be a single gas of fluorocarbon (CF) gas, or may be a mixed gas containing fluorocarbon gas. The etching gas may include hexafluoro-1,3-butadiene C4F6 gas as the gas containing fluorocarbon.
  • After the film including silicon formed on the substrate W is etched in the PC1, the substrate W is carried into the PC2 by using the conveyance apparatus 52 of the TC and the conveyance mechanism 2.
  • <PC2: Thermal CVD Apparatus>
  • The PC2 includes a cylindrical outer wall 22 having a ceiling and an inner wall 24 provided inside the outer wall 22. For example, the outer wall 22 and the inner wall 24 are made of quartz. A plurality of substrates W are stored in a processing chamber 30 inside the inner wall 24. The PC2 performs a film forming process collectively on a plurality of substrates W. The outer wall 22 and the inner wall 24 are separated from each other having a circular space 26 therebetween, and coupled to a base member 28 at respective lower ends.
  • In the present embodiment, a gas containing carbon (C) is supplied as a film forming gas. The supplied gas containing carbon flows from lower side to upper side of the processing chamber 30 being sucked by the circular space 26 to be exhausted.
  • The film forming gas may be a single gas containing carbon, or may be a mixed gas including the gas containing carbon. The film forming gas may include ethylene (C2H4) gas or other carbon (CxHy) gas as the gas containing carbon. The film forming gas may include chlorine (Cl2) gas as a thermal decomposition temperature decreasing gas. Also, the film forming gas may include an inactive gas such as nitrogen (N2) gas. The PC2 thermally decomposes the film forming gas to form a film including carbon on the film including silicon formed on the substrate. The PC2 may be a single-wafer film forming apparatus.
  • Hereinabove, an example configuration of the PC1 and the PC2 is described. According to the substrate processing system 1 of the present embodiment, firstly, the substrate W is carried into the PC1 and the etching process is performed by the PC1. Then, the substrate W is carried into the PC2, and carbon film forming process is performed by the PC2. Further, the substrate is carried into the PC1, and the etching process is performed again by the PC1. Finally, the carbon film is removed by the PC1.
  • <Bowing Shape>
  • In the following, the bowing shape formed in an etching pattern will be described with reference to FIG. 3A and FIG. 3B. As illustrated in FIG. 3A, on the silicon substrate 125, a silicon oxide (SiO2) film 126, a silicon nitride (SiN) film 127, and a polysilicon mask 128 are formed.
  • In the present embodiment, the silicon oxide (SiO2) film is exemplified as a film including silicon that is an etching object film. However, this is not a limiting example of the film including silicon that is the etching object film. A silicon-containing oxide (SiOx) film, silicon nitride (SiN) film, or laminated film of the silicon-containing oxide film and the silicon nitride film may be used. The mask may be an amorphous carbon mask, or a metal-containing mask.
  • A hole-shaped or line-shaped pattern as desired is formed on the polysilicon mask 128. In a case where the silicon oxide film 126 is etched into a desired shape such as hole-shape, amount of radical in plasma reaching a bottom of the hole decreases as the depth of the etched hole becomes greater. Therefore, not only the bottom of a contact hole but also side portion thereof is etched. Consequently, as illustrated in FIG. 3B, the bowing shape is formed, in which bowing CD at a lower portion of the hole becomes greater than a top CD at upper portion of the hole. In a case where the etching pattern is in a bowing shape, favorable device characteristics are unlikely to be obtained in comparison to a case where the etching pattern is in a vertical shape as illustrated in FIG. 3A.
  • Therefore, the substrate processing system 1 of the present embodiment performs a substrate processing method, in which the formation of the bowing shape is suppressed while favorable etching process can be performed. In the following, the substrate processing method performed by the substrate processing system 1 of the present embodiment will be described with reference to FIG. 4.
  • <Substrate Processing Method>
  • FIG. 4 illustrates the substrate processing method of the present embodiment. FIG. 4(a) illustrates the silicon oxide film 126 formed on the silicon substrate 125 before being etched. The silicon oxide film 126, the silicon nitride film 127, and the polysilicon mask 128 are formed on the silicon substrate 125. Additionally, the polysilicon mask 128 may be the amorphous carbon mask, or the metal-containing mask. Also, the silicon nitride film 127 may not be included.
  • <Half Etching>
  • In the substrate processing method of the present embodiment, first, the silicon substrate 125 is carried into the PC1. The silicon nitride film 127 and the silicon oxide film 126 are etched in the PC1. As illustrated in FIG. 4(B), the silicon oxide film 126 is partway etched in the PC1 (first etching step: half etching). “partway etched” means not only that the silicon oxide film 126 is etched in a depth direction to approximately half depth but also that the silicon oxide film 126 is etched in a depth direction to an extent without forming the bowing shape.
  • An example etching process condition is that the pressure is 2.66 Pa, the frequency of the high frequency power HF is 60 MHz, the power thereof is 1200 W, and the gas is mixture of C4F6 gas, C4F8 gas, Ar gas, and O2 gas.
  • <Carbon Film Forming>
  • Then, the silicon substrate 125 is carried from the PC1 to the PC2. As illustrated in FIG. 4(c), the carbon film 130 is formed on the etched silicon oxide film 126 in the PC2. Thus, the carbon film 130 is uniformly formed on the inner wall of the pattern formed on the silicon oxide film 126 (film forming step). Additionally, the film formed on the silicon oxide film 126 may not be carbon film 130 but a film including carbon.
  • An example process condition of the carbon film forming is that the pressure is 997 Pa, the temperature is 400° C., and the gas is mixture of C2H4 gas and Cl2 gas.
  • FIG. 5 is a diagram illustrating examples of carbon films formed by the thermal CVD apparatus used as the PC2 of the present embodiment. According to a graph illustrated in FIG. 5, a thickness of the carbon film 130 illustrated in FIG. 5(A) becomes 4.7 nm at film forming time 50 min., while a thickness of the carbon film 130 illustrated in FIG. 5(B) becomes 10.3 nm at film forming time 90 min. Regarding both carbon films 130 formed on the silicon oxide films 126 illustrated in FIG. 5(A) and FIG. 5(B), the carbon film 130 with uniform thickness is formed on side walls and bottom walls of the etching pattern formed on the silicon oxide film 126.
  • According to a relationship between the film forming time and the thickness of the carbon film illustrated in the graph of FIG. 5, 30 min. of the film forming time is required to form the carbon film 130 of the present embodiment because a required thickness of the carbon film 130 is 1 nm-2 nm.
  • Additionally, it is conceivable that the film forming step illustrated in FIG. 4(c) may be performed in-situ in the PC1. However, the uniformity of thickness of the carbon film 130 is important when the carbon film 130 whose thickness is 1 nm-2 nm is formed.
  • On the other hand, in a case where the carbon film 130 is formed by using plasma in the PC1, the carbon film 130 becomes thinner at bottom side of the etching pattern than at upper side thereof because the ion is unlikely to enter into the bottom side of the etching pattern, and the like. Accordingly, it is difficult to form the carbon film 130 with uniform thickness on the silicon oxide film 126. Hence, it is preferable that the film forming step of FIG. 4(c) is performed in non-plasma environment (without using plasma) to form the carbon film 130.
  • <Full Etching>
  • Referring back to FIG. 4(c), the silicon substrate 125 is carried from the PC2 to the PC1 after forming the film. As illustrated in FIG. 4(d), the silicon oxide film 126 is further etched in the PC1 (second etching step: full etching). In the full etching, the carbon film 130 serves as a protection film formed on the side wall of the silicon oxide film 126, thereby suppressing formation of the bowing shape in the etching pattern.
  • The process condition of the etching in FIG. 4(d) may be the same as that in FIG. 4(b). The process condition of the etching in FIG. 4(d) may be different from that in FIG. 4(b) as long as a gas including fluorocarbon is supplied into the PC1.
  • In the second etching step, in the PC1, the etching of the silicon oxide film 126 may be finished when the silicon oxide film 126 is fully etched and the silicon substrate 125, which is a ground layer, is exposed. The etching of the silicon oxide film 126 may be finished when a combination of the second etching step (FIG. 4(d)) and the film forming step (FIG. 4(c)) are performed in the PC1 and the PC2 a predetermined times repeatedly.
  • <Ashing>
  • Then, as illustrated in FIG. 4(e), the ashing process is performed in the PC1 after the second etching step, thereby removing the carbon film 130 (second ashing step). In the ashing, oxygen plasma generated from oxygen gas may be used.
  • Hereinabove, the substrate processing method using the substrate processing system 1 is described. In the following, an example effect of the substrate processing method of the present embodiment will be described with reference to FIG. 6.
  • <Example Effect>
  • FIG. 6 is a diagram illustrating an example effect of the substrate processing method of the present embodiment. FIG. 6(b) is a diagram illustrating the pattern after the half etching (FIG. 4(b)). FIG. 6(f) is a diagram illustrating the pattern after the full etching without forming the carbon film. FIG. 6(e) is a diagram illustrating the pattern after the full etching (FIG. 4(d)) with the carbon film whose thickness is 1 nm. FIG. 6(h) is a diagram illustrating the pattern after the full etching, where the full etching is performed after forming the carbon film whose thickness is 1 nm and further performing treatment with monosilane (SiH4). Additionally, FIG. 6 illustrates the example in a case where the silicon nitride film 127 is not laminated.
  • In the pattern after the half etching illustrated in FIG. 6(b), the top CD is 43.8 nm and the bowing CD is 46.9 nm.
  • In the pattern after the full etching without forming the carbon film illustrated in FIG. 6(f), the top CD is 49.7 nm and the bowing CD is 56.2 nm. In the pattern after full etching with 1 nm-carbon film illustrated in FIG. 6(e), the top CD is 48.9 nm and the bowing CD is 52.8 nm.
  • In the pattern after full etching with 1 nm-carbon film and monosilane (SiH4) treatment illustrated in FIG. 6(h), the top CD is 48.7 nm and the bowing CD is 51.4 nm.
  • As described above, the bowing CD is improved in a case where the carbon film is formed than a case where the carbon film is not formed. That is, when the carbon film is formed during the etching, the carbon film serves as the protection film to suppress the bowing shape formed in the etching.
  • Moreover, the bowing CD is further improved in a case where treatment with monosilane (SiH4) is performed after than a case where the carbon film is not formed and a case where the carbon film whose thickness is 1 nm is formed. It is conceived that the film including silicon formed on the carbon film serves as the protection film as well as the carbon film to suppress the bowing shape.
  • Additionally, in the treatment after forming the carbon film, a single gas of monosilane (SiH4) or mixture of monosilane gas and dilution gas (N2 gas, H2 gas, etc.) may be used.
  • As described above, according to the substrate processing method of the present embodiment, by performing a carbon film forming step during the etching step, the silicon oxide film 126 is protected by the carbon film 130 in the remaining etching step to suppress the bowing shape. Consequently, the etching shape can be vertical and favorable device characteristics can be obtained.
  • <Variation 1>
  • In the following a substrate processing method of variation 1 will be described with reference to FIG. 7 and FIG. 8. FIG. 7 is a diagram illustrating the substrate processing method of variation 1. FIG. 8 is a diagram illustrating an example effect of the substrate processing method of variation 1.
  • The substrate processing method of variation 1 illustrated in FIG. 7 is different from the substrate processing method illustrated in FIG. 4 in that an ashing step illustrated in FIG. 7(g) is inserted between the half etching step illustrated in FIG. 4(b) and FIG. 7(b) and the film forming step illustrated in FIG. 4(c) and FIG. 7(c).
  • As illustrated in FIG. 7(b), reaction product 131 of polymer generated through the etching is deposited on the polysilicon mask 128 after the half etching is performed on the silicon oxide film 126. Therefore, the film forming step illustrated in FIG. 7(c) is preferably performed after removing the deposited reaction product 131 in the ashing step illustrated in FIG. 7(g). In the ashing step (first ashing step) illustrated in FIG. 7(g) and in the ashing step (second ashing step) illustrated in FIG. 7(e), oxygen plasma generated from oxygen gas may be used.
  • In this way, the carbon film can be more uniformly formed by removing the reaction product 131 deposited on the polysilicon mask 128.
  • <Example Effect>
  • An example effect of the substrate processing method of variation 1 and an example effect of thickness of the carbon film will be described with reference to FIG. 8. Additionally, FIG. 8 illustrates examples in a case where the silicon nitride film 127 is laminated.
  • In “case 1” illustrated in a leftmost portion of FIG. 8, the pattern after the half etching (200 seconds) illustrated in FIG. 7(b) and further the ashing (first ashing step) illustrated in FIG. 7(g) is performed is illustrated.
  • In “case 2”, the pattern after the full etching (350 seconds) without performing the half etching is performed and further the ashing is performed is illustrated.
  • In “case 3”, the pattern is illustrated, where the pattern of “case 3” is formed through the half etching (200 seconds), the ashing, the carbon film (whose thickness is 1 nm) forming, the full etching (150 seconds), and the ashing.
  • In “case 4”, the pattern is illustrated, where the pattern of “case 4” is formed through the half etching (200 seconds), the ashing, the carbon film (whose thickness is 2 nm) forming, the full etching (150 seconds), and the ashing.
  • The top CD is 55.6 nm in case 2, 52.9 nm in case 3, and 54.2 nm in case 4. The bowing CD is 65.6 nm in case 2, 58.2 nm in case 3, and 57.5 nm in case 4.
  • Thus, the bowing shape can be suppressed in a case where the carbon film 130 whose thickness is greater than or equal to 1 nm is formed than a case where the carbon film 130 is not formed.
  • Also, the bowing shape can be more certainly suppressed in a case where the carbon film 130 whose thickness is 2 nm is formed than a case where the carbon film 130 whose thickness is 1 nm is formed.
  • As described above, according to the substrate processing method of variation 1, by performing the ashing after the half etching, the reaction product 131 deposited on the polysilicon mask 128 can be removed. In this way, the carbon film can be more uniformly formed on the inner wall of the etching pattern in the film forming step after the ashing. Consequently, the bowing shape can be effectively suppressed in the remaining etching step.
  • <Variation 2>
  • In the following, the substrate processing method of variation 2 will be described with reference to FIG. 9. FIG. 9 is a diagram illustrating an example effect of the substrate processing method of variation 2. In the substrate processing methods of above-described embodiment and variation 1, the carbon film is formed as the protection film. On the other hand, in the substrate processing method of variation 2, a silicon film is formed instead of the carbon film.
  • Specifically, a silicon film forming step is performed instead of the carbon film forming step illustrated in FIG. 7(c) after the half etching step illustrated in FIG. 7(b) and the ashing step illustrated in FIG. 7(g) are sequentially performed. According to the step, the silicon film is formed as a protection film instead of the carbon film 130 illustrated in FIG. 7(c). Then, the full etching step illustrated in FIG. 7(d) is performed.
  • FIG. 9 is a diagram illustrating a result of the substrate processing method of variation 2. The bowing CD after the half etching in a case where the protection film is not formed, the bowing CD after the full etching in a case where the protection film is formed, and bowing CDs after the full etching in a case where the protection film is formed are described in a line before the last line of FIG. 9. As cases where the protection film is formed, cases where the carbon (C) films whose thickness are 2 nm and 3 nm are formed and a case where a silicon (Si) film whose thickness is 3 nm is formed are described. Also, in the last line of FIG. 9, differences between bowing CDs after the full etching in a case where the protection film is not formed and the bowing CDs after the full etching in a case where the protection film is formed are described.
  • Additionally, an example process condition of the silicon film forming is that the pressure is 133 Pa (1 Torr), the temperature is 380° C., the gas is a mixed gas containing Si2H6/N2.
  • As described above, the bowing shape can be suppressed in a case where the carbon film or the silicon film is formed, as a protection film, after the half etching in comparison to a case where the full etching is performed without forming the protection film.
  • Also, according to the result illustrated in FIG. 9, the bowing shape is hardly formed in a case where the carbon film whose thickness is 3 nm is formed as the protection film after the half etching. Also, according to the result illustrated in FIG. 9, almost equal effect of suppression of the bowing shape can be obtained in a case where the carbon film whose thickness is 2 nm is formed as the protection film and in a case where the silicon film whose thickness is 3 nm is formed as the protection film.
  • As described above, the bowing shape can be suppressed both by the carbon film and by the silicon film. However, taking the throughput into account, the bowing shape can be more effectively suppressed by forming the carbon film as the protection film than forming the silicon film.
  • Additionally, although in the substrate processing method of variation 2, the silicon film is formed as the protection film instead of the carbon film, this is not a limiting example. For example, two or more laminated layers of the carbon film and the silicon film may be formed as the protection film. In this case, the carbon film may be formed prior to the silicon film, or the silicon film may be formed prior to the carbon film. Also, film forming processes for forming the laminated layer of the carbon film and the silicon film may be performed subsequently in the same chamber of the PC2 illustrated in FIG. 1, where the process condition such as the type of gas is changed.
  • Additionally, in variation 2, in the PC2, a treatment with a single gas of monosilane (SiH4) or mixed gas containing monosilane may be also performed after the film forming step for forming the silicon film or mixture of the silicon film and the carbon film and before the full etching.
  • Herein above, although the substrate processing system and the substrate processing method have been described with respect to a above described embodiment for a complete and clear disclosure, the substrate processing system and the substrate processing method are not to be thus limited but are to be construed as embodying all modifications and alternative constructions within a range of the present invention.
  • Also, the substrate processing system may process various types of substrates such as a wafer, a large substrate used for a FPD (Flat Panel Display) and a substrate used for EL element or solar battery.
  • REFERENCE SIGNS LIST
      • 1: substrate processing system
      • 2: conveyance mechanism
      • 12: mounting table
      • 14: high frequency power supply
      • 16: shower head
      • 22: outer wall
      • 24: inner wall
      • 30: processing chamber
      • 40: control unit
      • 42: storage unit
      • 52: conveyance apparatus
      • 125: silicon substrate
      • 126: silicon oxide film
      • 127: silicon nitride film
      • 128: polysilicon mask
      • 130: carbon film
      • 131: reaction product
      • PC1 and PC2: process chambers
      • TC: transfer chamber
      • T: top CD
      • B: bowing CD

Claims (35)

What is claimed is:
1. A processing apparatus, comprising:
a chamber having a gas inlet and a gas outlet;
a plasma generator; and
a controller configured to cause:
(a) etching a silicon-containing film to a first depth with a first plasma in the chamber, thereby forming a recess in the silicon-containing film;
(b) forming a protection film on a side wall of the recess with a second plasma in the chamber, the protection film having a first thickness at an upper portion of the recess and a second thickness at a lower portion of the recess, the second thickness being smaller than the first thickness; and
(c) etching the silicon-containing film to a second depth with the third plasma in the chamber, the second depth being greater than the first depth.
2. The processing apparatus according to claim 1, wherein the silicon-containing film is formed of a silicon-containing oxide film, a silicon nitride film, or a stacked film of the silicon-containing oxide film and the silicon nitride film.
3. The processing apparatus according to claim 1, wherein the protection film contains silicon or carbon.
4. The processing apparatus according to claim 1, wherein the protection film includes at least two stacked films of a carbon film and a silicon film.
5. The processing apparatus according to claim 1, wherein the step (b) initially forms a carbon-containing film and subsequently forms a silicon-containing film.
6. The processing apparatus according to claim 1, wherein the step (a) continues before the recess has a bowing shape.
7. The processing apparatus according to claim 1, wherein a cycle of the steps (b) and (c) is repeated multiple times.
8. The processing apparatus according to claim 1, further comprising: a gas supplying part configured to supply a etching gas and a film forming gas into the chamber.
9. The processing apparatus according to claim 1, further comprising: a gas supplying part configured to supply a gas containing fluorocarbon into the chamber.
10. The processing apparatus according to claim 1, further comprising: a gas supplying part configured to supply a gas containing carbon into the chamber.
11. The processing apparatus according to claim 1, further comprising: a gas supplying part configured to supply a gas containing silicon into the chamber.
12. The processing apparatus according to claim 1, wherein (a), (b) and (c) are performed in-situ.
13. A processing apparatus, comprising:
a chamber having a gas inlet and a gas outlet;
a plasma generator; and
a controller configured to cause:
(a) etching a silicon-containing film to a first depth with a first plasma in the chamber, thereby forming a recess in the silicon-containing film;
(b) forming a protection film on a side wall of the recess in the chamber, the protection film having a first thickness at an upper portion of the recess and a second thickness at a lower portion of the recess, the second thickness being smaller than the first thickness; and
(c) etching the silicon-containing film to a second depth with the second plasma in the chamber, the second depth being greater than the first depth
wherein (a), (b) and (c) is performed in-situ.
14. The processing apparatus according to claim 9, wherein the film is formed of a silicon-containing oxide film, a silicon nitride film, or a stacked film of the silicon-containing oxide film and the silicon nitride film.
15. The processing apparatus according to claim 9, wherein the protection film contains silicon or carbon.
16. The processing apparatus according to claim 9, wherein the protection film includes at least two stacked films of a carbon film and a silicon film.
17. The processing apparatus according to claim 9, wherein the step (b) initially forms a carbon-containing film and subsequently forms a silicon-containing film.
18. The processing apparatus according to claim 9, wherein the step (a) continues before the recess has a bowing shape.
19. The processing apparatus according to claim 9, wherein a cycle of the steps (b) and (c) is repeated multiple times.
20. The processing apparatus according to claim 9, further comprising: a gas supplying part configured to supply a etching gas and a film forming gas into the chamber.
21. The processing apparatus according to claim 9, further comprising: a gas supplying part configured to supply a gas containing fluorocarbon into the chamber.
22. The processing apparatus according to claim 9, further comprising: a gas supplying part configured to supply a gas containing carbon into the chamber.
23. The processing apparatus according to claim 9, further comprising: a gas supplying part configured to supply a gas containing silicon into the chamber.
24. The processing apparatus according to claim 9, wherein (a), (b) and (c) are performed in-situ.
25. A processing apparatus, comprising:
a chamber having a gas inlet and a gas outlet;
a plasma generator; and
a controller configured to cause:
(a) etching a film to a first depth with a first plasma, thereby forming a recess in the silicon-containing film;
(b) forming a protection film on a side wall of the recess, the protection film having a first thickness at an upper portion of the recess and a second thickness at a lower portion of the recess, the second thickness being smaller than the first thickness; and
(c) etching the film to a second depth with the second plasma, the second depth being greater than the first depth.
26. The processing apparatus according to claim 25, wherein the silicon-containing film is formed of a silicon-containing oxide film, a silicon nitride film, or a stacked film of the silicon-containing oxide film and the silicon nitride film.
27. The processing apparatus according to claim 25, wherein the protection film contains silicon or carbon.
28. The processing apparatus according to claim 25, wherein the protection film includes at least two stacked films of a carbon film and a silicon film.
29. The processing apparatus according to claim 25, wherein the step (b) initially forms a carbon-containing film and subsequently forms a silicon-containing film.
30. The processing apparatus according to claim 25, wherein the step (a) continues before the recess has a bowing shape.
31. The processing apparatus according to claim 25, wherein a cycle of the steps (b) and (c) is repeated multiple times.
32. The processing apparatus according to claim 25, further comprising: a gas supplying part configured to supply a etching gas and a film forming gas into the chamber.
33. The processing apparatus according to claim 25, further comprising: a gas supplying part configured to supply a gas containing fluorocarbon into the chamber.
34. The processing apparatus according to claim 25, further comprising: a gas supplying part configured to supply a gas containing carbon into the chamber.
35. The processing apparatus according to claim 25, further comprising: a gas supplying part configured to supply a gas containing silicon into the chamber.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11955316B2 (en) 2019-10-01 2024-04-09 Tokyo Electron Limited Substrate processing method, method for manufacturing semiconducor device, and plasma processing apparatus
US12482663B2 (en) 2014-06-16 2025-11-25 Tokyo Electron Limited Processing apparatus

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6514138B2 (en) * 2016-03-10 2019-05-15 東芝メモリ株式会社 Semiconductor device manufacturing method
JP6757624B2 (en) 2016-08-12 2020-09-23 東京エレクトロン株式会社 How to process the object to be processed
JP6670707B2 (en) * 2016-08-24 2020-03-25 東京エレクトロン株式会社 Substrate processing method
JP6840041B2 (en) * 2017-06-21 2021-03-10 東京エレクトロン株式会社 Etching method
JP6877290B2 (en) 2017-08-03 2021-05-26 東京エレクトロン株式会社 How to process the object to be processed
KR102372892B1 (en) * 2017-08-10 2022-03-10 삼성전자주식회사 method of manufacturing integrated circuit device
CN110783187B (en) * 2018-07-25 2024-04-19 东京毅力科创株式会社 Plasma processing method and plasma processing apparatus
TWI815325B (en) * 2018-07-27 2023-09-11 美商應用材料股份有限公司 3d nand etch
CN111261514B (en) * 2018-11-30 2024-09-24 东京毅力科创株式会社 Substrate processing method
CN112397411B (en) * 2019-08-13 2024-08-06 台湾积体电路制造股份有限公司 Process system including extraction device and monitoring method thereof
US12266535B2 (en) 2019-10-01 2025-04-01 Lam Researh Corporation Mask encapsulation to prevent degradation during fabrication of high aspect ratio features
JP2021150380A (en) 2020-03-17 2021-09-27 キオクシア株式会社 Film treatment method and manufacturing method of semiconductor device
US11171012B1 (en) * 2020-05-27 2021-11-09 Tokyo Electron Limited Method and apparatus for formation of protective sidewall layer for bow reduction
US12266534B2 (en) 2020-06-15 2025-04-01 Tokyo Electron Limited Forming a semiconductor device using a protective layer
TWI893134B (en) * 2020-06-19 2025-08-11 日商東京威力科創股份有限公司 Etching method, substrate processing apparatus, and substrate processing system
JP7478059B2 (en) * 2020-08-05 2024-05-02 株式会社アルバック Silicon dry etching method
JP7565763B2 (en) * 2020-11-17 2024-10-11 東京エレクトロン株式会社 SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM
US12119226B2 (en) * 2021-03-29 2024-10-15 Changxin Memory Technologies, Inc. Method for manufacturing mask structure, semiconductor structure and manufacturing method thereof
TW202247287A (en) * 2021-04-01 2022-12-01 日商東京威力科創股份有限公司 Substrate processing method and substrate processing device
TW202303749A (en) * 2021-05-20 2023-01-16 日商東京威力科創股份有限公司 Substrate processing method and substrate processing apparatus
JP7735086B2 (en) * 2021-05-31 2025-09-08 富士フイルム株式会社 Transfer film, display panel substrate, method for manufacturing display panel substrate, and display panel
JP7603635B2 (en) * 2021-07-02 2024-12-20 東京エレクトロン株式会社 Etching method and plasma processing apparatus
EP4368749A4 (en) * 2021-07-05 2025-09-24 Tokyo Electron Ltd Substrate processing method and substrate processing device
JP7667060B2 (en) 2021-10-22 2025-04-22 東京エレクトロン株式会社 Plasma processing method and plasma processing system
WO2023127817A1 (en) 2021-12-28 2023-07-06 東京エレクトロン株式会社 Substrate treatment method and plasma treatment method
JP7781725B2 (en) 2022-10-03 2025-12-08 東京エレクトロン株式会社 Etching method and plasma processing system
KR20240047924A (en) 2022-10-04 2024-04-12 도쿄엘렉트론가부시키가이샤 Plasma processing system, plasma processing apparatus, and etching method
JP7797371B2 (en) 2022-12-27 2026-01-13 東京エレクトロン株式会社 Etching method and plasma processing apparatus
US20240222132A1 (en) * 2022-12-28 2024-07-04 Tokyo Electron Limited DENSIFICATION AND REDUCTION OF SELECTIVELY DEPOSITED Si PROTECTIVE LAYER FOR MASK SELECTIVITY IMPROVEMENT IN HAR ETCHING
JP7633468B2 (en) * 2023-02-15 2025-02-19 株式会社日立ハイテク Plasma treatment method
WO2024206325A1 (en) * 2023-03-31 2024-10-03 Lam Research Corporation Dielectric etch using carbon based liner
KR20250174655A (en) 2023-04-13 2025-12-12 도쿄엘렉트론가부시키가이샤 Etching method and plasma treatment device
US12224160B2 (en) 2023-05-23 2025-02-11 Tokyo Electron Limited Topographic selective deposition
WO2025096185A1 (en) * 2023-10-31 2025-05-08 Lam Research Corporation An in-situ metal liner for improved high aspect ratio etch with bow control
WO2025128395A1 (en) * 2023-12-13 2025-06-19 Lam Research Corporation In-situ carbon liner for improved high aspect ratio etch with bow control
WO2026019766A1 (en) * 2024-07-18 2026-01-22 Lam Research Corporation High aspect ratio plasma etching with controlled declogging

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4994404A (en) 1989-08-28 1991-02-19 Motorola, Inc. Method for forming a lightly-doped drain (LDD) structure in a semiconductor device
JPH03273626A (en) 1990-03-23 1991-12-04 Matsushita Electron Corp Etching apparatus for aluminum alloy film
EP0729175A1 (en) * 1995-02-24 1996-08-28 International Business Machines Corporation Method for producing deep vertical structures in silicon substrates
JPH10261713A (en) * 1997-03-19 1998-09-29 Sony Corp Method for manufacturing semiconductor device
US5880019A (en) * 1997-04-17 1999-03-09 Taiwan Semiconductor Manufacturing Company, Ltd. Insitu contact descum for self-aligned contact process
JP4698024B2 (en) 1998-07-23 2011-06-08 サーフィス テクノロジー システムズ ピーエルシー Method and apparatus for anisotropic etching
US6488778B1 (en) 2000-03-16 2002-12-03 International Business Machines Corporation Apparatus and method for controlling wafer environment between thermal clean and thermal processing
US6527968B1 (en) 2000-03-27 2003-03-04 Applied Materials Inc. Two-stage self-cleaning silicon etch process
US6376384B1 (en) * 2000-04-24 2002-04-23 Vanguard International Semiconductor Corporation Multiple etch contact etching method incorporating post contact etch etching
JP2002110647A (en) * 2000-09-29 2002-04-12 Hitachi Ltd Method for manufacturing semiconductor integrated circuit device
JP2002313776A (en) 2001-04-19 2002-10-25 Toshiba Corp Dry etching method and dry etching apparatus
JP2003086569A (en) 2001-09-12 2003-03-20 Tokyo Electron Ltd Plasma processing method
JP2003133293A (en) 2001-10-30 2003-05-09 Mitsubishi Electric Corp Method for manufacturing semiconductor device
US7977390B2 (en) * 2002-10-11 2011-07-12 Lam Research Corporation Method for plasma etching performance enhancement
US20040097077A1 (en) * 2002-11-15 2004-05-20 Applied Materials, Inc. Method and apparatus for etching a deep trench
US6916746B1 (en) * 2003-04-09 2005-07-12 Lam Research Corporation Method for plasma etching using periodic modulation of gas chemistry
JP3976703B2 (en) * 2003-04-30 2007-09-19 エルピーダメモリ株式会社 Manufacturing method of semiconductor device
US7049702B2 (en) * 2003-08-14 2006-05-23 Taiwan Semiconductor Manufacturing Co., Ltd. Damascene structure at semiconductor substrate level
KR20070089197A (en) 2004-11-22 2007-08-30 어플라이드 머티어리얼스, 인코포레이티드 Substrate Processing Equipment Using Batch Processing Chamber
US20060264054A1 (en) 2005-04-06 2006-11-23 Gutsche Martin U Method for etching a trench in a semiconductor substrate
JP2007180493A (en) * 2005-11-30 2007-07-12 Elpida Memory Inc Manufacturing method of semiconductor device
US7842190B2 (en) * 2006-03-28 2010-11-30 Tokyo Electron Limited Plasma etching method
US7867904B2 (en) * 2006-07-19 2011-01-11 Intermolecular, Inc. Method and system for isolated and discretized process sequence integration
TW200806567A (en) * 2006-07-26 2008-02-01 Touch Micro System Tech Method of deep etching
JP5119622B2 (en) 2006-08-02 2013-01-16 大日本印刷株式会社 Dry etching method and dry etching apparatus
MY148830A (en) 2006-08-22 2013-06-14 Lam Res Corp Method for plasma etching performance enhancement
JP5074009B2 (en) 2006-11-22 2012-11-14 Sppテクノロジーズ株式会社 Method and apparatus for manufacturing etching mask for silicon structure having high aspect ratio opening and manufacturing program therefor
KR20090091307A (en) * 2006-11-22 2009-08-27 스미토모 세이미츠 고교 가부시키가이샤 A silicon structure having a high aspect ratio opening, a manufacturing method thereof, a manufacturing apparatus thereof, and a manufacturing program thereof, and a method of manufacturing an etching mask for the silicon structure thereof
JP5177997B2 (en) 2006-11-22 2013-04-10 Sppテクノロジーズ株式会社 Silicon structure having high aspect ratio opening, manufacturing method thereof, manufacturing apparatus thereof, and manufacturing program thereof
KR101070292B1 (en) * 2007-09-28 2011-10-06 주식회사 하이닉스반도체 Method of fabricating recess gate in semiconductor device
JP5226296B2 (en) * 2007-12-27 2013-07-03 東京エレクトロン株式会社 Plasma etching method, plasma etching apparatus, control program, and computer storage medium
JP2009170751A (en) 2008-01-18 2009-07-30 Fujitsu Ltd Manufacturing method of semiconductor device
JP2010021184A (en) 2008-07-08 2010-01-28 Oki Semiconductor Co Ltd Method for manufacturing infrared sensor element
US7935464B2 (en) * 2008-10-30 2011-05-03 Applied Materials, Inc. System and method for self-aligned dual patterning
JP5604063B2 (en) 2008-12-26 2014-10-08 東京エレクトロン株式会社 Substrate processing method and storage medium
EP2466627A4 (en) * 2009-08-14 2015-06-24 Ulvac Inc ETCHING METHOD
US8574447B2 (en) * 2010-03-31 2013-11-05 Lam Research Corporation Inorganic rapid alternating process for silicon etch
JP5473962B2 (en) 2011-02-22 2014-04-16 東京エレクトロン株式会社 Pattern forming method and semiconductor device manufacturing method
KR101867998B1 (en) 2011-06-14 2018-06-15 삼성전자주식회사 Method of forming a pattern
JP5981106B2 (en) * 2011-07-12 2016-08-31 東京エレクトロン株式会社 Plasma etching method
US9666414B2 (en) 2011-10-27 2017-05-30 Applied Materials, Inc. Process chamber for etching low k and other dielectric films
US20130298942A1 (en) * 2012-05-14 2013-11-14 Applied Materials, Inc. Etch remnant removal
JP2014003085A (en) * 2012-06-15 2014-01-09 Tokyo Electron Ltd Plasma etching method and plasma treatment device
US8859430B2 (en) * 2012-06-22 2014-10-14 Tokyo Electron Limited Sidewall protection of low-K material during etching and ashing
JP2012233259A (en) 2012-06-25 2012-11-29 Tokyo Electron Ltd Method for depositing amorphous carbon film, method for producing semiconductor device using the same, and computer-readable storage medium
JP6045975B2 (en) 2012-07-09 2016-12-14 東京エレクトロン株式会社 Carbon film forming method and film forming apparatus
JP6001940B2 (en) 2012-07-11 2016-10-05 東京エレクトロン株式会社 Pattern forming method and substrate processing system
US20140040847A1 (en) 2012-08-01 2014-02-06 Lsi Corporation System and method for generating physical deterministic boundary interconnect features for dual patterning technologies
JP6141855B2 (en) 2012-09-18 2017-06-07 東京エレクトロン株式会社 Plasma etching method and plasma etching apparatus
JP2014063866A (en) 2012-09-21 2014-04-10 Canon Inc Method for processing silicon substrate and method for manufacturing charged particle beam lens
JP6373150B2 (en) 2014-06-16 2018-08-15 東京エレクトロン株式会社 Substrate processing system and substrate processing method
CN112640064A (en) * 2018-08-24 2021-04-09 朗姆研究公司 Metal-containing passivation for high aspect ratio etch

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12482663B2 (en) 2014-06-16 2025-11-25 Tokyo Electron Limited Processing apparatus
US11955316B2 (en) 2019-10-01 2024-04-09 Tokyo Electron Limited Substrate processing method, method for manufacturing semiconducor device, and plasma processing apparatus

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