US20180317325A1 - Circuit board and method for manufacturing the same - Google Patents
Circuit board and method for manufacturing the same Download PDFInfo
- Publication number
- US20180317325A1 US20180317325A1 US15/636,790 US201715636790A US2018317325A1 US 20180317325 A1 US20180317325 A1 US 20180317325A1 US 201715636790 A US201715636790 A US 201715636790A US 2018317325 A1 US2018317325 A1 US 2018317325A1
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- US
- United States
- Prior art keywords
- conductive wiring
- wiring layer
- dry film
- cover
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000010410 layer Substances 0.000 claims description 89
- 239000010408 film Substances 0.000 claims description 77
- 239000000758 substrate Substances 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 25
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000013039 cover film Substances 0.000 claims description 18
- 238000005530 etching Methods 0.000 claims description 10
- 239000012790 adhesive layer Substances 0.000 claims description 8
- 238000009713 electroplating Methods 0.000 claims description 5
- 230000005855 radiation Effects 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 229920000106 Liquid crystal polymer Polymers 0.000 description 2
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000004698 Polyethylene Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000728 polyester Polymers 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/385—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0141—Liquid crystal polymer [LCP]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/032—Materials
- H05K2201/0329—Intrinsically conductive polymer [ICP]; Semiconductive polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
Definitions
- the subject matter herein generally relates to a circuit board and a method for manufacturing the circuit board.
- the circuit board may have a thick copper layer, which can provide an improved conductivity between electronic elements.
- a copper substrate needs to be etched for a long time to form the thick copper layer, which may also cause the copper substrate to be etched laterally.
- a line space and a line width of the thick copper layer need to be increased.
- the circuit board with a large line space and a large line width is not desirable. Improvement in the art is preferred.
- FIG. 1 is a flowchart of an exemplary embodiment of a method for manufacturing a circuit board.
- FIG. 2 is a diagram of a metal substrate, a first dry film, and a second dry film used in the method of FIG. 1 .
- FIG. 3 is a diagram showing the first dry film and the second dry film being formed on the metal substrate of FIG. 2 .
- FIG. 4 is a diagram showing the first dry film and the second dry film of FIG. 3 being treated by an exposure process.
- FIG. 5 is a diagram showing the first dry film of FIG. 4 being treated by a development process to form a hollow pattern.
- FIG. 6 is a diagram showing a first conductive wiring layer being formed in the hollow pattern of FIG. 5 .
- FIG. 7 is a diagram showing the first dry film and the second dry film of FIG. 6 being removed.
- FIG. 8 is a diagram showing a first cover film being formed on the first conductive wiring layer of FIG. 7 .
- FIG. 9 is a diagram showing a third dry film being formed on the metal substrate of FIG. 8 .
- FIG. 10 is a diagram showing third dry film of FIG. 9 being treated by an exposure process.
- FIG. 11 is a diagram showing a second conductive wiring layer being formed on the third dry film of FIG. 10 .
- FIG. 12 is a diagram showing a second cover film being formed on the second conductive wiring layer of FIG. 11 to form a circuit board.
- a method for manufacturing a circuit board 100 (see FIG. 12 ) is presented in accordance with an exemplary embodiment.
- the method for manufacturing the circuit board 100 is provided by way of example, as there are a variety of ways to carry out the method.
- the exemplary method can begin at block 201 .
- a metal substrate 10 a first dry film 20 , and a second dry film 30 are provided.
- the metal substrate 10 comprises a first surface 12 and a second surface 14 facing away from the first surface 12 .
- the metal substrate 10 is made of metal or metal alloy, and can be made by cutting a copper block.
- the metal substrate 10 has a thickness of about 50 ⁇ m to about 80 ⁇ m. In at least one exemplary embodiment, the metal substrate 10 has a thickness of about 70 ⁇ m.
- the first dry film 20 and the second dry film 30 have a similar structure.
- Each of the first dry film 20 and the second dry film 30 comprises a polyester layer, a photoresist layer, and a polyethylene layer (not shown) stacked together.
- the first dry film 20 has a thickness greater than a thickness of the second dry film 30 .
- the first dry film 20 has a thickness of about 75 ⁇ m.
- the second dry film 30 has a thickness of about 15 ⁇ m.
- the first dry film 20 and the second dry film 30 are respectively formed on the first surface 12 and the second surface 14 .
- the first dry film 20 and the second dry film 30 are treated by an exposure process.
- the exposure can be carried out by covering a photo mask (not shown) on the first dry film 20 facing away from the metal substrate 10 , and exposing the first dry film 20 and the second dry film 30 to ultraviolet radiation, thereby causing the second dry film 30 and an uncovered portion of the first dry film 20 to be exposed under the ultraviolet radiation and be solidified.
- a photo mask not shown
- the first dry film 20 and the second dry film 30 after the exposure process are treated by a development process, thereby forming a hollow pattern 22 in the first dry film 20 towards the first surface 12 .
- the development can be carried out by removing the photo mask, and etching a remaining portion of the first dry film 20 that is not exposed, thereby forming the hollow pattern 22 in the first dry film 20 .
- the first dry film 20 is etched by a sodium hydroxide solution having a mass concentration of about 1%.
- the metal substrate 10 is electroplated to form a first conductive wiring layer 24 in the hollow pattern 22 .
- the first conductive wiring layer 24 has a thickness of about 60 ⁇ m to about 70 ⁇ m.
- the electroplating can be panel plating that does not require any lead wire and has a simplified process.
- the first dry film 20 and the second dry film 30 are removed, thereby exposing a remaining portion of the first surface 12 .
- the cross-sectional shape of the first conductive wiring layer 24 can be varied as needed.
- the cross-sectional shape of the first conductive wiring layer 24 is substantially rectangular.
- a first cover film 40 is covered on and fills in gaps of the first conductive wiring layer 24 .
- the first cover film 40 comprises a first cover layer 42 and a first adhesive layer 44 connected to the first cover layer 42 .
- the first adhesive layer 44 is between the first cover layer 42 and the first conductive wiring layer 24 and fills in gaps of the first conductive wiring layer 24 .
- the first cover film 40 can be made of liquid crystal polymer (LCP).
- a third dry film 50 is covered on the second surface 14 .
- the third dry film 50 can have a similar structure as the first dry film 20 and the second dry film 30 .
- the third dry film 50 has a thickness the same as that of the second dry film 30 .
- the third dry film 50 is treated by an exposure process to form patterns corresponding to the first conductive wiring layer 24 .
- the metal substrate 10 is treated by a development process through the patterned third dry film 50 , thereby completely etching a portion of the metal substrate 10 from the second surface 14 to the first surface 12 , to form a second conductive wiring layer 16 . Then the third dry film 50 is removed.
- the second conductive wiring layer 16 is directly and electrically connected to the first conductive wiring layer 24 .
- a projection of the first conductive wiring layer 24 along a direction perpendicular to the circuit board 100 and a projection of the second conductive wiring layer 16 totally cover each other.
- the first conductive wiring layer 24 and the second conductive wiring layer 16 cooperatively form a conductive wiring 52 .
- the second conductive wiring layer 16 has a thickness of about 70 ⁇ m.
- a cross-sectional shape of the second conductive wiring layer 16 is substantially trapezoidal.
- a second cover film 60 is covered on and fills in gaps of the second conductive wiring layer 16 , thereby forming the circuit board 100 .
- the second cover film 60 comprises a second cover layer 62 and a second adhesive layer 64 connected to the second cover layer 62 .
- the second adhesive layer 64 is positioned between the second cover layer 62 and the second conductive wiring layer 16 and fills in gaps of the second conductive wiring layer 16 .
- the second cover film 60 can be made of a material the same as that of the first cover film 40 .
- the first dry film 20 , the second dry film 30 , and the third dry film 50 can be replaced by liquid photo resist films or fiber resin films, which are made of a photoresisting material.
- the circuit board 11 comprises a conductive wiring 52 .
- the conductive wiring 52 comprises a first conductive wiring layer 24 and a second conductive wiring layer 16 .
- the first conductive wiring layer 24 is formed by electroplating.
- the second conductive wiring layer 16 is formed by etching a metal substrate 10 .
- the first conductive wiring layer 24 and the second conductive wiring layer 16 are in direct contact and electrically connected to each other.
- a projection of the first conductive wiring layer 24 along a direction perpendicular to the circuit board 100 and a projection of the second conductive wiring layer 16 totally cover each other.
- the circuit board 100 further comprises a first cover film 40 covering and filling in gaps of the first conductive wiring layer 24 , and a second cover film 60 covering and filling in gaps of the second conductive wiring layer 16 .
- the second conductive wiring layer 16 is directly formed by etching the metal substrate 10 having a suitable thickness, thereby avoiding under etching during the etching process. Furthermore, the first conductive wiring layer 24 and the second conductive wiring layer 16 are in direct contact and electrically connected to each other to form the conductive wiring 52 . A projection of the first conductive wiring layer 24 along a direction perpendicular to the circuit board 100 and a projection of the second conductive wiring layer 16 totally cover each other. Thus, a line space and a line width of the conductive wiring 52 can be decreased.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
- The subject matter herein generally relates to a circuit board and a method for manufacturing the circuit board.
- Circuit boards are widely used in various kinds of electronic devices. The circuit board may have a thick copper layer, which can provide an improved conductivity between electronic elements. However, a copper substrate needs to be etched for a long time to form the thick copper layer, which may also cause the copper substrate to be etched laterally. Thus, a line space and a line width of the thick copper layer need to be increased. However, the circuit board with a large line space and a large line width is not desirable. Improvement in the art is preferred.
- Implementations of the present technology will now be described, by way of example only, with reference to the attached figures.
-
FIG. 1 is a flowchart of an exemplary embodiment of a method for manufacturing a circuit board. -
FIG. 2 is a diagram of a metal substrate, a first dry film, and a second dry film used in the method ofFIG. 1 . -
FIG. 3 is a diagram showing the first dry film and the second dry film being formed on the metal substrate ofFIG. 2 . -
FIG. 4 is a diagram showing the first dry film and the second dry film ofFIG. 3 being treated by an exposure process. -
FIG. 5 is a diagram showing the first dry film ofFIG. 4 being treated by a development process to form a hollow pattern. -
FIG. 6 is a diagram showing a first conductive wiring layer being formed in the hollow pattern ofFIG. 5 . -
FIG. 7 is a diagram showing the first dry film and the second dry film ofFIG. 6 being removed. -
FIG. 8 is a diagram showing a first cover film being formed on the first conductive wiring layer ofFIG. 7 . -
FIG. 9 is a diagram showing a third dry film being formed on the metal substrate ofFIG. 8 . -
FIG. 10 is a diagram showing third dry film ofFIG. 9 being treated by an exposure process. -
FIG. 11 is a diagram showing a second conductive wiring layer being formed on the third dry film ofFIG. 10 . -
FIG. 12 is a diagram showing a second cover film being formed on the second conductive wiring layer ofFIG. 11 to form a circuit board. - It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
- The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
- Referring to
FIG. 1 , a method for manufacturing a circuit board 100 (seeFIG. 12 ) is presented in accordance with an exemplary embodiment. The method for manufacturing thecircuit board 100 is provided by way of example, as there are a variety of ways to carry out the method. The exemplary method can begin at block 201. - At
block 101, referring toFIG. 2 , ametal substrate 10, a firstdry film 20, and a seconddry film 30 are provided. Themetal substrate 10 comprises afirst surface 12 and asecond surface 14 facing away from thefirst surface 12. - In at least one exemplary embodiment, the
metal substrate 10 is made of metal or metal alloy, and can be made by cutting a copper block. Themetal substrate 10 has a thickness of about 50 μm to about 80 μm. In at least one exemplary embodiment, themetal substrate 10 has a thickness of about 70 μm. - In at least one exemplary embodiment, the first
dry film 20 and the seconddry film 30 have a similar structure. Each of the firstdry film 20 and the seconddry film 30 comprises a polyester layer, a photoresist layer, and a polyethylene layer (not shown) stacked together. The firstdry film 20 has a thickness greater than a thickness of the seconddry film 30. In at least one exemplary embodiment, the firstdry film 20 has a thickness of about 75 μm. The seconddry film 30 has a thickness of about 15 μm. - At
block 102, referring toFIG. 3 , the firstdry film 20 and the seconddry film 30 are respectively formed on thefirst surface 12 and thesecond surface 14. - At
block 103, referring toFIG. 4 , the firstdry film 20 and the seconddry film 30 are treated by an exposure process. - In at least one exemplary embodiment, the exposure can be carried out by covering a photo mask (not shown) on the first
dry film 20 facing away from themetal substrate 10, and exposing the firstdry film 20 and the seconddry film 30 to ultraviolet radiation, thereby causing the seconddry film 30 and an uncovered portion of the firstdry film 20 to be exposed under the ultraviolet radiation and be solidified. - At
block 104, referring toFIG. 5 , the firstdry film 20 and the seconddry film 30 after the exposure process are treated by a development process, thereby forming ahollow pattern 22 in the firstdry film 20 towards thefirst surface 12. - In at least one exemplary embodiment, the development can be carried out by removing the photo mask, and etching a remaining portion of the first
dry film 20 that is not exposed, thereby forming thehollow pattern 22 in the firstdry film 20. In at least one exemplary embodiment, the firstdry film 20 is etched by a sodium hydroxide solution having a mass concentration of about 1%. - At
block 105, referring toFIG. 6 , themetal substrate 10 is electroplated to form a firstconductive wiring layer 24 in thehollow pattern 22. - In at least one exemplary embodiment, the first
conductive wiring layer 24 has a thickness of about 60 μm to about 70 μm. The electroplating can be panel plating that does not require any lead wire and has a simplified process. - At
block 106, referring toFIG. 7 , the firstdry film 20 and the seconddry film 30 are removed, thereby exposing a remaining portion of thefirst surface 12. - The cross-sectional shape of the first
conductive wiring layer 24 can be varied as needed. In at least one exemplary embodiment, the cross-sectional shape of the firstconductive wiring layer 24 is substantially rectangular. - At
block 107, referring toFIG. 8 , afirst cover film 40 is covered on and fills in gaps of the firstconductive wiring layer 24. - In at least one exemplary embodiment, the
first cover film 40 comprises afirst cover layer 42 and a firstadhesive layer 44 connected to thefirst cover layer 42. The firstadhesive layer 44 is between thefirst cover layer 42 and the firstconductive wiring layer 24 and fills in gaps of the firstconductive wiring layer 24. Thefirst cover film 40 can be made of liquid crystal polymer (LCP). - At
block 108, referring toFIG. 9 , a thirddry film 50 is covered on thesecond surface 14. - The third
dry film 50 can have a similar structure as the firstdry film 20 and the seconddry film 30. In at least one exemplary embodiment, the thirddry film 50 has a thickness the same as that of the seconddry film 30. - At
block 109, referring toFIG. 10 , the thirddry film 50 is treated by an exposure process to form patterns corresponding to the firstconductive wiring layer 24. - At
block 110, referring toFIG. 11 , themetal substrate 10 is treated by a development process through the patterned thirddry film 50, thereby completely etching a portion of themetal substrate 10 from thesecond surface 14 to thefirst surface 12, to form a secondconductive wiring layer 16. Then the thirddry film 50 is removed. - The second
conductive wiring layer 16 is directly and electrically connected to the firstconductive wiring layer 24. A projection of the firstconductive wiring layer 24 along a direction perpendicular to thecircuit board 100 and a projection of the secondconductive wiring layer 16 totally cover each other. The firstconductive wiring layer 24 and the secondconductive wiring layer 16 cooperatively form a conductive wiring 52. In at least one exemplary embodiment, the secondconductive wiring layer 16 has a thickness of about 70 μm. A cross-sectional shape of the secondconductive wiring layer 16 is substantially trapezoidal. - At block 111, referring to
FIG. 12 , asecond cover film 60 is covered on and fills in gaps of the secondconductive wiring layer 16, thereby forming thecircuit board 100. - In at least one exemplary embodiment, the
second cover film 60 comprises asecond cover layer 62 and a secondadhesive layer 64 connected to thesecond cover layer 62. The secondadhesive layer 64 is positioned between thesecond cover layer 62 and the secondconductive wiring layer 16 and fills in gaps of the secondconductive wiring layer 16. Thesecond cover film 60 can be made of a material the same as that of thefirst cover film 40. - In other exemplary embodiments, the first
dry film 20, the seconddry film 30, and the thirddry film 50 can be replaced by liquid photo resist films or fiber resin films, which are made of a photoresisting material. - Referring to
FIG. 12 , the circuit board 11 comprises a conductive wiring 52. The conductive wiring 52 comprises a firstconductive wiring layer 24 and a secondconductive wiring layer 16. The firstconductive wiring layer 24 is formed by electroplating. The secondconductive wiring layer 16 is formed by etching ametal substrate 10. The firstconductive wiring layer 24 and the secondconductive wiring layer 16 are in direct contact and electrically connected to each other. A projection of the firstconductive wiring layer 24 along a direction perpendicular to thecircuit board 100 and a projection of the secondconductive wiring layer 16 totally cover each other. - The
circuit board 100 further comprises afirst cover film 40 covering and filling in gaps of the firstconductive wiring layer 24, and asecond cover film 60 covering and filling in gaps of the secondconductive wiring layer 16. - With the above configuration, the second
conductive wiring layer 16 is directly formed by etching themetal substrate 10 having a suitable thickness, thereby avoiding under etching during the etching process. Furthermore, the firstconductive wiring layer 24 and the secondconductive wiring layer 16 are in direct contact and electrically connected to each other to form the conductive wiring 52. A projection of the firstconductive wiring layer 24 along a direction perpendicular to thecircuit board 100 and a projection of the secondconductive wiring layer 16 totally cover each other. Thus, a line space and a line width of the conductive wiring 52 can be decreased. - Even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.
Claims (16)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16/433,594 US11582872B2 (en) | 2017-04-28 | 2019-06-06 | Circuit board |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710297595.5 | 2017-04-28 | ||
| CN201710297595.5A CN108811354A (en) | 2017-04-28 | 2017-04-28 | Circuit board and preparation method thereof |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US16/433,594 Division US11582872B2 (en) | 2017-04-28 | 2019-06-06 | Circuit board |
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| Publication Number | Publication Date |
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| US20180317325A1 true US20180317325A1 (en) | 2018-11-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| US15/636,790 Abandoned US20180317325A1 (en) | 2017-04-28 | 2017-06-29 | Circuit board and method for manufacturing the same |
| US16/433,594 Active 2039-12-07 US11582872B2 (en) | 2017-04-28 | 2019-06-06 | Circuit board |
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| Application Number | Title | Priority Date | Filing Date |
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| US16/433,594 Active 2039-12-07 US11582872B2 (en) | 2017-04-28 | 2019-06-06 | Circuit board |
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| US (2) | US20180317325A1 (en) |
| CN (1) | CN108811354A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11048904B2 (en) * | 2019-10-03 | 2021-06-29 | Hirnax Technologies Limited | Fingerprint sensor embedded in a flat-panel display and a method of operating the same |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119183259B (en) * | 2023-06-21 | 2025-10-14 | 庆鼎精密电子(淮安)有限公司 | Circuit board and manufacturing method thereof |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5426850A (en) * | 1991-11-29 | 1995-06-27 | Hitachi Chemical Company, Ltd. | Fabrication process of wiring board |
| US5647966A (en) * | 1994-10-04 | 1997-07-15 | Matsushita Electric Industrial Co., Ltd. | Method for producing a conductive pattern and method for producing a greensheet lamination body including the same |
| US6579660B1 (en) * | 1999-04-04 | 2003-06-17 | Creo Il Ltd. | Process for direct digital printing of circuit boards |
| US20030219608A1 (en) * | 2002-05-23 | 2003-11-27 | Hitoshi Ishizaka | Metal transfer sheet, producing method thereof, and producing method of ceramic condenser |
| US20060001173A1 (en) * | 2004-06-29 | 2006-01-05 | Takaharu Yamano | Through electrode and method for forming the same |
| US20070289127A1 (en) * | 2006-04-20 | 2007-12-20 | Amitec- Advanced Multilayer Interconnect Technologies Ltd | Coreless cavity substrates for chip packaging and their fabrication |
| US20080303146A1 (en) * | 2007-06-07 | 2008-12-11 | Advanced Semiconductor Engineering, Inc. | Process for manufacturing substrate with bumps and substrate structure |
| US20110100952A1 (en) * | 2009-10-30 | 2011-05-05 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing printed circuit board having bump |
| US20130098665A1 (en) * | 2011-10-21 | 2013-04-25 | Yuu Ishii | Flexible printed circuit board and production method of same |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5175779B2 (en) * | 2008-04-18 | 2013-04-03 | 日東電工株式会社 | Method for manufacturing printed circuit board |
| CN102196668B (en) * | 2010-03-08 | 2013-06-19 | 宏恒胜电子科技(淮安)有限公司 | Method for manufacturing circuit board |
| US8541693B2 (en) * | 2010-03-31 | 2013-09-24 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
| CN202503814U (en) * | 2012-02-13 | 2012-10-24 | 东莞森玛仕格里菲电路有限公司 | Thick copper circuit board with inner and outer layers |
| KR20160088753A (en) * | 2015-01-16 | 2016-07-26 | 삼성전기주식회사 | Resin composition for printed circuit board, resin varnish using the same, adhesive film, prepreg and printed wiring board |
| CN107920415B (en) * | 2016-10-06 | 2020-11-03 | 鹏鼎控股(深圳)股份有限公司 | Circuit board with thick copper circuit and manufacturing method thereof |
-
2017
- 2017-04-28 CN CN201710297595.5A patent/CN108811354A/en active Pending
- 2017-06-29 US US15/636,790 patent/US20180317325A1/en not_active Abandoned
-
2019
- 2019-06-06 US US16/433,594 patent/US11582872B2/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5426850A (en) * | 1991-11-29 | 1995-06-27 | Hitachi Chemical Company, Ltd. | Fabrication process of wiring board |
| US5647966A (en) * | 1994-10-04 | 1997-07-15 | Matsushita Electric Industrial Co., Ltd. | Method for producing a conductive pattern and method for producing a greensheet lamination body including the same |
| US6579660B1 (en) * | 1999-04-04 | 2003-06-17 | Creo Il Ltd. | Process for direct digital printing of circuit boards |
| US20030219608A1 (en) * | 2002-05-23 | 2003-11-27 | Hitoshi Ishizaka | Metal transfer sheet, producing method thereof, and producing method of ceramic condenser |
| US20060001173A1 (en) * | 2004-06-29 | 2006-01-05 | Takaharu Yamano | Through electrode and method for forming the same |
| US20070289127A1 (en) * | 2006-04-20 | 2007-12-20 | Amitec- Advanced Multilayer Interconnect Technologies Ltd | Coreless cavity substrates for chip packaging and their fabrication |
| US20080303146A1 (en) * | 2007-06-07 | 2008-12-11 | Advanced Semiconductor Engineering, Inc. | Process for manufacturing substrate with bumps and substrate structure |
| US20110100952A1 (en) * | 2009-10-30 | 2011-05-05 | Samsung Electro-Mechanics Co., Ltd. | Method of manufacturing printed circuit board having bump |
| US20130098665A1 (en) * | 2011-10-21 | 2013-04-25 | Yuu Ishii | Flexible printed circuit board and production method of same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11048904B2 (en) * | 2019-10-03 | 2021-06-29 | Hirnax Technologies Limited | Fingerprint sensor embedded in a flat-panel display and a method of operating the same |
Also Published As
| Publication number | Publication date |
|---|---|
| US20190289723A1 (en) | 2019-09-19 |
| CN108811354A (en) | 2018-11-13 |
| US11582872B2 (en) | 2023-02-14 |
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