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US20170012227A1 - Active device and manufacturing method thereof - Google Patents

Active device and manufacturing method thereof Download PDF

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Publication number
US20170012227A1
US20170012227A1 US15/096,294 US201615096294A US2017012227A1 US 20170012227 A1 US20170012227 A1 US 20170012227A1 US 201615096294 A US201615096294 A US 201615096294A US 2017012227 A1 US2017012227 A1 US 2017012227A1
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US
United States
Prior art keywords
crystal induced
drain
source
induced structures
active device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US15/096,294
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English (en)
Inventor
Hsiao-Wen Zan
Chuang-Chuang Tsai
Chao-Hsuan Chen
Cheng-Hang Hsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
E Ink Holdings Inc
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E Ink Holdings Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by E Ink Holdings Inc filed Critical E Ink Holdings Inc
Assigned to E INK HOLDINGS INC. reassignment E INK HOLDINGS INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, CHAO-HSUAN, HSU, CHENG-HANG, TSAI, CHUANG-CHUANG, ZAN, HSIAO-WEN
Publication of US20170012227A1 publication Critical patent/US20170012227A1/en
Priority to US16/878,640 priority Critical patent/US11165033B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/484—Insulated gate field-effect transistors [IGFETs] characterised by the channel regions
    • H01L51/0545—
    • H01L51/0541—
    • H01L51/0558—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/191—Deposition of organic active material characterised by provisions for the orientation or alignment of the layer to be deposited
    • H01L51/005—

Definitions

  • the invention relates to a semiconductor device and a manufacturing method thereof, and more particularly, to an active device and a manufacturing method thereof.
  • the methods of film crystallization are used to increase the carrier mobility.
  • the film is formed by the organic solution in the solution process, and the crystals are grown nondirectionally, so that the annealing process is further performed to to improve the property of the film.
  • the crystalline orientation of the crystal structure of the film cannot be effectively controlled by this method.
  • the invention provides an active device having a good crystalline uniformity film.
  • the invention also provides a manufacturing method of an active device, which is adapted to fabricate the above-mentioned active device.
  • the active device in the invention is disposed on a substrate and includes a gate, an organic active layer, a gate insulation layer, a plurality of crystal induced structures, a source and a drain.
  • the gate insulation layer is disposed between the gate and the organic active layer.
  • the crystal induced structures distribute in the organic active layer, wherein the crystal induced structures directly contact with the substrate or the gate insulation layer.
  • the source and the drain are disposed on two opposite sides of the organic active layer, wherein a portion of the organic active layer is exposed between the source and the drain.
  • the crystal induced structures separate from each other and include a plurality of point-shaped protrusions or a plurality of strip-shaped protrusions.
  • the crystal induced structures are arranged in array or arranged dispersedly.
  • the shapes or the sizes of the crystal induced structures are the same or different.
  • the crystal induced structures are a plurality of nano-metal structures separated from each other or a plurality of silver-oxide nanowires partially overlapped with each other.
  • the active device further comprises a plurality of self-assembled monolayers which are respectively located between the crystal induced structures and the organic active layer.
  • the materials of the self-assembled monolayers comprise pentafluorobenzene thiol, 2-mercaptoethanol (C2H6OS), octadecylphosphonic acid (OPA), or materials having thiol (SH) or phosphate particles.
  • the organic active layer is located between the gate and the substrate, and the source and the drain are located between the gate insulation layer and the substrate.
  • a distribution density of the crystal induced structures adjacent to the source and the drain is less than a distribution density of the crystal induced structures at a portion of the organic active layer exposed between the source and the drain.
  • the invention provides a manufacturing method of an active device, which includes following steps. Forming a gate on a substrate. Forming a gate insulation layer on the substrate, wherein the gate insulation layer covers the gate. Forming a plurality of crystal induced structures on the gate insulation layer, wherein the crystal induced structures directly contact with the gate insulation layer. Coating the gate insulation layer with an organic semiconductor material, wherein the crystal induced structures induce the organic semiconductor material to form crystals and to define an organic active layer. Forming a source and a drain on the organic active layer, wherein a portion of the organic active layer is exposed between the source and the drain.
  • the methods of forming the crystal induced structures include nanoimprint method, spin coating method, slit coating method, contact coating method, ink jet coating method, or screen printing coating method, etc.
  • the crystal induced structures induce the organic semiconductor material, so as to grow crystals of the organic semiconductor material from the crystal induced structures, and to form the organic active layer having at least a grain boundary.
  • the manufacturing method of the active device further includes performing an acidulation process or a plasma treatment process to oxidize the crystal induced structures before coating the gate insulation layer with the organic semiconductor material, wherein the crystal induced structures are a plurality of silver nanowires partially overlapped with each other.
  • the manufacturing method of the active device further include forming a plurality of self-assembled monolayer particles on the crystal induced structures before coating the gate insulation layer with the organic semiconductor material; and a plurality of self-assembled monolayers are formed between the crystal induced structures and the organic active layer after coating the gate insulation layer with the organic semiconductor material.
  • the materials of the self-assembled monolayers comprise pentafluorobenzene thiol, 2-mercaptoethanol (C2H6OS), octadecylphosphonic acid (OPA), or materials having thiol (SH) or phosphate particles.
  • the invention provides a manufacturing method of an active device, which includes following steps. Forming a source and a drain on a substrate, wherein a portion of the substrate is exposed between the source and the drain. Forming a plurality of crystal induced structures on the source, the drain, and the portion of the substrate exposed between the source and the drain, wherein the crystal induced structures directly contact with the portion of the substrate, the source, and the drain. Coating the source, the drain, and the portion of the substrate exposed between the source and the drain with an organic semiconductor material, wherein the crystal induced structures induce the organic semiconductor material to form crystals and to define an organic active layer, and the organic active layer covers the source, the drain, and the portion of the substrate exposed between the source and the drain. Forming a gate insulation layer on the substrate, wherein the gate insulation layer covers the organic active layer, the source, and the drain. Forming a gate on the gate insulation layer.
  • the methods of forming the crystal induced structures include nanoimprint method, spin coating method, slit coating method, contact coating method, ink jet coating method, or screen printing coating method, etc.
  • the crystal induced structures induce the organic semiconductor material, so as to grow crystals of the organic semiconductor material from the crystal induced structures, and to form the organic active layer having at least a grain boundary.
  • the manufacturing method of the active device further includes forming a plurality of self-assembled monolayer particles on the crystal induced structures before coating the source, the drain, and the portion of the substrate exposed between the source and the drain with the organic semiconductor material; and a plurality of self-assembled monolayers are formed between the crystal induced structures and the organic active layer after coating the source, the drain, and the portion of the substrate exposed between the source and the drain with the organic semiconductor material.
  • the materials of the self-assembled monolayers comprise pentafluorobenzene thiol, 2-mercaptoethanol (C2H6OS), octadecylphosphonic acid (OPA), or materials having thiol (SH) or phosphate particles.
  • the organic semiconductor material is induced to form crystals via the crystal induced structures, wherein the crystals of the organic semiconductor material are preferably grown from the crystal induced structures, so as to form the organic active layer which has a good uniformity and a good crystallinity. Therefore, the active device of the invention can have a good crystalline uniformity film.
  • FIG. 1 is a perspective schematic view of an active device according to one embodiment of the invention.
  • FIG. 2A (a) to FIG. 2D are perspective schematic views illustrating a manufacturing method of an active device according to one embodiment of the invention.
  • FIG. 3 is a cross-sectional schematic view illustrating an active device according to another embodiment of the invention.
  • FIG. 4A to FIG. 4E are perspective schematic views illustrating a manufacturing method of an active device according to another embodiment of the invention.
  • FIG. 1 is a perspective schematic view of an active device according to one embodiment of the invention.
  • the active device 100 a is disposed on a substrate 10 and includes a gate 110 a, a gate insulation layer 120 a, an organic active layer 130 a, a plurality of crystal induced structures 140 a, a source 150 a and a drain 160 a.
  • the gate insulation layer 120 a is disposed between the gate 110 a and the organic active layer 130 a.
  • the crystal induced structures 140 a distribute in the organic active layer 130 a, wherein the crystal induced structures 140 a directly contact with the gate insulation layer 120 a and separate from each other.
  • the source 150 a and the drain 160 a are disposed on two opposite sides of the organic active layer 130 a, wherein a portion of the organic active layer 130 a is exposed between the source 150 a and the drain 160 a.
  • the active device 100 a of the present embodiment is disposed on the substrate 10 , wherein the gate 110 a is disposed on the substrate 10 and directly contact with the substrate 10 .
  • the gate insulation layer 120 a covers the gate 110 a and a part of the substrate 10 , and the crystal induced structures 140 a directly contact with the gate insulation layer 120 a, wherein the crystal induced structures 140 a are embodied to be arranged in array on the gate insulation layer 120 a, but the invention is not limited thereto. As shown in FIG.
  • the crystal induced structures 140 a in the present embodiment are, for example, a plurality of point-shaped protrusions (such as a cylindrical shape), wherein the shapes and the sizes of the crystal induced structures 140 a are substantially the same.
  • the shapes of the crystal induced structures 140 a are exactly the same, and the sizes of the crystal induced structures 140 a are also exactly the same, but the invention is not limited thereto.
  • the crystal induced structures 140 a are embodied as a plurality of nano-metal structures, wherein the diameter of each of the nano-metal structures is, for example, from 5 nanometers to 300 nanometers.
  • two adjacent structures of the crystal induced structures 140 a are separated by a distance D, preferably, the distance D is from 100 nanometers to 10 micrometers.
  • the organic active layer 130 a covers the crystal induced structures 140 a, so that the crystal induced structures 140 a distribute in the organic active layer 130 a.
  • the source 150 a and the drain 160 a directly contact with the organic active layer 130 a and expose a portion of the organic active layer 130 a.
  • the gate 110 a, the gate insulation layer 120 a, the organic active layer 130 a, the crystal induced structures 140 a, the source 150 a, and the drain 160 a together construct the active device 100 a which substantially is a bottom gate thin-film transistor.
  • the active device 100 a of the present embodiment is embodied as a transistor, but the invention is not limited thereto. In other embodiments not shown, the active device can also be a sensor or a solar cell.
  • the crystal induced structures 140 a of the present embodiment are separated from each other, so that the source 150 a and the drain 160 a are not electrically conducted to each other via the crystal induced structures 140 a. In other words, the configuration of the crystal induced structures 140 a does not interfere with the electrical layout of the active device 100 a.
  • the detailed description of the manufacturing method of the active device 100 a ′ of the invention is carried out as followings.
  • the below embodiments utilize the same label and partial contents of the above embodiment, wherein the same labels are adopted to represent same or similar elements and the description of similar technical content should be referenced to the above-mentioned embodiments.
  • the description of similar technical content is omitted.
  • FIG. 2A (a) to FIG. 2D are perspective schematic views illustrating a manufacturing method of an active device according to one embodiment of the invention.
  • the manufacturing method of the thin-film transistor structure of the present embodiment firstly, referring to FIG. 2A (a), forming the gate 110 a on the substrate 10 , wherein the material of the substrate 10 is, for example, glass, plastic or other appropriate materials.
  • the gate insulation layer 120 a is, for example, silicon oxide, silicon nitride, silicon oxynitride, aluminium oxide, hafnium oxide, antimony tin oxide, or etc. materials used in the gate insulating layer 120 a.
  • the method of forming the crystal induced structures 140 a is, for example, nanoimprint method, spin coating method, slit coating method, contact coating method, ink jet coating method, or screen printing coating method, etc. As shown in FIG.
  • the crystal induced structures 140 a is embodied to be arranged in array on the gate insulation layer 120 a, wherein the crystal induced structures 140 a are, for example, a plurality of point-shaped protrusions (such as a cylindrical shape), and the shapes and the sizes of the crystal induced structures 140 a are substantially the same.
  • the crystal induced structures 140 a are embodied as a plurality of nano-metal structures, wherein the diameter of each of the nano-metal structures is, for example, from 5 nanometers to 300 nanometers.
  • two adjacent structures of the crystal induced structures 140 a are separated by a distance D, preferably, the distance D is from 100 nanometers to 10 micrometers.
  • the invention is not limited to the structural shape and the arrangement method of the crystal induced structures 140 a.
  • the crystal induced structures 140 b are arranged dispersedly; or, as shown in FIG. 2A (c), the distribution density of the crystal induced structures 140 c at the middle of the gate insulation layer 120 a presents a low density, and the distribution density of the crystal induced structures 140 c at two sides of the gate insulation layer 120 a presents a high density, namely, the distribution density of the crystal induced structures 140 c adjacent to the source 150 a and the drain 160 a is higher than the distribution density of the crystal induced structures 140 c at a portion of the organic active layer 130 a exposed between the source 150 a and the drain 160 a (referring to FIG.
  • the purpose is forming smaller grains adjacent to the electrode, so as to inhibit the high electrical field effect; or, as shown in FIG. 2A (d), the shapes of the crystal induced structures 140 d are the same but the sizes of the crystal induced structures 140 d are completely different, for example, the sizes of the crystal induced structures 140 d at the middle of the gate insulation layer 120 a are bigger than the sizes of the crystal induced structures 140 d at two sides of the gate insulation layer 120 a but the shapes of the crystal induced structures 140 d are the same, the purpose is preventing the current leakage problem between the source 150 a and the drain 160 a; certainly, in other embodiments not shown, the shapes of the crystal induced structures are different but the sizes of the crystal induced structures are the same; or, the shapes and the sizes of the crystal induced structures are different; or, as shown in FIG.
  • the crystal induced structures 140 e are, for example, a plurality of strip-shaped protrusions, the purpose is inducing long trip grains, so as to increase the carrier mobility at the long edges in the longitudinal direction, and to increase the conductive current; or, as shown in FIG. 2A (f), the crystal induced structures 140 f are, for example, a plurality of strip-shaped protrusions which present an inclined angle, such as a 45 degree, and be arranged at intervals on the gate insulation layer 120 a, the purpose is preventing electric leakage formed by the strip grain boundary.
  • the above-mentioned embodiments still belong to a technical means adoptable in the present invention and fall within the protection scope of the present invention.
  • a plurality of self-assembled monolayer particles 170 are optionally formed on the crystal induced structures 140 a.
  • the crystal induced structures 140 a induce the organic semiconductor material 130 to form crystals and to define an organic active layer 130 a.
  • the crystal induced structures 140 a of the present embodiment can induce the organic semiconductor material 130 , so as to grow crystals of the organic semiconductor material 130 from the crystal induced structures 140 a, and to form the organic active layer 130 a which has at least a grain boundary B. Because the self-assembled monolayer particles 170 are optionally formed on the crystal induced structures 140 a, a plurality of self-assembled monolayers 170 a are formed between the crystal induced structures 140 a and the organic active layer 130 a.
  • the self-assembled monolayers 170 a has a property that the self-assembled monolayers 170 a can change the surface energy of the crystal induced structures 140 a, so as to improve effectively the arrangement method of the particles in the organic active layer 130 a when crystallizing, to control effectively the crystal structure of the organic active layer 130 a, and to form a layer having a good uniformity and a good crystallinity.
  • the organic semiconductor material 130 of the present embodiment is an organic semiconductor material which has solubility, such as 5,11-bis (triethylsilylethynyl) anthradithiophene (DiF-TESADT), 6,13-bis (triisopropylsilylethynyl) pentacene (TIPS-pentacene), etc.
  • the materials of the self-assembled monolayers comprise pentafluorobenzene thiol, 2-mercaptoethanol (C2H6OS), octadecylphosphonic acid (OPA), or materials having thiol (SH) or phosphate particles.
  • a source 150 a and a drain 160 a on the organic active layer 130 a, wherein a portion of the organic active layer 130 a is exposed between the source 150 a and the drain 160 a.
  • the material of the source 150 a and the drain 160 a is, for example, metal which is the same as or different from the metal adopted by the gate 110 a, but the invention is not limited thereto. Thereby, the fabrication of the active device 100 a ′ is completed.
  • FIG. 3 is a cross-sectional schematic view illustrating an active device according to another embodiment of the invention.
  • the active device 100 g of the present embodiment is similar to the active device 100 a in FIG. 1 , but the main differences the two active devices are that the active device 100 g of the present embodiment is embodied as a top gate thin-film transistor, wherein the organic active layer 130 g is located between the gate insulation layer 120 g and the substrate 10 , and the source 150 g and the drain 160 g are located between the gate insulation layer 120 g and the substrate 10 .
  • the process firstly, forming the source 150 g and the drain 160 g on a substrate 10 , wherein the portion of the substrate 10 is exposed between the source 150 g and the drain 160 g. Subsequently, forming the crystal induced structures 140 g on the source 150 g, the drain 160 g, and the portion of the substrate 10 exposed between the source 150 g and the drain 160 g, wherein the crystal induced structures 140 g directly contact with the portion of the substrate 10 , the source 150 g , and the drain 160 g and the crystal induced structures 140 g separate from each other.
  • the fabrication of the active device 100 g is completed.
  • the active device 100 g without the self-assembled monolayers 170 a of the present embodiment is explained as an example.
  • the manufacturing method of the active device 100 g of the present embodiment can be the same as the manufacturing method of the active device 100 a ′ of the above-mentioned embodiment, the manufacturing method of the active device 100 g further includes optionally forming a plurality of self-assembled monolayer particles 170 (as shown in FIG.
  • FIG. 4A to FIG. 4E are perspective schematic views illustrating a manufacturing method of an active device according to another embodiment of the invention.
  • the manufacturing method of the active device of the present embodiment is similar to the manufacturing method of the active device illustrated in FIG. 2A (a) to FIG. 2D , the main differences between two methods are described as followings. Referring to FIG. 4A , sequentially forming the gate 110 h, the gate insulation layer 120 h, and the crystal induced structures 140 h on the substrate 10 , wherein the gate insulation layer 120 h covers the gate 110 h, and the crystal induced structures 140 h directly contact with the gate insulation layer 120 h.
  • the material of the gate 110 h is, for example, silicon
  • the material of the gate insulation layer 120 h is, for example, silicon nitride, or silicon oxide.
  • the crystal induced structures 140 h are embodied as a plurality of silver conducting nanowires which are partially overlapped with each other.
  • a plurality of self-assembled monolayer particles 170 are optionally formed on the crystal induced structures 140 h.
  • the gate insulation layer 120 h with an organic semiconductor material (not shown), wherein the crystal induced structures 140 h induce the organic semiconductor material to form crystals and to define an organic active layer 130 h. Because the self-assembled monolayer particles 170 are optionally formed on the crystal induced structures 140 h, a plurality of self-assembled monolayers 170 h are framed between the crystal induced structures 140 h and the organic active layer 130 h.
  • the self-assembled monolayers 170 h has a property that the self-assembled monolayers 170 h can change the surface energy of the crystal induced structures 140 h, so as to improve effectively the arrangement method of the particles in the organic active layer 130 h when crystallizing, to control effectively the crystal structure of the organic active layer 130 h, and to form a layer having a good uniformity and a good crystallinity.
  • the materials of the self-assembled monolayers 170 a of the present embodiment are pentafluorobenzene thiol, 2-mercaptoethanol (C2H6OS), octadecylphosphonic acid (OPA), or materials having thiol (SH) or phosphate particles.
  • a source 150 h and a drain 160 h on the organic active layer 130 h, wherein a portion of the organic active layer 130 h is exposed between the source 150 h and the drain 160 h.
  • the material of the source 150 h and the drain 160 h is, for example, metal.
  • the organic semiconductor material is induced to form crystals via the crystal induced structures, wherein the crystals of the organic semiconductor material are preferably grown by the crystal induced structures, so as to form the organic active layer which has a good uniformity and a good crystallinity. Therefore, the active device of the invention can having a good crystalline uniformity film.

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  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
US15/096,294 2015-07-06 2016-04-12 Active device and manufacturing method thereof Abandoned US20170012227A1 (en)

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TW104121837A TWI570976B (zh) 2015-07-06 2015-07-06 主動元件及其製作方法

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190067609A1 (en) * 2016-10-28 2019-02-28 Boe Technology Group Co., Ltd. Semiconductor thin-film and manufacturing method thereof, thin-film transistor, and display apparatus
CN109841737A (zh) * 2019-02-27 2019-06-04 苏州大学 一种有机半导体阵列晶体的制备方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140110700A1 (en) * 2012-10-19 2014-04-24 E Ink Holdings Inc. Thin film transistor structure and method for manufacturing the same
US20140326989A1 (en) * 2013-05-06 2014-11-06 E Ink Holdings Inc. Active device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4591451B2 (ja) * 2007-01-10 2010-12-01 ソニー株式会社 半導体装置および表示装置
US8436350B2 (en) * 2009-01-30 2013-05-07 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device using an oxide semiconductor with a plurality of metal clusters
KR101117643B1 (ko) * 2010-04-08 2012-03-05 삼성모바일디스플레이주식회사 비정질 실리콘막의 결정화 방법, 그리고 박막 트랜지스터 및 이의 제조 방법
KR101146995B1 (ko) * 2010-06-16 2012-05-22 삼성모바일디스플레이주식회사 다결정 실리콘층의 형성 방법 및 이를 이용한 박막 트랜지스터의 형성방법
US20120043198A1 (en) * 2010-08-18 2012-02-23 Semiconductor Energy Laboratory Co., Ltd. Film formation apparatus and film formation method
JP6323055B2 (ja) * 2014-02-21 2018-05-16 凸版印刷株式会社 薄膜トランジスタアレイおよびその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140110700A1 (en) * 2012-10-19 2014-04-24 E Ink Holdings Inc. Thin film transistor structure and method for manufacturing the same
US20140326989A1 (en) * 2013-05-06 2014-11-06 E Ink Holdings Inc. Active device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190067609A1 (en) * 2016-10-28 2019-02-28 Boe Technology Group Co., Ltd. Semiconductor thin-film and manufacturing method thereof, thin-film transistor, and display apparatus
US10868266B2 (en) * 2016-10-28 2020-12-15 Boe Technology Group Co., Ltd. Semiconductor thin-film and manufacturing method thereof, thin-film transistor, and display apparatus
CN109841737A (zh) * 2019-02-27 2019-06-04 苏州大学 一种有机半导体阵列晶体的制备方法

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US11165033B2 (en) 2021-11-02
TWI570976B (zh) 2017-02-11
TW201703301A (zh) 2017-01-16
US20200287147A1 (en) 2020-09-10

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Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION