US20150287714A1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- US20150287714A1 US20150287714A1 US14/746,018 US201514746018A US2015287714A1 US 20150287714 A1 US20150287714 A1 US 20150287714A1 US 201514746018 A US201514746018 A US 201514746018A US 2015287714 A1 US2015287714 A1 US 2015287714A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 18
- 230000015556 catabolic process Effects 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000002955 isolation Methods 0.000 description 26
- 230000000694 effects Effects 0.000 description 16
- 235000012431 wafers Nutrition 0.000 description 16
- 230000005684 electric field Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 8
- 230000003071 parasitic effect Effects 0.000 description 6
- 230000006866 deterioration Effects 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
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- H01L27/0255—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
- H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
- H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
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- H01L29/0692—
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- H01L29/8611—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/411—PN diodes having planar bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
- H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
Definitions
- the present invention relates to a semiconductor device.
- the present invention relates to a clamp diode used in a semiconductor device.
- a clamp diode is a device which uses a junction breakdown voltage between the p-type semiconductor and the n-type semiconductor to maintain (clamp) a voltage supplied to a circuit constant in a semiconductor device. Since a clamp diode is a device capable of limiting a voltage easily, there is a high demand and a wide usage in electronic devices.
- FIG. 7 is a cross-sectional view of the structure illustrated in FIG. 1 of the Japanese Published Patent Application. There is described that, as illustrated in FIG. 7 , a second conductivity type high concentration region 1 is placed away from an element isolation insulating film 2 by a predetermined distance, and further, an electrode 8 is provided through the intermediation of an insulating film 9 , thereby adjusting a voltage of the electrode 8 to improve the change in the clamp diode over time.
- FIG. 8 is a cross-sectional view of the structure illustrated in FIG. 6 of the Japanese Published Patent Application. As shown in this structure, there is described that the same effect can be obtained even without the electrode 8 of FIG. 7 .
- the electric field corresponding to a voltage applied to the electrode 8 is applied to a p-n junction through the oxide film 9 in the structure illustrated in FIG. 7 , the electric field is thought to be constant and the p-n junction breakdown voltage does not seem to fluctuate due to the electric field.
- the breakdown voltages are the same.
- the thicknesses of the oxide films 9 are not the same within a wafer, between wafers, and among lots, and hence the electric fields applied to the p-n junctions by the voltages of the electrodes 8 fluctuate. As a result, the p-n junction breakdown voltages fluctuate.
- impurities in the first conductivity type region 7 affect impurity distribution near the p-n junction, and the breakdown voltage of the p-n junction changes. Also in this regard, ideally, when the first conductivity type regions 7 are produced in the same condition, the breakdown voltages of the p-n junctions are the same. Actually the concentrations of impurities in the first conductivity type regions 7 , however, are not the same within a wafer, between wafers, and among lots, and the p-n junction breakdown voltages are affected to various degrees. As a result, the p-n junction breakdown voltages fluctuate.
- a planar shape of the second conductivity type high concentration region 1 of FIG. 7 is octagon (not shown in this specification).
- electric field strength is high at a corner portion, and therefore the breakdown voltage is determined by the corner portion.
- FIG. 9 shows the breakdown voltages in the case where the planar shape of the second conductivity type high concentration region 1 is rectangular and in the case where the planar shape thereof is circular. It is apparent that the breakdown voltage is lower in the case of the clamp diode having the rectangular second conductivity type high concentration region 1 than in the case of the clamp diode having the circular second conductivity type high concentration region 1 .
- the electric field is concentrated at the corner portions of the rectangle, and the corner portions determine the breakdown voltage.
- the breakdown voltages of the p-n junctions will be the same since the shapes of the corner portions are always the same when lithography is performed in the same condition.
- the electric field strength at the corner portions fluctuates within a wafer, between wafers, and among lots. As a result, the p-n junction breakdown voltages fluctuate.
- the clamp diode needs to have a structure as simple as possible, and the factors that cause fluctuations need to be eliminated as much as possible.
- the present invention has been made in view of the above-mentioned problems, and the present invention provides a clamp diode which suppresses deterioration with time, fluctuations within a wafer surface, among wafers, and among lots, and leakage before breakdown.
- a semiconductor device including a clamp diode includes: a breakdown voltage adjusting first conductivity type low concentration region provided on a semiconductor substrate; a second conductivity type high concentration region provided within the breakdown voltage adjusting first conductivity type low concentration region, the second conductivity type high concentration region being circular; an element isolation insulating film provided within the breakdown voltage adjusting first conductivity type low concentration region, the element isolation insulating film being provided in a ring shape and surrounding the second conductivity type high concentration region without being held in contact therewith; and a first conductivity type high concentration region provided outside the ring of the element isolation insulating film within the breakdown voltage adjusting first conductivity type low concentration region.
- the present invention provides a clamp diode having little deterioration with time, small fluctuations within a wafer surface, among wafers, and among lots, and little leakage before breakdown.
- FIGS. 1A and 1B are diagrams illustrating a representative example of the present invention.
- FIG. 2 is a graph showing leakage characteristics of a clamp diode
- FIG. 3 is a diagram illustrating Modified Example 1 of the present invention.
- FIGS. 4A and 4B are diagrams illustrating Modified Example 2 of the present invention.
- FIGS. 5A and 5B are diagrams illustrating Modified Example 4 of the present invention.
- FIGS. 6A and 6B are diagrams illustrating Modified Example 5 of the present invention.
- FIG. 7 is a diagram illustrating an embodiment of the conventional technology
- FIG. 8 is a diagram illustrating another embodiment of the conventional technology.
- FIG. 9 is a graph showing shape dependence of a second conductivity type high concentration region on a current-voltage characteristic of the clamp diode.
- FIGS. 1A and 1B are diagrams illustrating a clamp diode in a semiconductor device according to a first embodiment of the present invention.
- FIG. 1A is a plan view
- FIG. 1B is a cross-sectional view along the line A-A′ of FIG. 1A .
- a breakdown voltage adjusting first conductivity type low concentration region 5 is provided on a surface of a semiconductor substrate 6 , and a second conductivity type high concentration region 1 , which has a conductivity type opposite to that of the breakdown voltage adjusting first conductivity type low concentration region 5 , is provided on a part of a surface of the breakdown voltage adjusting first conductivity type low concentration region 5 so as to be circular in a plan view.
- an element isolation insulating film 2 having a ring shape is provided in such a way that the element isolation insulating film 2 surrounds the second conductivity type high concentration region 1 without being held in contact therewith
- the ring shape as used herein does not necessarily mean an annular shape or a doughnut shape, and an inner part of the ring shape of the element isolation insulating film 2 is circular, but an outer shape thereof is rectangular in this embodiment.
- a rectangular first conductivity type high concentration region 3 is provided so as to surround the element isolation insulating film 2 .
- the second conductivity type high concentration region 1 and the first conductivity type high concentration region 3 have surfaces covered with insulating films, and are respectively connected to different wirings via contacts 4 .
- the semiconductor device may include only a clamp diode, or may include a circuit having components other than the clamp diode, such as a transistor.
- the second conductivity type high concentration region 1 is provided without being held in contact with the element isolation insulating film 2 , and hence the inventor(s) of the present invention have found that there can be obtained not only an effect of suppressing deterioration with time as described in Japanese Patent Application Laid-open No. Hei 11-307787 but also an effect of suppressing a leakage current at a voltage equal to or lower than a breakdown voltage of the p-n junction.
- FIG. 2 is a graph showing voltage-current characteristics of the clamp diode. “Not in contact” in the graph of FIG.
- FIG. 2 refers to a structure in which the second conductivity type high concentration region 1 and the element isolation insulating film 2 are not held in contact with each other as illustrated in FIGS. 1A and 1B
- “in contact” refers to a structure in which the second conductivity type high concentration region 1 and the element isolation insulating film 2 are in contact with each other.
- the structure in which the second conductivity type high concentration region 1 and the element isolation insulating film 2 are “not in contact” with each other has a smaller leakage current than the structure in which the second conductivity type high concentration region 1 and the element isolation insulating film 2 are “in contact” with each other.
- the inventor(s) of the present invention have assumed the reason for this to be as follows.
- FIGS. 1A and 1B of the present invention together with the effect of suppressing deterioration with time described in the Japanese Published Patent Application No. 11-307787, the effect of suppressing a leakage current can be obtained, which is one of the objects of the present invention.
- FIGS. 1A and 1B of the present invention there is no electrode 8 or insulating film 9 of the conventional structure illustrated in FIG. 7 , and hence there is no fluctuation in an electric field propagating from the electrode 8 to a p-n junction breakdown voltage, which is one of the objects of the present invention. As a result, a fluctuation in the p-n junction breakdown voltage is reduced.
- FIGS. 1A and 1B of the present invention there is no first conductivity type region 7 of the conventional structure illustrated in FIGS. 7 and 8 , and hence the p-n junction breakdown voltage is not affected by the first conductivity type region 7 to various degrees, which is one of the objects of the present invention. As a result, a fluctuation in the p-n junction breakdown voltage is further reduced along with Effect 2.
- a planar shape of the second conductivity type high concentration region 1 is circular and has no corner, and hence there is no fluctuation in electric field strength due to fluctuations in corner portions of the second conductivity type high concentration region 1 , which is one of the objects of the present invention.
- a fluctuation in the p-n junction breakdown voltage is further reduced along with Effects 2 and 3.
- FIG. 3 is a plan view illustrating Modified Example 1 of the present invention.
- FIG. 3 illustrates a case where a planar shape of a part of the element isolation insulating film 2 on the second conductivity type high concentration region 1 side is rectangular.
- the element isolation insulating film 2 is not held in contact with the second conductivity type high concentration region 1 as in this case, even if the planar shape of the element isolation insulating film 2 is not a circle as illustrated in FIGS. 1A and 1B , but a rectangle, a hexagon, or the like, the above-mentioned Effects 1 to 4 can be obtained.
- FIG. 4A is a plan view illustrating Modified Example 2 of the present invention
- FIG. 4B is a cross-sectional view. along the line B-B′ of FIG. 4A .
- there is no element isolation insulating film 2 illustrated in FIG. 3 In this way, even when there is no element isolation insulating film 2 , the above-mentioned Effects 1 to 4 can be obtained.
- the first conductivity type high concentration region 3 is disposed in a rectangular ring shape. Even when the first conductivity type high concentration region 3 has a shape other than a rectangle, or even when the first conductivity type high concentration region 3 does not have a ring shape, the above-mentioned Effects 1 to 4 can be obtained.
- the clamp diode In order to clamp a voltage in any current band at the same voltage, the clamp diode is required to have steep breakdown characteristics. In order to obtain the steep breakdown characteristics, a parasitic resistance may be reduced. In the present invention, the distance between the second conductivity type high concentration region 1 and the first conductivity type high concentration region 3 is short, and a parasitic resistance of the breakdown voltage adjusting first conductivity type low concentration region 5 is reduced, thereby obtaining the steep breakdown characteristics.
- FIG. 5A is a plan view illustrating another clamp diode of FIGS. 1A and 1B , in which the parasitic resistance of the breakdown voltage adjusting first conductivity type low concentration region is reduced as much as possible.
- FIG. 5B is a plan view illustrating another clamp diode of FIGS. 4A and 4B , in which the parasitic resistance of the breakdown voltage adjusting first conductivity type low concentration region 5 is reduced as much as possible.
- the ring shapes of the element isolation insulating film 2 and the first conductivity type high concentration region 3 are all set to be annular shapes of circles, and each size thereof is set to be a minimum value of the design rule. In this way, the parasitic resistance of the breakdown voltage adjusting first conductivity type low concentration region 5 can be reduced as much as possible and it is possible to obtain the steepest breakdown characteristics.
- FIGS. 6A and 6B are plan views respectively illustrating modified clamp diodes of FIGS. 5A and 5B . Even when outer parts of the ring shapes of the first conductivity type high concentration regions 3 have shapes other than a circle as in this case, the parasitic resistances of the breakdown voltage adjusting first conductivity type low concentration regions 5 are the same as those in the case of FIGS. 5A and 5B , and therefore the same effect as that in Modified Example 4 can be obtained.
- the element isolation insulating film 2 is assumed to be formed by LOCOS. However, even when the element isolation insulating film 2 is formed by shallow trench isolation (STI), the same effect can be obtained. In this manner, the present invention is not limited to the above-mentioned embodiments, and can be modified within the scope of the present invention without departing from the gist thereof.
- STI shallow trench isolation
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- Element Separation (AREA)
- Bipolar Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
A semiconductor device having a clamp diode has a breakdown voltage adjusting first conductivity type low concentration region provided on a semiconductor substrate. A second conductivity type high concentration region of circular shape is provided within the breakdown voltage adjusting first conductivity type low concentration region so as to be surrounded by the first conductivity type low concentration region but not surrounded by any other low concentration region. A first conductivity type high concentration region is provided within the first conductivity type low concentration region, without being held in contact with the second conductivity type high concentration region.
Description
- 1. Field of the Invention
- The present invention relates to a semiconductor device. In particular, the present invention relates to a clamp diode used in a semiconductor device.
- 2. Description of the Related Art
- A clamp diode is a device which uses a junction breakdown voltage between the p-type semiconductor and the n-type semiconductor to maintain (clamp) a voltage supplied to a circuit constant in a semiconductor device. Since a clamp diode is a device capable of limiting a voltage easily, there is a high demand and a wide usage in electronic devices.
- When manufacturing a clamp diode, which limits a voltage to be constant, it is extremely important for the clamp diode to have small fluctuations in breakdown voltage within a wafer, among wafers, and among lots, and to have little change over time. In addition, it is also important for the clamp diode to have a small leakage current until breakdown occurs. Even though the structure of the clamp diode is simple, it is not easy to produce a clamp diode which satisfies all of the above-mentioned characteristics.
- Japanese Published Patent Application No.11-307787 discloses the invention for improving the above-mentioned change over time.
FIG. 7 is a cross-sectional view of the structure illustrated inFIG. 1 of the Japanese Published Patent Application. There is described that, as illustrated inFIG. 7 , a second conductivity typehigh concentration region 1 is placed away from an elementisolation insulating film 2 by a predetermined distance, and further, anelectrode 8 is provided through the intermediation of aninsulating film 9, thereby adjusting a voltage of theelectrode 8 to improve the change in the clamp diode over time.FIG. 8 is a cross-sectional view of the structure illustrated inFIG. 6 of the Japanese Published Patent Application. As shown in this structure, there is described that the same effect can be obtained even without theelectrode 8 ofFIG. 7 . - Though the change over time can be improved by the invention disclosed in the Japanese Published Patent Application, there is no description, however, on the degree of fluctuations within a wafer, between wafers, and among lots, and the presence or absence of leakage before breakdown occurs. Indeed, in the invention disclosed in the Japanese Published Patent Application the fluctuations within a wafer, between wafers, and among lots are not reduced because of the following reasons.
- Since an electric field corresponding to a voltage applied to the
electrode 8 is applied to a p-n junction through theoxide film 9 in the structure illustrated inFIG. 7 , the electric field is thought to be constant and the p-n junction breakdown voltage does not seem to fluctuate due to the electric field. Ideally, when the same voltage is applied to theelectrodes 8, the breakdown voltages are the same. However, actually, the thicknesses of theoxide films 9 are not the same within a wafer, between wafers, and among lots, and hence the electric fields applied to the p-n junctions by the voltages of theelectrodes 8 fluctuate. As a result, the p-n junction breakdown voltages fluctuate. - Further, due to the presence of a first
conductivity type region 7 below the elementisolation insulating film 2 of FIGS. and 8, impurities in the firstconductivity type region 7 affect impurity distribution near the p-n junction, and the breakdown voltage of the p-n junction changes. Also in this regard, ideally, when the firstconductivity type regions 7 are produced in the same condition, the breakdown voltages of the p-n junctions are the same. Actually the concentrations of impurities in the firstconductivity type regions 7, however, are not the same within a wafer, between wafers, and among lots, and the p-n junction breakdown voltages are affected to various degrees. As a result, the p-n junction breakdown voltages fluctuate. - According to the Japanese Published Patent Application No. 11-307787, a planar shape of the second conductivity type
high concentration region 1 ofFIG. 7 is octagon (not shown in this specification). In such a structure having corners, electric field strength is high at a corner portion, and therefore the breakdown voltage is determined by the corner portion.FIG. 9 shows the breakdown voltages in the case where the planar shape of the second conductivity typehigh concentration region 1 is rectangular and in the case where the planar shape thereof is circular. It is apparent that the breakdown voltage is lower in the case of the clamp diode having the rectangular second conductivity typehigh concentration region 1 than in the case of the clamp diode having the circular second conductivity typehigh concentration region 1. That is, it is apparent that the electric field is concentrated at the corner portions of the rectangle, and the corner portions determine the breakdown voltage. Ideally, the breakdown voltages of the p-n junctions will be the same since the shapes of the corner portions are always the same when lithography is performed in the same condition. Actually the electric field strength at the corner portions, however, fluctuates within a wafer, between wafers, and among lots. As a result, the p-n junction breakdown voltages fluctuate. - As described above, there are many factors that cause the breakdown voltages of the p-n junctions to fluctuate, and, in order to suppress such fluctuations, the clamp diode needs to have a structure as simple as possible, and the factors that cause fluctuations need to be eliminated as much as possible.
- The present invention has been made in view of the above-mentioned problems, and the present invention provides a clamp diode which suppresses deterioration with time, fluctuations within a wafer surface, among wafers, and among lots, and leakage before breakdown.
- In order to solve the above-mentioned problems, according to an exemplary embodiment of the present invention, a semiconductor device including a clamp diode includes: a breakdown voltage adjusting first conductivity type low concentration region provided on a semiconductor substrate; a second conductivity type high concentration region provided within the breakdown voltage adjusting first conductivity type low concentration region, the second conductivity type high concentration region being circular; an element isolation insulating film provided within the breakdown voltage adjusting first conductivity type low concentration region, the element isolation insulating film being provided in a ring shape and surrounding the second conductivity type high concentration region without being held in contact therewith; and a first conductivity type high concentration region provided outside the ring of the element isolation insulating film within the breakdown voltage adjusting first conductivity type low concentration region.
- By the foregoing arrangement, the present invention provides a clamp diode having little deterioration with time, small fluctuations within a wafer surface, among wafers, and among lots, and little leakage before breakdown.
- In the accompanying drawings:
-
FIGS. 1A and 1B are diagrams illustrating a representative example of the present invention; -
FIG. 2 is a graph showing leakage characteristics of a clamp diode; -
FIG. 3 is a diagram illustrating Modified Example 1 of the present invention; -
FIGS. 4A and 4B are diagrams illustrating Modified Example 2 of the present invention; -
FIGS. 5A and 5B are diagrams illustrating Modified Example 4 of the present invention; -
FIGS. 6A and 6B are diagrams illustrating Modified Example 5 of the present invention; -
FIG. 7 is a diagram illustrating an embodiment of the conventional technology; -
FIG. 8 is a diagram illustrating another embodiment of the conventional technology; and -
FIG. 9 is a graph showing shape dependence of a second conductivity type high concentration region on a current-voltage characteristic of the clamp diode. - A mode for carrying out the present invention is described below with reference to the attached drawings.
-
FIGS. 1A and 1B are diagrams illustrating a clamp diode in a semiconductor device according to a first embodiment of the present invention.FIG. 1A is a plan view, andFIG. 1B is a cross-sectional view along the line A-A′ ofFIG. 1A . - A breakdown voltage adjusting first conductivity type
low concentration region 5 is provided on a surface of asemiconductor substrate 6, and a second conductivity typehigh concentration region 1, which has a conductivity type opposite to that of the breakdown voltage adjusting first conductivity typelow concentration region 5, is provided on a part of a surface of the breakdown voltage adjusting first conductivity typelow concentration region 5 so as to be circular in a plan view. On the surface of the breakdown voltage adjusting first conductivity typelow concentration region 5, an elementisolation insulating film 2 having a ring shape is provided in such a way that the elementisolation insulating film 2 surrounds the second conductivity typehigh concentration region 1 without being held in contact therewith The ring shape as used herein does not necessarily mean an annular shape or a doughnut shape, and an inner part of the ring shape of the elementisolation insulating film 2 is circular, but an outer shape thereof is rectangular in this embodiment. Further, on the breakdown voltage adjusting first conductivity typelow concentration region 5, a rectangular first conductivity typehigh concentration region 3 is provided so as to surround the elementisolation insulating film 2. The second conductivity typehigh concentration region 1 and the first conductivity typehigh concentration region 3 have surfaces covered with insulating films, and are respectively connected to different wirings viacontacts 4. - When a voltage is applied between the first conductivity type
high concentration region 3 and the second conductivity typehigh concentration region 1, due to breakdown of a p-n junction of the second conductivity typehigh concentration region 1 and the breakdown voltage adjusting first conductivity typelow concentration region 5, the voltage is clamped to be a constant voltage. Depending on the purposes, the semiconductor device may include only a clamp diode, or may include a circuit having components other than the clamp diode, such as a transistor. - As illustrated in
FIGS. 1A and 1B of the present invention, the second conductivity typehigh concentration region 1 is provided without being held in contact with the elementisolation insulating film 2, and hence the inventor(s) of the present invention have found that there can be obtained not only an effect of suppressing deterioration with time as described in Japanese Patent Application Laid-open No. Hei 11-307787 but also an effect of suppressing a leakage current at a voltage equal to or lower than a breakdown voltage of the p-n junction.FIG. 2 is a graph showing voltage-current characteristics of the clamp diode. “Not in contact” in the graph ofFIG. 2 refers to a structure in which the second conductivity typehigh concentration region 1 and the elementisolation insulating film 2 are not held in contact with each other as illustrated inFIGS. 1A and 1B , and “in contact” refers to a structure in which the second conductivity typehigh concentration region 1 and the elementisolation insulating film 2 are in contact with each other. As shown inFIG. 2 , the structure in which the second conductivity typehigh concentration region 1 and the elementisolation insulating film 2 are “not in contact” with each other has a smaller leakage current than the structure in which the second conductivity typehigh concentration region 1 and the elementisolation insulating film 2 are “in contact” with each other. The inventor(s) of the present invention have assumed the reason for this to be as follows. When forming the elementisolation insulating film 2 held in contact with the second conductivity typehigh concentration region 1, a distortion is generated between the elementisolation insulating film 2 and the breakdown voltage adjusting first conductivity typelow concentration region 5, and a level is formed in a forbidden band of the breakdown voltage adjusting first conductivity typelow concentration region 5. As a result, a current flows through the level, and hence a leakage current is large in the structure in which the second conductivity typehigh concentration region 1 and the elementisolation insulating film 2 are held in contact with each other. - Accordingly, in
FIGS. 1A and 1B of the present invention, together with the effect of suppressing deterioration with time described in the Japanese Published Patent Application No. 11-307787, the effect of suppressing a leakage current can be obtained, which is one of the objects of the present invention. - In
FIGS. 1A and 1B of the present invention, there is noelectrode 8 or insulatingfilm 9 of the conventional structure illustrated inFIG. 7 , and hence there is no fluctuation in an electric field propagating from theelectrode 8 to a p-n junction breakdown voltage, which is one of the objects of the present invention. As a result, a fluctuation in the p-n junction breakdown voltage is reduced. - In
FIGS. 1A and 1B of the present invention, there is no firstconductivity type region 7 of the conventional structure illustrated inFIGS. 7 and 8 , and hence the p-n junction breakdown voltage is not affected by the firstconductivity type region 7 to various degrees, which is one of the objects of the present invention. As a result, a fluctuation in the p-n junction breakdown voltage is further reduced along withEffect 2. - In
FIGS. 1A and 1B of the present invention, a planar shape of the second conductivity typehigh concentration region 1 is circular and has no corner, and hence there is no fluctuation in electric field strength due to fluctuations in corner portions of the second conductivity typehigh concentration region 1, which is one of the objects of the present invention. As a result, a fluctuation in the p-n junction breakdown voltage is further reduced along with 2 and 3.Effects -
FIG. 3 is a plan view illustrating Modified Example 1 of the present invention.FIG. 3 illustrates a case where a planar shape of a part of the elementisolation insulating film 2 on the second conductivity typehigh concentration region 1 side is rectangular. When the elementisolation insulating film 2 is not held in contact with the second conductivity typehigh concentration region 1 as in this case, even if the planar shape of the elementisolation insulating film 2 is not a circle as illustrated inFIGS. 1A and 1B , but a rectangle, a hexagon, or the like, the above-mentionedEffects 1 to 4 can be obtained. -
FIG. 4A is a plan view illustrating Modified Example 2 of the present invention, andFIG. 4B is a cross-sectional view. along the line B-B′ ofFIG. 4A . In an example illustrated inFIGS. 4A and 4B , there is no elementisolation insulating film 2 illustrated inFIG. 3 . In this way, even when there is no elementisolation insulating film 2, the above-mentionedEffects 1 to 4 can be obtained. - In
FIGS. 1A and 1B ,FIG. 3 , andFIGS. 4A and 4B , the first conductivity typehigh concentration region 3 is disposed in a rectangular ring shape. Even when the first conductivity typehigh concentration region 3 has a shape other than a rectangle, or even when the first conductivity typehigh concentration region 3 does not have a ring shape, the above-mentionedEffects 1 to 4 can be obtained. - In order to clamp a voltage in any current band at the same voltage, the clamp diode is required to have steep breakdown characteristics. In order to obtain the steep breakdown characteristics, a parasitic resistance may be reduced. In the present invention, the distance between the second conductivity type
high concentration region 1 and the first conductivity typehigh concentration region 3 is short, and a parasitic resistance of the breakdown voltage adjusting first conductivity typelow concentration region 5 is reduced, thereby obtaining the steep breakdown characteristics. -
FIG. 5A is a plan view illustrating another clamp diode ofFIGS. 1A and 1B , in which the parasitic resistance of the breakdown voltage adjusting first conductivity type low concentration region is reduced as much as possible.FIG. 5B is a plan view illustrating another clamp diode ofFIGS. 4A and 4B , in which the parasitic resistance of the breakdown voltage adjusting first conductivity typelow concentration region 5 is reduced as much as possible. - As illustrated in
FIGS. 5A and 5B , the ring shapes of the elementisolation insulating film 2 and the first conductivity typehigh concentration region 3 are all set to be annular shapes of circles, and each size thereof is set to be a minimum value of the design rule. In this way, the parasitic resistance of the breakdown voltage adjusting first conductivity typelow concentration region 5 can be reduced as much as possible and it is possible to obtain the steepest breakdown characteristics. -
FIGS. 6A and 6B are plan views respectively illustrating modified clamp diodes ofFIGS. 5A and 5B . Even when outer parts of the ring shapes of the first conductivity typehigh concentration regions 3 have shapes other than a circle as in this case, the parasitic resistances of the breakdown voltage adjusting first conductivity typelow concentration regions 5 are the same as those in the case ofFIGS. 5A and 5B , and therefore the same effect as that in Modified Example 4 can be obtained. - In all of the above-mentioned exemplary embodiments of the present invention, the element
isolation insulating film 2 is assumed to be formed by LOCOS. However, even when the elementisolation insulating film 2 is formed by shallow trench isolation (STI), the same effect can be obtained. In this manner, the present invention is not limited to the above-mentioned embodiments, and can be modified within the scope of the present invention without departing from the gist thereof.
Claims (3)
1. A semiconductor device, comprising:
a semiconductor substrate;
a breakdown voltage adjusting first conductivity type low concentration region provided on the semiconductor substrate;
a second conductivity type high concentration region provided near a surface within the breakdown voltage adjusting first conductivity type low concentration region so as to be surrounded by the first conductivity type low concentration region but not surrounded by any low concentration region other than the first conductivity type low concentration region, the second conductivity type high concentration region being circular; and
a first conductivity type high concentration region provided on the surface within the breakdown voltage adjusting first conductivity type low concentration region without being held in contact with the second conductivity type high concentration region.
2. A semiconductor device according to claim 1 , wherein the first conductivity type high concentration region has a ring shape and is provided so as to surround the second conductivity type high concentration region.
3. A semiconductor device according to claim 2 , wherein at least an inner part of the ring shape of the first conductivity type high concentration region is circular.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/746,018 US20150287714A1 (en) | 2012-04-17 | 2015-06-22 | Semiconductor device |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012-094089 | 2012-04-17 | ||
| JP2012094089A JP6001309B2 (en) | 2012-04-17 | 2012-04-17 | Semiconductor device |
| US13/855,781 US9177954B2 (en) | 2012-04-17 | 2013-04-03 | Semiconductor device |
| US14/746,018 US20150287714A1 (en) | 2012-04-17 | 2015-06-22 | Semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US13/855,781 Continuation US9177954B2 (en) | 2012-04-17 | 2013-04-03 | Semiconductor device |
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| US20150287714A1 true US20150287714A1 (en) | 2015-10-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US13/855,781 Expired - Fee Related US9177954B2 (en) | 2012-04-17 | 2013-04-03 | Semiconductor device |
| US14/746,018 Abandoned US20150287714A1 (en) | 2012-04-17 | 2015-06-22 | Semiconductor device |
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| Application Number | Title | Priority Date | Filing Date |
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| US13/855,781 Expired - Fee Related US9177954B2 (en) | 2012-04-17 | 2013-04-03 | Semiconductor device |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US9177954B2 (en) |
| JP (1) | JP6001309B2 (en) |
| KR (1) | KR102050703B1 (en) |
| CN (1) | CN103378168B (en) |
| TW (1) | TWI589007B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5486486A (en) * | 1993-09-10 | 1996-01-23 | Sgs-Thomson Microelectronics, S.R.1. | Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices |
| US20020070380A1 (en) * | 2000-12-12 | 2002-06-13 | Hideyuki Andoh | Semiconductor device and manufacturing method thereof |
| US20060113613A1 (en) * | 2003-09-12 | 2006-06-01 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US20100264491A1 (en) * | 2009-04-08 | 2010-10-21 | Fuji Electric Systems Co. Ltd. | High breakdown voltage semiconductor device and high voltage integrated circuit |
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|---|---|---|---|---|
| JPH06104455A (en) * | 1992-09-21 | 1994-04-15 | Hitachi Ltd | Pn junction diode and semiconductor integrated circuit device using the same |
| JPH08227999A (en) * | 1994-12-21 | 1996-09-03 | Mitsubishi Electric Corp | Insulated gate type bipolar transistor, manufacturing method thereof, semiconductor integrated circuit and manufacturing method thereof |
| JP4033513B2 (en) * | 1997-02-24 | 2008-01-16 | ローム株式会社 | Clamp element |
| JP3730394B2 (en) * | 1997-03-18 | 2006-01-05 | 株式会社東芝 | High voltage semiconductor device |
| JP3472476B2 (en) | 1998-04-17 | 2003-12-02 | 松下電器産業株式会社 | Semiconductor device and driving method thereof |
| JP3905981B2 (en) * | 1998-06-30 | 2007-04-18 | 株式会社東芝 | High voltage semiconductor device |
| US7667268B2 (en) * | 2002-08-14 | 2010-02-23 | Advanced Analogic Technologies, Inc. | Isolated transistor |
| TW560042B (en) * | 2002-09-18 | 2003-11-01 | Vanguard Int Semiconduct Corp | ESD protection device |
| JP2007134596A (en) * | 2005-11-11 | 2007-05-31 | Matsushita Electric Ind Co Ltd | Surge protection semiconductor device |
| JP5012978B2 (en) * | 2009-09-30 | 2012-08-29 | 株式会社デンソー | Semiconductor device and manufacturing method thereof |
-
2012
- 2012-04-17 JP JP2012094089A patent/JP6001309B2/en active Active
-
2013
- 2013-04-02 TW TW102111875A patent/TWI589007B/en active
- 2013-04-03 US US13/855,781 patent/US9177954B2/en not_active Expired - Fee Related
- 2013-04-15 CN CN201310128871.7A patent/CN103378168B/en active Active
- 2013-04-16 KR KR1020130041605A patent/KR102050703B1/en active Active
-
2015
- 2015-06-22 US US14/746,018 patent/US20150287714A1/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5486486A (en) * | 1993-09-10 | 1996-01-23 | Sgs-Thomson Microelectronics, S.R.1. | Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices |
| US20020070380A1 (en) * | 2000-12-12 | 2002-06-13 | Hideyuki Andoh | Semiconductor device and manufacturing method thereof |
| US20060113613A1 (en) * | 2003-09-12 | 2006-06-01 | Kabushiki Kaisha Toshiba | Semiconductor device |
| US20100264491A1 (en) * | 2009-04-08 | 2010-10-21 | Fuji Electric Systems Co. Ltd. | High breakdown voltage semiconductor device and high voltage integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103378168B (en) | 2017-06-20 |
| JP2013222854A (en) | 2013-10-28 |
| TW201405837A (en) | 2014-02-01 |
| TWI589007B (en) | 2017-06-21 |
| KR20130117683A (en) | 2013-10-28 |
| US20130277792A1 (en) | 2013-10-24 |
| US9177954B2 (en) | 2015-11-03 |
| CN103378168A (en) | 2013-10-30 |
| KR102050703B1 (en) | 2019-12-02 |
| JP6001309B2 (en) | 2016-10-05 |
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Owner name: SII SEMICONDUCTOR CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SEIKO INSTRUMENTS INC.;REEL/FRAME:038058/0892 Effective date: 20160105 |
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