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US20140264373A1 - III-Nitride Heterojunction Device - Google Patents

III-Nitride Heterojunction Device Download PDF

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US20140264373A1
US20140264373A1 US14/290,811 US201414290811A US2014264373A1 US 20140264373 A1 US20140264373 A1 US 20140264373A1 US 201414290811 A US201414290811 A US 201414290811A US 2014264373 A1 US2014264373 A1 US 2014264373A1
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iii
nitride
nitride semiconductor
heterojunction
semiconductor structure
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US14/290,811
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Robert Beach
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Infineon Technologies Americas Corp
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International Rectifier Corp USA
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Publication of US20140264373A1 publication Critical patent/US20140264373A1/en
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    • H01L29/7786—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H01L29/2003—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/824—Heterojunctions comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H10D8/60—Schottky-barrier diodes 

Definitions

  • the present invention relates to power semiconductor devices and more particularly to heterojunction power semiconductor devices.
  • III-nitride heterojunction power semiconductor devices are desirable for power applications due to their high breakdown capability, and low ON resistance.
  • U.S. patent application Ser. No. 11/004,212, assigned to the assignee of the present application illustrates an example of a Ill-nitride power semiconductor device.
  • a DI-nitride power semiconductor device as shown in U.S. patent application Ser. No. 11/004,212 includes substrate 28 , buffer layer 30 disposed on substrate 28 , a heterojunction 32 disposed on buffer layer 30 , a protective layer 34 disposed on heterojunction 32 , a schottky electrode 20 in schottky contact with heterojunction 32 , and an ohmic contact 22 ohmically connected to heterojunction 32 .
  • schottky contact 20 and ohmic contact 22 both include a field plate 36 .
  • Heterojunction 32 includes a resistive III-nitride semiconductor body (resistive body) 38 and a III-nitride semiconductor barrier body (barrier body) 40 both formed with an alloy of InAlGaN. Resistive body 38 and barrier body 40 are selected so that the junction between the two creates a highly conductive two dimensional gas (2DEG) 42 due to spontaneous polarization and the piezoelectric effect as is well known in the art.
  • 2DEG highly conductive two dimensional gas
  • One known material for forming resistive body 38 is undoped GaN, and a known material for forming barrier body 40 is AlGaN.
  • a power semiconductor device includes at least a first III-nitride heterojunction and at least a second III-nitride heterojunction disposed over the first III-nitride heterojunction.
  • a device includes a number of high density, high mobility 2DEG channels.
  • each heterojunction is preferably formed with a thin first III-nitride semiconductor body of one InAlGaN alloy and a second thin semiconductor body of another InAlGaN alloy.
  • each layer can be between 10-1000 ⁇ , and preferably between 150-300 ⁇ .
  • the multi layers of thin, but highly conductive heterojunction bodies result in a highly conductive power semiconductor device with a relatively high breakdown voltage.
  • a device is a lateral channel schottky type rectifier which includes schottky electrodes and ohmic electrodes alternately arranged in an interdigitated pattern resembling a comb to increase charge injection and extraction.
  • the electrodes in the preferred embodiment are preferably disposed on the stack of at least two III-nitride heterojunctions.
  • An example of such a structure is a stack of AlGaN/GaN/AlGaN/GaN disposed over a buffer layer and a substrate.
  • at least the bottom GaN layer is highly resistive; i.e. intrinsically doped, which means that it contains no more than residual doping, and is considered unintentionally doped.
  • the channel formed at the AlGaN/GaN interface can carry very large currents without the use of a thick doped region.
  • reverse bias the channel is depleted of mobile charge, so that no current can flow in the channel, and the highly resistive nature of the underlying GaN prevents charge from flowing.
  • the AlGaN and the GaN are intrinsically doped low electric fields result under a reverse bias, allowing for very high standoff voltages without the corresponding adverse effects on the forward resistance.
  • the layers can be doped to obtain the desired trade off between mobility and breakdown ability.
  • the replacement of a doped current carrying layer with a highly conductive 2DEG drastically improves the RA product for a given breakdown voltage.
  • the use of multiple layers of AlGaN/GaN results in increased current conduction, and the resistive GaN layer allows isolation of the device by etching away, for example, portions of AlGaN-GaN stack that surround the device.
  • the resistive GaN layer allows isolation of the device by etching away, for example, portions of AlGaN-GaN stack that surround the device.
  • FIG. 1 schematically illustrates a cross-sectional view of a power device according to the prior art.
  • FIG. 2 shows a top plan view of a portion of an active cell of a device according to the present invention.
  • FIG. 3 shows a cross-sectional view of a portion of an active cell of a device according to an embodiment of the present invention along line A-A in FIG. 2 as seen in the direction of the arrows.
  • FIGS. 4A-4D schematically illustrate the fabrication of a device according to the present invention.
  • FIG. 5 schematically shows a cross-sectional view of a portion of a device according to an alternative embodiment of the present invention.
  • FIG. 6 schematically shows a variation of the embodiment shown in FIG. 5 .
  • a device includes a plurality of interdigitated power electrodes, namely schottky electrodes 20 and ohmic electrodes 22 .
  • Schottky electrodes 20 are connected to a common schottky feed 24 and ohmic electrodes 22 are connected to a common ohmic feed 26 .
  • each common feed 24 , 26 is connected electrically to a respective conductive pad for external connection.
  • a device according to the present invention includes two or more III-nitride heterojunctions.
  • a power device according to the present invention includes another heterojunction 33 between heterojunction 32 and buffer layer 30 .
  • Heterojunction 33 preferably includes a III-nitride semiconductor resistive body (resistive body) 39 , and a III-nitride semiconductor barrier body (barrier body) 41 .
  • Resistive body 39 and barrier body 41 are selected so that the junction between the two creates a highly conductive 2-DEG 42 as described above.
  • resistive body 39 may be composed of undoped GaN
  • barrier body 41 is preferably composed of AlGaN. It should be noted that other alloys of InAlGaN can be used to form either resistive body 39 or barrier body 41 without deviating from the spirit and the scope of the present invention.
  • substrate 28 is formed from silicon. It should be noted that substrate 28 can also be formed with SiC, sapphire, or any other suitable substrate. In addition, a compatible III-nitride semiconductor bulk material such as bulk GaN can be used as substrate 28 , in which case, buffer layer 26 may be omitted when resistive body 38 is composed of intrinsic GaN.
  • a stack including substrate 28 , buffer layer 30 , heterojunction 32 , heterojunction 33 , and protective layer 34 is masked and etched to provide an opening 44 in protective layer 34 as illustrated schematically in FIG. 4B . Opening 44 reaches at least barrier body 40 of heterojunction 32 .
  • ohmic electrode 22 is formed in opening 44 reaching at least and making ohmic contact with barrier body 40 , resulting in the structure schematically illustrated by FIG. 4C .
  • Ohmic electrode 22 is formed by depositing an ohmic metal followed by an annealing step. Thereafter, another opening 46 is formed in protective layer 34 , opening 46 reaching at least barrier body 40 , as shown schematically in FIG. 4D .
  • schottky electrode 20 is formed by depositing a schottky metal in opening 46 reaching at least and making schottky contact with barrier body 40 .
  • Field plate 36 is then formed atop schottky electrode 20 , resulting in a device according to the embodiment shown in FIG. 3 .
  • a device includes a lightly doped III-nitride body 48 , formed preferably from GaN, and disposed over heterojunctions 32 , 33 .
  • ohmic electrode 22 and schottky electrode 20 are connected to lightly doped IQ-nitride body 48 .
  • This structure is similar to a lateral conduction schottky, but exhibits an increased conductivity in the forward current carry direction.
  • a recess is provided in lightly doped IQ-nitride body 48 to allow ohmic electrode 22 to be positioned on a plane below the plane of schottky electrode 20 and to ohmically connect to heterojunction 32 .
  • protective layer 34 can be made from a material that retards or prevents the out diffusion of nitrogen during the annealing step.
  • a nitrogen rich material may be suitable for this purpose.
  • AlN, HfN, AlGaN, highly doped GaN, highly doped poly GaN, and LPCVD Si 3 N 4 are among materials suitable for forming protective layer 34 .
  • ohmic electrode 22 may be formed from an Al/Ti body such as Ti/Al/Ti/TiW, Ti/Al/Ni/Au, or the like, while schottky electrode 20 may be formed from Ni/Au, Pt/Au, Pd/Au, Au, TiW, Ni/TiW, Ni/TiN, or the like. It should be noted that the materials noted herein are preferred, but that other materials maybe used without deviating from the scope and spirit of the present invention.

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Abstract

A III-nitride power semiconductor device that includes a plurality of III-nitride heterojunctions.

Description

    RELATED APPLICATION
  • This application is based on and claims benefit of U.S. Provisional Application No. 60/614,675, filed on Sep. 30, 2004, entitled III-Nitride Multi-Channel Heterojunction Interdigitated Rectifier, to which a claim of priority is hereby made and the disclosure of which is incorporated by reference.
    • BACKGROUND OF THE INVENTION
  • The present invention relates to power semiconductor devices and more particularly to heterojunction power semiconductor devices.
  • III-nitride heterojunction power semiconductor devices are desirable for power applications due to their high breakdown capability, and low ON resistance. U.S. patent application Ser. No. 11/004,212, assigned to the assignee of the present application illustrates an example of a Ill-nitride power semiconductor device.
  • Referring to FIG. 2, a DI-nitride power semiconductor device as shown in U.S. patent application Ser. No. 11/004,212 includes substrate 28, buffer layer 30 disposed on substrate 28, a heterojunction 32 disposed on buffer layer 30, a protective layer 34 disposed on heterojunction 32, a schottky electrode 20 in schottky contact with heterojunction 32, and an ohmic contact 22 ohmically connected to heterojunction 32. Preferably, schottky contact 20 and ohmic contact 22 both include a field plate 36.
  • Heterojunction 32 includes a resistive III-nitride semiconductor body (resistive body) 38 and a III-nitride semiconductor barrier body (barrier body) 40 both formed with an alloy of InAlGaN. Resistive body 38 and barrier body 40 are selected so that the junction between the two creates a highly conductive two dimensional gas (2DEG) 42 due to spontaneous polarization and the piezoelectric effect as is well known in the art.
  • One known material for forming resistive body 38 is undoped GaN, and a known material for forming barrier body 40 is AlGaN.
    • SUMMARY OF THE INVENTION
  • A power semiconductor device according to the present invention includes at least a first III-nitride heterojunction and at least a second III-nitride heterojunction disposed over the first III-nitride heterojunction. As a result, a device according to the present invention includes a number of high density, high mobility 2DEG channels.
  • Specifically, each heterojunction is preferably formed with a thin first III-nitride semiconductor body of one InAlGaN alloy and a second thin semiconductor body of another InAlGaN alloy. For example, each layer can be between 10-1000 Å, and preferably between 150-300 Å. The multi layers of thin, but highly conductive heterojunction bodies result in a highly conductive power semiconductor device with a relatively high breakdown voltage.
  • A device according to the preferred embodiment is a lateral channel schottky type rectifier which includes schottky electrodes and ohmic electrodes alternately arranged in an interdigitated pattern resembling a comb to increase charge injection and extraction. The electrodes in the preferred embodiment are preferably disposed on the stack of at least two III-nitride heterojunctions. An example of such a structure is a stack of AlGaN/GaN/AlGaN/GaN disposed over a buffer layer and a substrate. Preferably, at least the bottom GaN layer is highly resistive; i.e. intrinsically doped, which means that it contains no more than residual doping, and is considered unintentionally doped.
  • In the example described above, under forward bias, the channel formed at the AlGaN/GaN interface can carry very large currents without the use of a thick doped region. In reverse bias, the channel is depleted of mobile charge, so that no current can flow in the channel, and the highly resistive nature of the underlying GaN prevents charge from flowing. In addition, when the AlGaN and the GaN are intrinsically doped low electric fields result under a reverse bias, allowing for very high standoff voltages without the corresponding adverse effects on the forward resistance. It should be noted that, depending on the intended device characteristics, the layers can be doped to obtain the desired trade off between mobility and breakdown ability.
  • Also, advantageously, the replacement of a doped current carrying layer with a highly conductive 2DEG drastically improves the RA product for a given breakdown voltage. Furthermore, the use of multiple layers of AlGaN/GaN results in increased current conduction, and the resistive GaN layer allows isolation of the device by etching away, for example, portions of AlGaN-GaN stack that surround the device. As a result it may be possible to integrate a number of devices on a single chip, thereby allowing for the fabrication of IC's that include a device according to the present invention.
  • Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.
    • BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 schematically illustrates a cross-sectional view of a power device according to the prior art.
  • FIG. 2 shows a top plan view of a portion of an active cell of a device according to the present invention.
  • FIG. 3 shows a cross-sectional view of a portion of an active cell of a device according to an embodiment of the present invention along line A-A in FIG. 2 as seen in the direction of the arrows.
  • FIGS. 4A-4D schematically illustrate the fabrication of a device according to the present invention.
  • FIG. 5 schematically shows a cross-sectional view of a portion of a device according to an alternative embodiment of the present invention.
  • FIG. 6 schematically shows a variation of the embodiment shown in FIG. 5.
    •  DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION
  • Referring to FIG. 2, a device according to an embodiment of the present invention includes a plurality of interdigitated power electrodes, namely schottky electrodes 20 and ohmic electrodes 22. Schottky electrodes 20 are connected to a common schottky feed 24 and ohmic electrodes 22 are connected to a common ohmic feed 26. Although not shown, one skilled in the art would understand that each common feed 24, 26 is connected electrically to a respective conductive pad for external connection.
  • A device according to the present invention includes two or more III-nitride heterojunctions. Referring, for example, to FIG. 3, a power device according to the present invention includes another heterojunction 33 between heterojunction 32 and buffer layer 30. Heterojunction 33 preferably includes a III-nitride semiconductor resistive body (resistive body) 39, and a III-nitride semiconductor barrier body (barrier body) 41. Resistive body 39 and barrier body 41 are selected so that the junction between the two creates a highly conductive 2-DEG 42 as described above. In the preferred embodiment, resistive body 39 may be composed of undoped GaN, while barrier body 41 is preferably composed of AlGaN. It should be noted that other alloys of InAlGaN can be used to form either resistive body 39 or barrier body 41 without deviating from the spirit and the scope of the present invention.
  • In the preferred embodiment, substrate 28 is formed from silicon. It should be noted that substrate 28 can also be formed with SiC, sapphire, or any other suitable substrate. In addition, a compatible III-nitride semiconductor bulk material such as bulk GaN can be used as substrate 28, in which case, buffer layer 26 may be omitted when resistive body 38 is composed of intrinsic GaN.
  • Referring to FIG. 4A, in order to fabricate a device according to the present invention a stack including substrate 28, buffer layer 30, heterojunction 32, heterojunction 33, and protective layer 34 is masked and etched to provide an opening 44 in protective layer 34 as illustrated schematically in FIG. 4B. Opening 44 reaches at least barrier body 40 of heterojunction 32.
  • Next, ohmic electrode 22 is formed in opening 44 reaching at least and making ohmic contact with barrier body 40, resulting in the structure schematically illustrated by FIG. 4C. Ohmic electrode 22 is formed by depositing an ohmic metal followed by an annealing step. Thereafter, another opening 46 is formed in protective layer 34, opening 46 reaching at least barrier body 40, as shown schematically in FIG. 4D. Next, schottky electrode 20 is formed by depositing a schottky metal in opening 46 reaching at least and making schottky contact with barrier body 40. Field plate 36 is then formed atop schottky electrode 20, resulting in a device according to the embodiment shown in FIG. 3.
  • Referring next to FIG. 5, a device according to another embodiment includes a lightly doped III-nitride body 48, formed preferably from GaN, and disposed over heterojunctions 32, 33. In this embodiment, ohmic electrode 22 and schottky electrode 20 are connected to lightly doped IQ-nitride body 48. This structure is similar to a lateral conduction schottky, but exhibits an increased conductivity in the forward current carry direction.
  • Referring to FIG. 6, in a modified version of the embodiment shown in FIG. 5, a recess is provided in lightly doped IQ-nitride body 48 to allow ohmic electrode 22 to be positioned on a plane below the plane of schottky electrode 20 and to ohmically connect to heterojunction 32.
  • It should be noted that protective layer 34 can be made from a material that retards or prevents the out diffusion of nitrogen during the annealing step. A nitrogen rich material may be suitable for this purpose. For example, AlN, HfN, AlGaN, highly doped GaN, highly doped poly GaN, and LPCVD Si3N4 are among materials suitable for forming protective layer 34. Also, in the preferred embodiment ohmic electrode 22 may be formed from an Al/Ti body such as Ti/Al/Ti/TiW, Ti/Al/Ni/Au, or the like, while schottky electrode 20 may be formed from Ni/Au, Pt/Au, Pd/Au, Au, TiW, Ni/TiW, Ni/TiN, or the like. It should be noted that the materials noted herein are preferred, but that other materials maybe used without deviating from the scope and spirit of the present invention.
  • Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.

Claims (21)

1-43. (canceled)
44. A III-nitride semiconductor structure comprising:
a first III-nitride heterojunction;
a second III-nitride heterojunction over said first III-nitride heterojunction;
an ohmic electrode electrically coupled to said first III-nitride heterojunction;
a gate situated over said first III-nitride heterojunction;
wherein said first and second III-nitride heterojunctions are configured to form at least two lateral channels between said ohmic electrode and said gate.
45. The III-nitride semiconductor structure of claim 44, wherein each of said at least two lateral channels comprises a two-dimensional electron gas (2DEG).
46. The III-nitride semiconductor structure of claim 44, wherein said gate comprises a schottky electrode.
47. The III-nitride semiconductor structure of claim 44, wherein said first III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second III-nitride semiconductor body comprising GaN.
48. The III-nitride semiconductor structure of claim 44, wherein said second III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second III-nitride semiconductor body comprising GaN.
49. The III-nitride semiconductor structure of claim 47, wherein said second III-nitride semiconductor body is undoped.
50. The III-nitride semiconductor structure of claim 48, wherein said second III-nitride semiconductor body is undoped.
51. The III-nitride semiconductor structure of claim 44, further comprising a buffer layer disposed between said first III-nitride heterojunction and a substrate, wherein said substrate is selected from the group consisting of Si, SiC, Sapphire, and GaN.
52. The III-nitride semiconductor structure of claim 51, wherein said buffer layer comprises AlN.
53. A III-nitride semiconductor structure comprising:
a first III-nitride heterojunction;
a second III-nitride heterojunction over said first III-nitride heterojunction;
a first ohmic electrode electrically coupled to said first III-nitride heterojunction;
a second ohmic electrode electrically coupled to said first III-nitride heterojunction;
wherein said first and second III-nitride heterojunctions are configured to form at least two lateral channels between said first and second ohmic electrodes.
54. The III-nitride semiconductor structure of claim 53, wherein each of said at least two lateral channels comprises a two-dimensional electron gas (2DEG).
55. The III-nitride semiconductor structure of claim 53, wherein said first III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second III-nitride semiconductor body comprising GaN.
56. The III-nitride semiconductor structure of claim 53, wherein said second III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second III-nitride semiconductor body comprising GaN.
57. The III-nitride semiconductor structure of claim 53, further comprising a buffer layer disposed between said first III-nitride heterojunction and a substrate, wherein said substrate is selected from the group consisting of Si, SiC, Sapphire, and GaN.
58. The III-nitride semiconductor structure of claim 57, wherein said buffer layer comprises AlN.
59. A III-nitride semiconductor structure comprising:
a first III-nitride heterojunction;
a second III-nitride heterojunction over said first III-nitride heterojunction;
a first ohmic electrode electrically coupled to said first III-nitride heterojunction;
a second ohmic electrode electrically coupled to said first III-nitride heterojunction;
wherein said first III-nitride heterojunction is configured to form at least one lateral channel between said first and second ohmic electrodes.
60. The III-nitride semiconductor structure of claim 59, wherein said at least one lateral channel comprises a two-dimensional electron gas (2DEG).
61. The III-nitride semiconductor structure of claim 59, wherein said first III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second III-nitride semiconductor body comprising GaN.
62. The III-nitride semiconductor structure of claim 59, wherein said second III-nitride heterojunction includes a first III-nitride semiconductor body comprising AlGaN, and a second Ill-nitride semiconductor body comprising GaN.
63. The Ill-nitride semiconductor structure of claim 59, further comprising a buffer layer disposed between said first III-nitride heterojunction and a substrate, wherein said substrate is selected from the group consisting of Si, SiC, Sapphire, and GaN.
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US13/891,080 US8742450B2 (en) 2004-09-30 2013-05-09 III-nitride multi-channel heterojunction device
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