US20140220301A1 - Epitaxial substrate having nano-rugged surface and fabrication thereof - Google Patents
Epitaxial substrate having nano-rugged surface and fabrication thereof Download PDFInfo
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- US20140220301A1 US20140220301A1 US14/250,620 US201414250620A US2014220301A1 US 20140220301 A1 US20140220301 A1 US 20140220301A1 US 201414250620 A US201414250620 A US 201414250620A US 2014220301 A1 US2014220301 A1 US 2014220301A1
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/60—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape characterised by shape
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- H10P14/20—
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- H10P14/2901—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24355—Continuous and nonuniform or irregular surface on layer or component [e.g., roofing, etc.]
Definitions
- the invention relates to an epitaxial substrate and fabrication thereof, and more in particular, to an epitaxial substrate having a nano-rugged and non-patterned epitaxial surface and fabrication thereof
- Compound semiconductor materials such as GaN, AlGaN, AlInGaN, and other III-V group compounds, or CdTe, ZnO, ZnS, and other II-VI group compounds, have been used for a wide variety of substrates of microelectronic devices including transistors, field emission devices, and optoelectronic devices, but not limiting the above described.
- the GaN semiconductor layer manufactured must have low defect density to ensure the performance of the GaN-based microelectronic device. It is understood that one of these contributors for defects is the lattice mismatch between the substrate and the GaN layers grown on the substrate. Therefore, though the GaN layer has been grown on the sapphire substrate, but it is well known that the GaN layer is preferably grown on the AlN buffer layer previously formed on the SiC substrate to reduce the defect density, especially to reduce the density of threading dislocations. Even though there are these considerable progresses, it is still the goal desired to reach to reduce the defect density continuously on the research.
- the condition of epitaxy is controlled to achieve the lateral epitaxy by use of the substrate with patterned surface, which benefits in preferred orientation of epitaxy, to reduce the defect density or control defects.
- a GaN semiconductor layer can be formed on the sapphire substrate with patterned surface in lateral epitaxial way to control dislocations in extending laterally to reduce the density of threading dislocations.
- one scope of the invention is to provide an epitaxial substrate and fabrication thereof.
- an epitaxial surface of the epitaxial substrate according to the invention is non-patterned, but thereon still benefits a compound semiconductor material in lateral epitaxy to grow an epitaxial layer with excellent quality.
- the method of manufacturing the epitaxial substrate according to the invention has advantages of low cost and rapid production.
- An epitaxial substrate includes a crystalline substrate.
- the crystalline substrate has an epitaxial surface.
- the epitaxial surface of the crystalline substrate is nano-rugged and non-patterned.
- a method of fabricating an epitaxial substrate firstly, is to prepare a crystalline substrate which has an epitaxial surface.
- the method according to the invention is to deposit a poly-crystalline layer of a material on the epitaxial surface of the crystalline substrate.
- the method according to the invention is to etch the grain boundaries of the poly-crystalline layer by a first wet etching process.
- the method according to the invention is to take the etched poly-crystalline layer as a mask, and to etch the regions within the grain boundaries of the ploy-crystalline layer by a plasma etching process.
- the method according to the invention is to remove the etched poly-crystalline layer by a second wet etching process, where the epitaxial surface of the crystalline substrate is nano-rugged and non-patterned.
- the epitaxial surface of the crystalline substrate has an average surface roughness (Ra) in a range from 100 nm to 400 nm.
- the epitaxial surface of the crystalline substrate has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm.
- the crystalline substrate can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO 4 , SrCu 2 O 2 , YSZ(Yttria-Stabilized Zirconia), LiAlO 2 , LiGaO 2 , Li 2 SiO 3 , LiGeO 3 , NaAlO 2 , NaGaO 2 , Na 2 GeO 3 , Na 2 SiO 3 , Li 3 PO 4 , Li 3 AsO 4 , Li 3 VO 4 , Li 2 MgGeO 4 , Li 2 ZnGeO 4 , Li 2 CdGeO 4 , Li 2 MgSiO 4 , Li 2 ZnSiO 4 , Li 2 CdSiO 4 , Na 2 MgGeO 4 , Na 2 ZnGeO 4 , Na 2 ZnSiO 4 , or other commercial materials provided for epitaxy.
- the material to form the poly-crystalline layer can be Ge, ZnO, ZnS, CdSe, CdTe, CdS, ZnSe, InAs, InP, Si, or metal/silicide where the metal can be Al, Ni, Fe or other metal, and the silicide can be SiAl, SiZn, SiNi or other silicide.
- the poly-crystalline layer can be deposited on the epitaxial surface of the crystalline substrate by an LPCVD (low pressure chemical vapor deposition) process, an PECVD (plasma-enhanced chemical vapor deposition) process, a sputtering process, or a thermal evaporation process.
- LPCVD low pressure chemical vapor deposition
- PECVD plasma-enhanced chemical vapor deposition
- sputtering a sputtering process
- thermal evaporation process a thermal evaporation process.
- the poly-crystalline layer has a thickness in a range from 20 nm to 2000 nm.
- the epitaxial surface of the epitaxial substrate according to the invention is nano-rugged and non-patterned, and still benefits a compound semiconductor material in growing epitaxial layers with excellent quality.
- the method of manufacturing the epitaxial substrate according to the invention has advantages of low cost and rapid production.
- FIG. 1 illustratively shows an epitaxial substrate with nano-rugged and non-patterned surface according to a preferred embodiment of the invention.
- FIGS. 2A through 2C illustratively show a method according to a preferred embodiment of the invention to fabricate an epitaxial substrate, for example, as shown in FIG. 1 .
- FIG. 3 is an atomic force microscopy image of morphology of a sapphire substrate fabricated according to the invention.
- FIG. 4 is a transmission electron microscope image of an un-doped GaN layer grown on a sapphire substrate fabricated according to the invention.
- FIG. 5A is an atomic force microscopy image of an un-doped GaN layer grown on a sapphire substrate fabricated according to the invention.
- FIG. 5B is an SEM image of an etched un-doped GaN layer grown on a sapphire substrate fabricated according to the invention.
- FIG. 5C is an atomic force microscopy image of an un-doped GaN layer grown on a sapphire substrate with smooth surface.
- FIG. 1 is a cross-sectional view of an epitaxial substrate 1 according to a preferred embodiment of the invention.
- the epitaxial substrate 1 can be provided for a compound semiconductor material in epitaxy, such as GaN, AlGaN, AlInGaN, or other III-V group compounds, or CdTe, ZnO, ZnS, or other II-VI group compounds.
- the epitaxial substrate 1 includes a crystalline substrate 10 .
- the crystalline substrate 10 has an epitaxial surface 102 .
- the epitaxial surface 102 of the crystalline substrate 10 is nano-rugged and non-patterned. It is noted that similar to the epitaxial substrates with patterned surfaces of the prior arts, the epitaxial substrate 1 according to the invention can also benefit the compound semiconductor material in lateral epitaxy.
- the epitaxial surface 102 of the crystalline substrate 10 has an average surface roughness (Ra) in a range from 100 nm to 400 nm.
- the epitaxial surface 102 of the crystalline substrate 10 has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm.
- the crystalline substrate 10 can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO 4 , SrCu 2 O 2 , YSZ(Yttria-Stabilized Zirconia), LiAlO 2 , LiGaO 2 , Li 2 SiO 3 , LiGeO 3 , NaAlO 2 , NaGaO 2 , Na 2 GeO 3 , Na 2 SiO 3 , Li 3 PO 4 , Li 3 AsO 4 , Li 3 VO 4 , Li 2 MgGeO 4 , Li 2 ZnGeO 4 , Li 2 CdGeO 4 , Li 2 MgSiO 4 , Li 2 ZnSiO 4 , Li 2 CdSiO 4 , Na 2 MgGeO 4 , Na 2 ZnGeO 4 , Na 2 ZnSiO 4 , or other commercial materials provided for epitaxy.
- FIGS. 2A through 2C and FIG. 1 these figures of sectional views illustratively show a method according to a preferred embodiment of the invention to fabricate the epitaxial substrate 1 , for example, as shown in FIG. 1 .
- the method according to the invention firstly, is to prepare a crystalline substrate 10 .
- the crystalline substrate 10 has an epitaxial surface 102 .
- the crystalline substrate 10 can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO 4 , SrCu 2 O 2 , YSZ(Yttria-Stabilized Zirconia), LiAlO 2 , LiGaO 2 , Li 2 SiO 3 , LiGeO 3 , NaAlO 2 , NaGaO 2 , Na 2 GeO 3 , Na 2 SiO 3 , Li 3 PO 4 , Li 3 AsO 4 , Li 3 VO 4 , Li 2 MgGeO 4 , Li 2 ZnGeO 4 , Li 2 CdGeO 4 , Li 2 MgSiO 4 , Li 2 ZnSiO 4 , Li 2 CdSiO 4 , Na 2 MgGeO 4 , Na 2 ZnGeO 4 , Na 2 ZnSiO 4 , or other commercial materials provided for epitaxy.
- the method according to the invention is to deposit a poly-crystalline layer 12 of a material on the epitaxial surface 102 of the crystalline substrate 10 , as shown in FIG. 2B . Also shown in FIG. 2B , the poly-crystalline layer 12 has grain boundaries 122 .
- the material to form the poly-crystalline layer 12 can be Ge, ZnO, ZnS, CdSe, CdTe, CdS, ZnSe, InAs, InP, Si, or metal/silicide where the metal can be Al, Ni, Fe or other metal, and the silicide can be SiAl, SiZn, SiNi or other silicide.
- the poly-crystalline layer 12 can be deposited on the epitaxial surface 102 of the crystalline substrate 10 by an LPCVD (low pressure chemical vapor deposition) process, an PECVD (plasma-enhanced chemical vapor deposition) process, a sputtering process, or a thermal evaporation process.
- LPCVD low pressure chemical vapor deposition
- PECVD plasma-enhanced chemical vapor deposition
- sputtering process a thermal evaporation process.
- the poly-crystalline layer 12 has a thickness in a range from 20 nm to 2000 nm.
- the method according to the invention is to etch the grain boundaries 122 of the poly-crystalline layer 12 by a first wet etching process.
- the sectional view of the etched poly-crystalline 12 is shown in FIG. 2C .
- etching solutions which can be used to etch the grain boundaries 122 of poly-crystalline layer 12 , and the compositions of these etching solutions are listed in Table 1.
- Table 1 lists four etching solutions including Secco solution, Sirtl solution, Wright solution, and Seiter solution.
- these etching solutions listed in Table 1 cannot etch the sapphire substrate 10 , these etching solutions can etch the grain boundaries 122 of the poly-crystalline layer 12 until the epitaxial surface 102 of the sapphire substrate 10 underneath the grain boundaries 122 is exposed. Otherwise, as the case, these etching solutions just etch the grain boundaries 122 of the poly-crystalline layer 12 to certain depth where the epitaxial surface 102 of the sapphire substrate 10 underneath the grain boundaries 122 is not exposed.
- the method according to the invention is to take the etched poly-crystalline layer 12 as a mask, and to etch the regions within the grain boundaries 122 of the ploy-crystalline layer 12 by a plasma etching process. Finally, the method according to the invention is to remove the etched poly-crystalline layer 12 by a second wet etching process, where the epitaxial surface 102 of the crystalline substrate 10 is nano-rugged and non-patterned.
- the second wet etching process can use the etching solution as the same as that used in the first wet etching process.
- the epitaxial surface 102 of the crystalline substrate 10 has an average surface roughness (Ra) in a range from 100 nm to 400 nm.
- the epitaxial surface 102 of the crystalline substrate 10 has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm.
- the Ra and Rz values of the epitaxial surface 102 of the crystalline substrate 10 can be controlled by controlling the thickness and grain size of the poly-crystalline layer 12 and etching conditions.
- FIG. 3 is an atomic force microscopy (AFM) image. It is evident that the morphology of the epitaxial substrate exhibits nano-rugged and non-patterned surface.
- AFM atomic force microscopy
- FIG. 4 A transmission electron microscope (TEM) image of a sapphire substrate sample (labeled as NRSS) fabricated according to the invention is shown in FIG. 4 , and an un-doped GaN layer (labeled as u-GaN) grown on the epitaxial surface of the sapphire substrate is also shown in FIG. 4 .
- FIG. 4 evidently shows that the un-doped GaN layer has low density of dislocations which are laterally extending dislocations rather than threading dislocations.
- FIG. 5A An AFM image of an un-doped GaN layer grown on the aforesaid NRSS sample is shown in FIG. 5A .
- the un-doped GaN layer grown on the NRSS sample is etched at 180 ° C. for 1 minute in KOH aqueous solution, an SEM image of the etched un-doped GaN layer is shown in FIG. 5B .
- the etched pits shown in FIG. SB are just evidence of threading dislocations. By statistical counting, the density of threading dislocations of the un-doped GaN layer grown on the NRSS sample is about 3.6 ⁇ 10 6 cm ⁇ 2 .
- FIG. 5C an AFM image of an un-doped GaN layer grown on a sapphire substrate with smooth surface is shown in FIG. 5C .
- FIG. 5C shows less smooth surface.
- the density of threading dislocations of the un-doped GaN layer grown on the sapphire substrate with smooth surface is about 1 ⁇ 10 9 cm ⁇ 2 .
- the epitaxial substrate according to the invention can reduce density of dislocations, especially for density of threading dislocations.
- the epitaxial substrate 1 with nano-rugged and non-patterned surface according to the invention can also benefit the compound semiconductor material in lateral epitaxy to reduce density of defects and to enhance quality of epitaxial layers.
- Table 2 lists measured photoelectric properties of sample labeled as NRSS that the GaN layer is grown on the sapphire substrate with nano-rugged and non-patterned surface fabricated according to the invention.
- Table 2 also lists measured photoelectric properties of sample labeled as PSS that the GaN layer is grown on the sapphire substrate with patterned surface, and measured photoelectric properties of sample labeled as FSS that the GaN layer is grown on the sapphire substrate with smooth surface.
- the method of fabricating the epitaxial substrate according to the invention is not only without the need of a photolithography process, and but also without the introduction of complicated process. Therefore, it is obvious that the method according to the invention has advantages of low manufacture cost and rapid production speed.
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Abstract
The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.
Description
- This utility application is a divisional application of U.S. Ser. No. 13/067,710 filed on Jun. 22, 2011 which claims priority to Taiwan Application Serial Number 099123227, filed on Jul. 15, 2010.
- 1. Field of the Invention
- The invention relates to an epitaxial substrate and fabrication thereof, and more in particular, to an epitaxial substrate having a nano-rugged and non-patterned epitaxial surface and fabrication thereof
- 2. Description of the Prior Art
- Compound semiconductor materials, such as GaN, AlGaN, AlInGaN, and other III-V group compounds, or CdTe, ZnO, ZnS, and other II-VI group compounds, have been used for a wide variety of substrates of microelectronic devices including transistors, field emission devices, and optoelectronic devices, but not limiting the above described.
- Taking a GaN-based microelectronic device as an example, a major problem in manufacture is that the GaN semiconductor layer manufactured must have low defect density to ensure the performance of the GaN-based microelectronic device. It is understood that one of these contributors for defects is the lattice mismatch between the substrate and the GaN layers grown on the substrate. Therefore, though the GaN layer has been grown on the sapphire substrate, but it is well known that the GaN layer is preferably grown on the AlN buffer layer previously formed on the SiC substrate to reduce the defect density, especially to reduce the density of threading dislocations. Even though there are these considerable progresses, it is still the goal desired to reach to reduce the defect density continuously on the research.
- It is also well-known that the condition of epitaxy is controlled to achieve the lateral epitaxy by use of the substrate with patterned surface, which benefits in preferred orientation of epitaxy, to reduce the defect density or control defects. For example, a GaN semiconductor layer can be formed on the sapphire substrate with patterned surface in lateral epitaxial way to control dislocations in extending laterally to reduce the density of threading dislocations.
- However, all of the prior arts regarding manufacture of the epitaxial substrate with patterned surface must utilize a photolithography process. Obviously, the prior arts regarding manufacture of the epitaxial substrate with patterned surface have high manufacture cost and slow production speed.
- Accordingly, one scope of the invention is to provide an epitaxial substrate and fabrication thereof. In particular, an epitaxial surface of the epitaxial substrate according to the invention is non-patterned, but thereon still benefits a compound semiconductor material in lateral epitaxy to grow an epitaxial layer with excellent quality. Moreover, the method of manufacturing the epitaxial substrate according to the invention has advantages of low cost and rapid production.
- An epitaxial substrate according to a preferred embodiment of the invention includes a crystalline substrate. The crystalline substrate has an epitaxial surface. In particular, the epitaxial surface of the crystalline substrate is nano-rugged and non-patterned.
- A method of fabricating an epitaxial substrate, according to a preferred embodiment of the invention, firstly, is to prepare a crystalline substrate which has an epitaxial surface. Next, the method according to the invention is to deposit a poly-crystalline layer of a material on the epitaxial surface of the crystalline substrate. Then, the method according to the invention is to etch the grain boundaries of the poly-crystalline layer by a first wet etching process. Afterward, the method according to the invention is to take the etched poly-crystalline layer as a mask, and to etch the regions within the grain boundaries of the ploy-crystalline layer by a plasma etching process. Finally, the method according to the invention is to remove the etched poly-crystalline layer by a second wet etching process, where the epitaxial surface of the crystalline substrate is nano-rugged and non-patterned.
- In one embodiment, the epitaxial surface of the crystalline substrate has an average surface roughness (Ra) in a range from 100 nm to 400 nm.
- In one embodiment, the epitaxial surface of the crystalline substrate has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm.
- In practical application, the crystalline substrate can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO4, SrCu2O2, YSZ(Yttria-Stabilized Zirconia), LiAlO2, LiGaO2, Li2SiO3, LiGeO3, NaAlO2, NaGaO2, Na2GeO3, Na2SiO3, Li3PO4, Li3AsO4, Li3VO4, Li2MgGeO4, Li2ZnGeO4, Li2CdGeO4, Li2MgSiO4, Li2ZnSiO4, Li2CdSiO4, Na2MgGeO4, Na2ZnGeO4, Na2ZnSiO4, or other commercial materials provided for epitaxy.
- In practical application, the material to form the poly-crystalline layer can be Ge, ZnO, ZnS, CdSe, CdTe, CdS, ZnSe, InAs, InP, Si, or metal/silicide where the metal can be Al, Ni, Fe or other metal, and the silicide can be SiAl, SiZn, SiNi or other silicide.
- In one embodiment, the poly-crystalline layer can be deposited on the epitaxial surface of the crystalline substrate by an LPCVD (low pressure chemical vapor deposition) process, an PECVD (plasma-enhanced chemical vapor deposition) process, a sputtering process, or a thermal evaporation process.
- In one embodiment, the poly-crystalline layer has a thickness in a range from 20 nm to 2000 nm.
- Compared to the prior arts, the epitaxial surface of the epitaxial substrate according to the invention is nano-rugged and non-patterned, and still benefits a compound semiconductor material in growing epitaxial layers with excellent quality. Moreover, the method of manufacturing the epitaxial substrate according to the invention has advantages of low cost and rapid production.
- The advantage and spirit of the invention may be understood by the following recitations together with the appended drawings.
-
FIG. 1 illustratively shows an epitaxial substrate with nano-rugged and non-patterned surface according to a preferred embodiment of the invention. -
FIGS. 2A through 2C illustratively show a method according to a preferred embodiment of the invention to fabricate an epitaxial substrate, for example, as shown inFIG. 1 . -
FIG. 3 is an atomic force microscopy image of morphology of a sapphire substrate fabricated according to the invention. -
FIG. 4 is a transmission electron microscope image of an un-doped GaN layer grown on a sapphire substrate fabricated according to the invention. -
FIG. 5A is an atomic force microscopy image of an un-doped GaN layer grown on a sapphire substrate fabricated according to the invention. -
FIG. 5B is an SEM image of an etched un-doped GaN layer grown on a sapphire substrate fabricated according to the invention. -
FIG. 5C is an atomic force microscopy image of an un-doped GaN layer grown on a sapphire substrate with smooth surface. - Referring to
FIG. 1 ,FIG. 1 is a cross-sectional view of an epitaxial substrate 1 according to a preferred embodiment of the invention. The epitaxial substrate 1 can be provided for a compound semiconductor material in epitaxy, such as GaN, AlGaN, AlInGaN, or other III-V group compounds, or CdTe, ZnO, ZnS, or other II-VI group compounds. - As shown in
FIG. 1 , the epitaxial substrate 1 according to the invention includes acrystalline substrate 10. Thecrystalline substrate 10 has anepitaxial surface 102. - Different from the prior arts, the
epitaxial surface 102 of thecrystalline substrate 10 is nano-rugged and non-patterned. It is noted that similar to the epitaxial substrates with patterned surfaces of the prior arts, the epitaxial substrate 1 according to the invention can also benefit the compound semiconductor material in lateral epitaxy. - In one embodiment, the
epitaxial surface 102 of thecrystalline substrate 10 has an average surface roughness (Ra) in a range from 100 nm to 400 nm. - In one embodiment, the
epitaxial surface 102 of thecrystalline substrate 10 has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm. - In practical application, the
crystalline substrate 10 can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO4, SrCu2O2, YSZ(Yttria-Stabilized Zirconia), LiAlO2, LiGaO2, Li2SiO3, LiGeO3, NaAlO2, NaGaO2, Na2GeO3, Na2SiO3, Li3PO4, Li3AsO4, Li3VO4, Li2MgGeO4, Li2ZnGeO4, Li2CdGeO4, Li2MgSiO4, Li2ZnSiO4, Li2CdSiO4, Na2MgGeO4, Na2ZnGeO4, Na2ZnSiO4, or other commercial materials provided for epitaxy. - Referring to
FIGS. 2A through 2C andFIG. 1 , these figures of sectional views illustratively show a method according to a preferred embodiment of the invention to fabricate the epitaxial substrate 1, for example, as shown inFIG. 1 . - As shown in
FIG. 2A , the method according to the invention, firstly, is to prepare acrystalline substrate 10. Thecrystalline substrate 10 has anepitaxial surface 102. - In practical application, the
crystalline substrate 10 can be formed of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO4, SrCu2O2, YSZ(Yttria-Stabilized Zirconia), LiAlO2, LiGaO2, Li2SiO3, LiGeO3, NaAlO2, NaGaO2, Na2GeO3, Na2SiO3, Li3PO4, Li3AsO4, Li3VO4, Li2MgGeO4, Li2ZnGeO4, Li2CdGeO4, Li2MgSiO4, Li2ZnSiO4, Li2CdSiO4, Na2MgGeO4, Na2ZnGeO4, Na2ZnSiO4, or other commercial materials provided for epitaxy. - Next, the method according to the invention is to deposit a poly-
crystalline layer 12 of a material on theepitaxial surface 102 of thecrystalline substrate 10, as shown inFIG. 2B . Also shown inFIG. 2B , the poly-crystalline layer 12 hasgrain boundaries 122. - In practical application, the material to form the poly-
crystalline layer 12 can be Ge, ZnO, ZnS, CdSe, CdTe, CdS, ZnSe, InAs, InP, Si, or metal/silicide where the metal can be Al, Ni, Fe or other metal, and the silicide can be SiAl, SiZn, SiNi or other silicide. - In one embodiment, the poly-
crystalline layer 12 can be deposited on theepitaxial surface 102 of thecrystalline substrate 10 by an LPCVD (low pressure chemical vapor deposition) process, an PECVD (plasma-enhanced chemical vapor deposition) process, a sputtering process, or a thermal evaporation process. - In one embodiment, the poly-
crystalline layer 12 has a thickness in a range from 20 nm to 2000 nm. - Then, the method according to the invention is to etch the
grain boundaries 122 of the poly-crystalline layer 12 by a first wet etching process. The sectional view of the etched poly-crystalline 12 is shown inFIG. 2C . - In a case, taking a sapphire as the
substrate 10, various etching solutions, which can be used to etch thegrain boundaries 122 of poly-crystalline layer 12, and the compositions of these etching solutions are listed in Table 1. Table 1 lists four etching solutions including Secco solution, Sirtl solution, Wright solution, and Seiter solution. -
TABLE 1 composition (Mol %) etching solution solvent 1) HF oxizers 2) Secco 67.6 32.2 0.17 Sirtl 71.2 26.3 2.5 Wright 78.5 16.1 5.4 Seiter 78.5 5.9 15.6 1) H2O + CH3COOH(HAc); 2) CrO3 + HNO3 - Furthermore, because the etching solutions listed in Table 1 cannot etch the
sapphire substrate 10, these etching solutions can etch thegrain boundaries 122 of the poly-crystalline layer 12 until theepitaxial surface 102 of thesapphire substrate 10 underneath thegrain boundaries 122 is exposed. Otherwise, as the case, these etching solutions just etch thegrain boundaries 122 of the poly-crystalline layer 12 to certain depth where theepitaxial surface 102 of thesapphire substrate 10 underneath thegrain boundaries 122 is not exposed. - Afterward, the method according to the invention is to take the etched poly-
crystalline layer 12 as a mask, and to etch the regions within thegrain boundaries 122 of the ploy-crystalline layer 12 by a plasma etching process. Finally, the method according to the invention is to remove the etched poly-crystalline layer 12 by a second wet etching process, where theepitaxial surface 102 of thecrystalline substrate 10 is nano-rugged and non-patterned. - In practice, the second wet etching process can use the etching solution as the same as that used in the first wet etching process.
- In one embodiment, the
epitaxial surface 102 of thecrystalline substrate 10 has an average surface roughness (Ra) in a range from 100 nm to 400 nm. - In one embodiment, the
epitaxial surface 102 of thecrystalline substrate 10 has a mean peak-to-valley height (Rz) in a range from 50 nm to 350 nm. - In practice, the Ra and Rz values of the
epitaxial surface 102 of thecrystalline substrate 10 can be controlled by controlling the thickness and grain size of the poly-crystalline layer 12 and etching conditions. - Taking a sapphire substrate as an example, the morphology of the sapphire substrate sample fabricated according to the invention is shown in
FIG. 3 that is an atomic force microscopy (AFM) image. It is evident that the morphology of the epitaxial substrate exhibits nano-rugged and non-patterned surface. - A transmission electron microscope (TEM) image of a sapphire substrate sample (labeled as NRSS) fabricated according to the invention is shown in
FIG. 4 , and an un-doped GaN layer (labeled as u-GaN) grown on the epitaxial surface of the sapphire substrate is also shown inFIG. 4 .FIG. 4 evidently shows that the un-doped GaN layer has low density of dislocations which are laterally extending dislocations rather than threading dislocations. - An AFM image of an un-doped GaN layer grown on the aforesaid NRSS sample is shown in
FIG. 5A . The un-doped GaN layer grown on the NRSS sample is etched at 180 ° C. for 1 minute in KOH aqueous solution, an SEM image of the etched un-doped GaN layer is shown inFIG. 5B . The etched pits shown in FIG. SB are just evidence of threading dislocations. By statistical counting, the density of threading dislocations of the un-doped GaN layer grown on the NRSS sample is about 3.6×106 cm−2. In contrast, an AFM image of an un-doped GaN layer grown on a sapphire substrate with smooth surface is shown inFIG. 5C . Obviously, compared toFIG. 5A ,FIG. 5C shows less smooth surface. By statistical counting, the density of threading dislocations of the un-doped GaN layer grown on the sapphire substrate with smooth surface is about 1×109 cm−2. Obviously, compared to the epitaxial substrates with smooth epitaxial surface, the epitaxial substrate according to the invention can reduce density of dislocations, especially for density of threading dislocations. - Similar to the epitaxial substrates with patterned surfaces of the prior arts, the epitaxial substrate 1 with nano-rugged and non-patterned surface according to the invention can also benefit the compound semiconductor material in lateral epitaxy to reduce density of defects and to enhance quality of epitaxial layers. Table 2 lists measured photoelectric properties of sample labeled as NRSS that the GaN layer is grown on the sapphire substrate with nano-rugged and non-patterned surface fabricated according to the invention. In contrast, Table 2 also lists measured photoelectric properties of sample labeled as PSS that the GaN layer is grown on the sapphire substrate with patterned surface, and measured photoelectric properties of sample labeled as FSS that the GaN layer is grown on the sapphire substrate with smooth surface.
-
TABLE 2 forward voltage peak emission wavelength luminous intensity sample (Volt.) (nm) (a.u.) NRSS 3.71 457.21 5.71 × 10−7 PSS 3.60 450.30 5.50 × 10−7 FSS 3.69 459.51 3.33 × 10−7 - With photoelectric properties listed in Table 2, it is evident that the photoelectric properties of sample NRSS with sapphire substrate according to the invention are close to those of sample PSS with patterned sapphire substrate, and are better than those of sample FSS with smooth sapphire substrate.
- It is emphasized that different from the prior arts, the method of fabricating the epitaxial substrate according to the invention is not only without the need of a photolithography process, and but also without the introduction of complicated process. Therefore, it is obvious that the method according to the invention has advantages of low manufacture cost and rapid production speed.
- With the example and explanations above, the features and spirits of the invention will be hopefully well described. Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims (4)
1. An epitaxial substrate, comprising:
a crystalline substrate having an epitaxial surface which is nano-rugged and non-patterned.
2. The epitaxial substrate of claim 1 , wherein the crystalline substrate is formed of one selected from the group consisting of sapphire, SiC, GaN, GaAs, ZnO, Si, ScAlMgO4, SrCu2O2, YSZ(Yttria-Stabilized Zirconia), LiAlO2, LiGaO2, Li2SiO3, LiGeO3, NaAlO2, NaGaO2, Na2GeO3, Na2SiO3, Li3PO4, Li3AsO4, Li3VO4, Li2MgGeO4, Li2ZnGeO4, Li2CdGeO4, Li2MgSiO4, Li2ZnSiO4, Li2CdSiO4, Na2MgGeO4, Na2ZnGeO4, and Na2ZnSiO4.
3. The epitaxial substrate of claim 2 , wherein the epitaxial surface of the crystalline substrate has an average surface roughness (Ra) in a range from 100 nm to 400 nm.
4. The epitaxial substrate of claim 2 , wherein the epitaxial surface of the crystalline substrate has a mean peak-to-valley height (Rz) in a range from 50 μm to 350 μm.
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| TW099123227A TWI450323B (en) | 2010-02-26 | 2010-07-15 | Epitaxial substrate having a nano-scale uneven surface and method of manufacturing the same |
| US13/067,710 US9068279B2 (en) | 2010-07-15 | 2011-06-22 | Epitaxial substrate having nano-rugged surface and fabrication thereof |
| US14/250,620 US20140220301A1 (en) | 2010-07-15 | 2014-04-11 | Epitaxial substrate having nano-rugged surface and fabrication thereof |
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| CN107119320A (en) * | 2016-02-23 | 2017-09-01 | 松下知识产权经营株式会社 | RAMO4 substrates and its manufacture method |
| CN107382299A (en) * | 2017-08-08 | 2017-11-24 | 电子科技大学 | A kind of low temperature preparation method of low dielectric microwave media ceramic |
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| TWI528580B (en) * | 2012-03-30 | 2016-04-01 | 聖戈班晶體探測器公司 | Method of forming a freestanding semiconductor wafer |
| WO2014031772A1 (en) * | 2012-08-21 | 2014-02-27 | Regents Of The University Of Minnesota | Embedded mask patterning process for fabricating magnetic media and other structures |
| US10347467B2 (en) | 2015-08-21 | 2019-07-09 | Regents Of The University Of Minnesota | Embedded mask patterning process for fabricating magnetic media and other structures |
| CN107099844B (en) * | 2016-02-23 | 2021-01-05 | 松下知识产权经营株式会社 | RAMO4Substrate and method for manufacturing the same |
| JP6319598B2 (en) * | 2016-02-23 | 2018-05-09 | パナソニックIpマネジメント株式会社 | RAMO4 substrate and manufacturing method thereof |
| US11370076B2 (en) * | 2016-02-23 | 2022-06-28 | Panasonic Intellectual Property Management Co., Ltd. | RAMO4 substrate and manufacturing method thereof |
| FR3048547B1 (en) | 2016-03-04 | 2018-11-09 | Saint-Gobain Lumilog | PROCESS FOR PRODUCING A SEMICONDUCTOR SUBSTRATE |
| US10304740B2 (en) * | 2016-12-15 | 2019-05-28 | Panasonic Intellectual Property Management Co., Ltd. | RAMO4 monocrystalline substrate |
| US11894313B2 (en) * | 2020-10-27 | 2024-02-06 | Texas Instruments Incorporated | Substrate processing and packaging |
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| US20080224270A1 (en) * | 2006-09-29 | 2008-09-18 | Sumco Techxiv Corporation | Silicon single crystal substrate and manufacture thereof |
| US20080277686A1 (en) * | 2007-05-08 | 2008-11-13 | Huga Optotech Inc. | Light emitting device and method for making the same |
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| KR100576854B1 (en) * | 2003-12-20 | 2006-05-10 | 삼성전기주식회사 | Nitride semiconductor manufacturing method and nitride semiconductor using same |
| KR20060092897A (en) * | 2005-09-23 | 2006-08-23 | 주식회사 엘지화학 | Light emitting diode device with improved light extraction efficiency and manufacturing method thereof |
| TW200729325A (en) * | 2006-01-18 | 2007-08-01 | Univ Nat Cheng Kung | Method for transferring nano-imprint pattern by using wet etching |
| GB0702560D0 (en) * | 2007-02-09 | 2007-03-21 | Univ Bath | Production of Semiconductor devices |
| JP2009135474A (en) * | 2007-10-31 | 2009-06-18 | Mitsubishi Chemicals Corp | Etching method and optical / electronic device manufacturing method using the same |
| WO2009084325A1 (en) * | 2007-12-28 | 2009-07-09 | Mitsubishi Chemical Corporation | Led element and method for manufacturing led element |
| TWI373145B (en) * | 2008-08-07 | 2012-09-21 | Neo Solar Power Corp | Manufacturing method of photoelectric conversion element |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20080224270A1 (en) * | 2006-09-29 | 2008-09-18 | Sumco Techxiv Corporation | Silicon single crystal substrate and manufacture thereof |
| US20080277686A1 (en) * | 2007-05-08 | 2008-11-13 | Huga Optotech Inc. | Light emitting device and method for making the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107119320A (en) * | 2016-02-23 | 2017-09-01 | 松下知识产权经营株式会社 | RAMO4 substrates and its manufacture method |
| US10350725B2 (en) * | 2016-02-23 | 2019-07-16 | Panasonic Intellectual Property Management Co., Ltd. | RAMO4 substrate and manufacturing method thereof |
| CN107382299A (en) * | 2017-08-08 | 2017-11-24 | 电子科技大学 | A kind of low temperature preparation method of low dielectric microwave media ceramic |
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| Publication number | Publication date |
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| TW201130017A (en) | 2011-09-01 |
| KR20120007966A (en) | 2012-01-25 |
| TWI450323B (en) | 2014-08-21 |
| US20120015143A1 (en) | 2012-01-19 |
| JP2012023365A (en) | 2012-02-02 |
| JP5097291B2 (en) | 2012-12-12 |
| US9068279B2 (en) | 2015-06-30 |
| KR101255463B1 (en) | 2013-04-16 |
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