US20120012375A1 - Insulating material and printed circuit board having the same - Google Patents
Insulating material and printed circuit board having the same Download PDFInfo
- Publication number
- US20120012375A1 US20120012375A1 US13/137,935 US201113137935A US2012012375A1 US 20120012375 A1 US20120012375 A1 US 20120012375A1 US 201113137935 A US201113137935 A US 201113137935A US 2012012375 A1 US2012012375 A1 US 2012012375A1
- Authority
- US
- United States
- Prior art keywords
- insulator
- liquid composition
- weight
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011810 insulating material Substances 0.000 title claims abstract description 24
- 239000012212 insulator Substances 0.000 claims abstract description 65
- 239000000203 mixture Substances 0.000 claims abstract description 64
- 239000007788 liquid Substances 0.000 claims abstract description 36
- 239000000463 material Substances 0.000 claims abstract description 31
- VLDPXPPHXDGHEW-UHFFFAOYSA-N 1-chloro-2-dichlorophosphoryloxybenzene Chemical compound ClC1=CC=CC=C1OP(Cl)(Cl)=O VLDPXPPHXDGHEW-UHFFFAOYSA-N 0.000 claims abstract description 18
- HLBLWEWZXPIGSM-UHFFFAOYSA-N 4-Aminophenyl ether Chemical compound C1=CC(N)=CC=C1OC1=CC=C(N)C=C1 HLBLWEWZXPIGSM-UHFFFAOYSA-N 0.000 claims abstract description 18
- 150000003918 triazines Chemical class 0.000 claims abstract description 18
- 239000003960 organic solvent Substances 0.000 claims abstract description 16
- NXDMHKQJWIMEEE-UHFFFAOYSA-N 4-(4-aminophenoxy)aniline;furo[3,4-f][2]benzofuran-1,3,5,7-tetrone Chemical compound C1=CC(N)=CC=C1OC1=CC=C(N)C=C1.C1=C2C(=O)OC(=O)C2=CC2=C1C(=O)OC2=O NXDMHKQJWIMEEE-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 claims abstract description 14
- 230000000149 penetrating effect Effects 0.000 claims abstract description 3
- ZMXDDKWLCZADIW-UHFFFAOYSA-N N,N-Dimethylformamide Chemical compound CN(C)C=O ZMXDDKWLCZADIW-UHFFFAOYSA-N 0.000 claims description 51
- 239000004744 fabric Substances 0.000 claims description 21
- 239000004745 nonwoven fabric Substances 0.000 claims description 18
- FXHOOIRPVKKKFG-UHFFFAOYSA-N N,N-Dimethylacetamide Chemical compound CN(C)C(C)=O FXHOOIRPVKKKFG-UHFFFAOYSA-N 0.000 claims description 16
- 239000011152 fibreglass Substances 0.000 claims description 14
- 239000004952 Polyamide Substances 0.000 claims description 12
- 229920002647 polyamide Polymers 0.000 claims description 12
- 229920000728 polyester Polymers 0.000 claims description 12
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 claims description 8
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical group O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 claims description 8
- 229920003192 poly(bis maleimide) Polymers 0.000 claims description 8
- 239000010410 layer Substances 0.000 description 39
- 238000007747 plating Methods 0.000 description 23
- 238000000034 method Methods 0.000 description 21
- 238000004519 manufacturing process Methods 0.000 description 13
- 238000004381 surface treatment Methods 0.000 description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 12
- 238000010884 ion-beam technique Methods 0.000 description 8
- 239000000047 product Substances 0.000 description 6
- 239000000654 additive Substances 0.000 description 5
- 229910052802 copper Inorganic materials 0.000 description 5
- 239000010949 copper Substances 0.000 description 5
- 238000009713 electroplating Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- 230000001678 irradiating effect Effects 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- 238000001771 vacuum deposition Methods 0.000 description 3
- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 239000003063 flame retardant Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/032—Organic insulating material consisting of one material
- H05K1/0346—Organic insulating material consisting of one material containing N
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49227—Insulator making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T442/00—Fabric [woven, knitted, or nonwoven textile or cloth, etc.]
- Y10T442/20—Coated or impregnated woven, knit, or nonwoven fabric which is not [a] associated with another preformed layer or fiber layer or, [b] with respect to woven and knit, characterized, respectively, by a particular or differential weave or knit, wherein the coating or impregnation is neither a foamed material nor a free metal or alloy layer
Definitions
- the present invention relates to an insulating material, a printed circuit board that utilizes the insulating material, and a method of manufacturing the printed circuit board.
- PCB printed circuit board
- HDI high density interconnection
- UTCSP ultra-thin chip scale package
- BGA ball grid array
- FCBGA flip chip BGA
- the insulation material in each type of product can be FR-4 (Flame Retardant 4), BT (Bismaleimide-Triazine), ABF (Ajinomoto build-up film), etc.
- An aspect of the invention provides an insulating material that provides improved adhesion between the insulating material and the circuit pattern, to enable the forming of fine-line circuit patterns, and also provides a printed circuit board that utilizes the insulating material and a method of manufacturing the printed circuit board.
- the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- PMDA pyromellitic dianhydride
- ODA oxydianiline
- the triazine derivative can be bismaleimide triazine
- the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- the base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
- the curing of the liquid composition can be performed at a temperature of 180 to 250° C.
- a printed circuit board that includes an insulator, a circuit pattern formed on one or either side of the insulator, and a via penetrating the insulator.
- the insulator can be formed by impregnating a base material with a liquid composition and curing the liquid composition, where the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- PMDA-ODA mixture which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- the triazine derivative can be bismaleimide triazine
- the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- the base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
- the curing of the liquid composition can be performed at a temperature of 180 to 250° C.
- Still another aspect of the invention provides a method of manufacturing a printed circuit board, which includes a circuit pattern and at least one via.
- the method includes perforating at least one through-hole corresponding with the at least one , which is in correspondence with the via, in a first insulator; applying a surface treatment on the first insulator by irradiating an ion beam; forming a first seed layer over an inner wall of the through-hole and over one or either side of the first insulator; forming a first plating resist over one or either side of the first insulator on which the first seed layer is formed; performing electroplating in correspondence with the circuit pattern and the via; removing the first plating resist; and removing a portion of the first seed layer by flash etching.
- the insulator can be formed by impregnating a base material with a liquid composition and curing the liquid composition, where the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- a PMDA-ODA mixture which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- PMDA pyromellitic dianhydride
- ODA oxydianiline
- the triazine derivative can be bismaleimide triazine
- the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- the base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
- Applying the surface treatment can be performed using a gas containing one of argon (Ar), oxygen (O 2 ), and nitrogen (N 2 ), or a mixture thereof.
- Forming the seed layer can be performed by vacuum deposition.
- the method may further include, after removing the portion of the first seed layer, stacking a second insulator over one or either side of the first insulator, forming at least one blind via hole in the second insulator, applying a surface treatment on the second insulator by irradiating an ion beam, forming a second seed layer over an inner wall of the blind via hole and over one or either side of the second insulator, forming a second plating resist over one or either side of the second insulator on which the second seed layer is formed, performing electroplating, removing the second plating resist, and removing a portion of the second seed layer by flash etching.
- FIG. 1 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the invention.
- FIG. 2 , FIG. 3 , FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , FIG. 8 , FIG. 9 , FIG. 10 , FIG. 11 , FIG. 12 , FIG. 13 , FIG. 14 , and FIG. 15 are cross sectional views each representing a process for a method of manufacturing a printed circuit board according to an embodiment of the invention.
- the insulating material based on an embodiment of the invention may be formed by impregnating a base material with a liquid composition, which can include 20 to 50 parts by weight of a PMDA-ODA mixture that includes pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40, 50 to 80 parts by weight of a triazine derivative, and 300 to 600 parts by weight of an organic solvent, which can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof, and then curing the liquid composition.
- a liquid composition which can include 20 to 50 parts by weight of a PMDA-ODA mixture that includes pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40, 50 to 80 parts by weight of a triazine derivative, and 300 to 600 parts by weight of an organic solvent, which can be one of dimethylform
- a triazine-modified flame-retardant resin When the pyromellitic dianhydride, oxydianiline, and triazine derivative react in an organic solvent, a triazine-modified flame-retardant resin may be obtained.
- the insulating material obtained by impregnating a base material with this resin and curing the resin can be used advantageously in a printed circuit board to implement circuits with finer lines.
- the content of the pyromellitic dianhydride (PMDA) and oxydianiline (ODA) used in the liquid composition can be of a weight ratio between 40:60 and 60:40. In certain embodiments, a weight ratio between 45:55 and 55:45 can be used, and in certain embodiments, a weight ratio of about 50:50. A ratio outside the above range may lead to an excess of monomers that do not undergo polymerization, and may thus provide less desirable properties.
- an insulating material can be fabricated by impregnating the base material with the liquid composition and curing the liquid composition.
- bismaleimide triazine can be used for the triazine derivative, and dimethylformamide (DMF) or dimethylacetamide (DMAC) or a mixture of the two can be used for the organic solvent.
- DMF dimethylformamide
- DMAC dimethylacetamide
- the invention is not thus limited.
- the content of each component may advantageously be adjusted in consideration of differences in adhesion and contraction stability in the triazine derivative. If the content of the PMDA-ODA mixture is less than 20 parts by weight, there may be less dispersion at the surfaces of the substrate, leading to less effective surface treatment. On the other hand, if the content exceeds 50 parts by weight, the water absorption of bismaleimide triazine can be 1.0% or higher, which can lead to lower dimensional stability. If the content of the triazine derivative is lower than 50 parts by weight, there will be fewer COOH groups and hence fewer hydrophilic groups, which can cause problems in adhesion.
- the content of the triazine derivative exceeds 80 parts by weight, there may not be adequate dispersion with the PMDA-ODA mixture, leading to lower adhesion and less effective surface treatment.
- the organic solvent can be maintained within the range described above, in order to keep the composition in a liquid phase and in a suitable viscosity for impregnating the base material.
- Curing agents and curing accelerators can be added to the liquid composition as necessary.
- the fabricating of the insulating material according to an aspect of the invention is not limited to a particular method, and any of various methods can be used that combines the liquid composition described above with a base material to produce an insulating material.
- the base material can be impregnated with the liquid composition, so that the liquid composition may permeate through the base material.
- the resulting fabric can be subject to a curing operation, for example, at a temperature of about 180 to 250° C., and can be completely cured to fabricate an A-stage insulator.
- the base material can be a material such as fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric, but is not thus limited. It can be advantageous to employ fiberglass fabric for the base material in terms of dimensional stability, and a thickness between 30 and 100 ⁇ m can be desirable for implementing fine-line circuits.
- the insulator thus formed can be stacked, for example in two or more layers, after which heat and pressure can be applied to the arrangement, to obtain an unclad prepreg that may be used in the manufacture of a printed circuit board, for example.
- a metal foil can be arranged on one or either side of a prepreg obtained by stacking the insulators, after which heat and pressure can be applied to the arrangement, to obtain a metal clad laminate that may be used in the manufacture of a printed circuit board.
- the metal foil may generally be a layer of copper or of aluminum, and may generally have a thickness of about 5 to 200 ⁇ m.
- a PMDA-ODA mixture that includes pyromellitic dianhydride and oxydianiline in a 1:1 weight ratio
- 250 g of bismaleimide triazine were added to 750 g of dimethylformamide to prepare a liquid composition.
- the liquid composition was impregnated into a roll type fiberglass fabric (thickness: 10 to 20 ⁇ m) and completely cured at 200° C. to fabricate an insulator for use in a printed circuit board.
- the completely cured insulator can be cut according to the specifications for a substrate. Then, after stacking several layers of the insulator, copper foils were overlaid over both sides of the stack, and the arrangement was pressed for 120 minutes at 200° C. and 15 kg/cm2, to fabricate a copper clad laminate.
- the insulating material described above can be utilized in the manufacture of a printed circuit board. That is, a circuit pattern can be formed on one side or either side of an insulator, as well as vias for interlayer connection. Of course, it is also possible to stack several of these insulators and form a circuit pattern and vias, etc., on or in each of the layers, to manufacture a multi-layer printed circuit board.
- FIG. 1 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the invention
- FIG. 2 through FIG. 15 are cross sectional views each representing a process for a method of manufacturing a printed circuit board according to an embodiment of the invention.
- FIGS. 1 and 2 through FIG. 15 are cross sectional views each representing a process for a method of manufacturing a printed circuit board according to an embodiment of the invention.
- a copper clad laminate 10 there are illustrated a copper clad laminate 10 , a first insulator 11 , copper foils 12 , through-holes 21 , a first seed layer 22 , first plating resists 23 , circuit patterns 30 , vias 31 , second insulators 40 , 50 , second seed layers 42 , 52 , second plating resists 43 , 53 , blind via holes 41 , 51 , blind vias 45 , 55 , solder resists 60 , and plating layers 70 .
- through-holes 21 may be formed in a first insulator 11 that correspond to vias (S 110 ). This can be achieved using a method of preparing an unclad material that does not have metal foils formed thereon, as illustrated in FIG. 3 , and then perforating the through-holes 21 , as illustrated in FIG. 4 . It is also possible to prepare a copper clad laminate (CCL) 10 that includes copper foils 12 formed on both sides of the first insulator 11 and generally etch the copper foils 12 , to obtain the first insulator 11 as illustrated in FIG. 3 . Of course, other methods may also be used, such as preparing an RCC (resin coated copper) type material and removing the metal portions.
- RCC reactive coated copper
- a surface treatment can be applied to the first insulator 11 by irradiating an ion beam (S 115 ), as illustrated in FIG. 5 , and a first seed layer 22 can be formed over the inner walls of the through-holes 21 and over one side or both sides of the first insulator 11 (S 120 ).
- Performing the surface treatment on the first insulator 11 using an ion beam may provide greater adhesion between the first seed layer 22 and the first insulator 11 , to facilitate the forming of fine circuit lines.
- a vacuum deposition method such as E-beam processing, thermal evaporation, and sputtering, can also be used for forming the first seed layer 22 , in order to further increase adhesion between the first insulator 11 and the first seed layer 22 .
- composition described above for the first insulator 11 can maximize the efficiency of the surface treatment using an ion beam, so that the adhesion between the first insulator 11 and first seed layer 22 can be further improved.
- a first plating resist 23 can be formed on one side or either side of the first insulator 11 on which the first seed layer 22 is formed (S 125 ), and electroplating can be performed in correspondence with the circuit patterns 30 and vias 31 (see FIG. 7 ) that are to be formed (S 130 ), after which the first plating resist 23 can be removed (S 135 ).
- the first plating resists 23 can be selectively formed over the insulation layer on which the first seed layer 22 is formed, and then electroplating can be performed, so that the plating layers may be formed only in the portions that are not covered by the first plating resists 23 .
- the plating layers may later serve as circuit patterns 30 and as vias 31 for interconnecting layers (see FIG. 7 ).
- FIG. 7 illustrates the example in which plating is performed to completely fill the through-holes 21 , this may not always be necessary, and the plating can also be performed to only a degree sufficient to connect either side of the first insulator 11 .
- flash etching can be performed to remove portions of the first seed layer 22 (see FIG. 7 ) (S 140 ), as illustrated in FIG. 8 .
- the portions that will serve as parts of the circuit patterns 30 can be separated electrically, and as a result, a double-sided printed circuit board can be manufactured.
- build-up layers may additionally be formed on one or either side of the printed circuit board such as that illustrated in FIG. 8 .
- a second insulator 40 , 50 can be stacked on one side or either side of the first insulator 11 (S 145 ). Although this particular embodiment is described using an example in which the second insulators 40 , 50 are stacked over both sides of the first insulator 11 , it is also possible to stack the second insulator on only one side of the first insulator 11 as necessary.
- the material for the second insulators 40 , 50 can be of substantially the same composition as that of the material for the first insulator 11 .
- the description on the composition for the first insulator 11 has been presented above and thus will not be repeated.
- blind via holes 41 , 51 can be formed in the second insulators 40 , 50 (S 150 ), and surface treatment can be applied to the second insulators 40 , 50 by irradiating ion beams (S 155 ), after which second seed layers 42 , 52 can be formed over the surfaces of the second insulators 40 , 50 (S 160 ), as illustrated in FIG. 11 .
- Performing the surface treatment on the second insulators 40 , 50 using an ion beam may provide greater adhesion between the second seed layers 42 , 52 and the second insulators 40 , 50 , to facilitate the forming of fine circuit lines.
- a vacuum deposition method such as E-beam processing, thermal evaporation, and sputtering, can also be used for forming the second seed layers 42 , 52 , in order to further increase adhesion between the second insulators 40 , 50 and the second seed layers 42 , 52 .
- composition described above for the second insulators 40 , 50 can maximize the efficiency of the surface treatment using an ion beam, so that the adhesion between the second insulators 40 , 50 and second seed layers 42 , 52 may be further improved.
- second plating resists 43 , 53 can be formed over the surfaces of the second insulators 40 , 50 on which the second seed layers 42 , 52 are formed (S 165 ), and electroplating can be performed (S 170 ) so that circuit patterns and blind vias 44 , 54 (see FIG. 13 ) may be formed, after which the second plating resists 43 , 53 can be removed (S 175 ).
- FIG. 13 illustrates the example in which plating is performed to completely fill the blind via holes 41 , 51 (see FIG. 12 ), this may not always be necessary, and the plating can also be performed to only a degree sufficient to connect either side of each second insulator 40 , 50 .
- flash etching can be performed to remove portions of the second seed layers 42 , 52 (see FIG. 7 ) (S 180 ), as illustrated in FIG. 14 .
- solder resists 60 can be formed, as illustrated in FIG. 15 , and nickel/gold plating layers 70 can be formed over portions of the circuit patterns uncovered to allow connection with an external device, etc., that is, the nickel/gold plating layers 70 can be formed over the pads, in order to improve connection reliability.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
An insulating material formed by impregnating a base material with a liquid composition and curing the liquid composition, the liquid composition being 20 to 50 parts by weight of a PMDA-ODA mixture, the PMDA-ODA mixture including pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent. A printed circuit board includes an insulator formed of the above insulating material; a circuit pattern formed on one or either side of the insulator; and a via penetrating the insulator.
Description
- This application is a U.S. divisional application filed under 37 CFR 1.53(b) claiming priority benefit of U.S. Ser. No. 12/285,318 filed in the United States on Oct. 1, 2008, which claims earlier priority benefit to Korean Patent Application No. 10-2007-0139192 filed with the Korean Intellectual Property Office on Dec. 27, 2007 the disclosures of which are incorporated herein by reference.
- 1. Field
- The present invention relates to an insulating material, a printed circuit board that utilizes the insulating material, and a method of manufacturing the printed circuit board.
- 2. Description of the Related Art
- Current methods for forming circuit patterns on a printed circuit board (PCB) include subtractive methods, additive methods, semi-additive methods, and modified semi-additive methods, etc.
- HDI (high density interconnection) products mostly employ subtractive methods, while UTCSP (ultra-thin chip scale package) products and BGA (ball grid array) products mostly employ subtractive methods and modified semi-additive methods. FCBGA (flip chip BGA) products mainly use subtractive methods and semi-additive methods.
- The insulation material in each type of product can be FR-4 (Flame Retardant 4), BT (Bismaleimide-Triazine), ABF (Ajinomoto build-up film), etc.
- The materials and methods described above, however, are reaching a limit in terms of implementing fine-line circuits according to the current demands for lighter, thinner, and smaller products.
- Thus, there is a need for new insulating materials suited for forming fine-line circuits, as well as for a method of manufacturing a printed circuit board having fine-line circuits using such insulating material.
- An aspect of the invention provides an insulating material that provides improved adhesion between the insulating material and the circuit pattern, to enable the forming of fine-line circuit patterns, and also provides a printed circuit board that utilizes the insulating material and a method of manufacturing the printed circuit board.
- Another aspect of the invention provides an insulating material formed by impregnating a base material with a liquid composition and curing the liquid composition. Here, the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- The triazine derivative can be bismaleimide triazine, and the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- The base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric. When the liquid composition is impregnated into the base material and cured, the curing of the liquid composition can be performed at a temperature of 180 to 250° C.
- Yet another aspect of the invention provides a printed circuit board that includes an insulator, a circuit pattern formed on one or either side of the insulator, and a via penetrating the insulator. The insulator can be formed by impregnating a base material with a liquid composition and curing the liquid composition, where the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- The triazine derivative can be bismaleimide triazine, and the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- The base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric. When the liquid composition is impregnated into the base material and cured, the curing of the liquid composition can be performed at a temperature of 180 to 250° C.
- Still another aspect of the invention provides a method of manufacturing a printed circuit board, which includes a circuit pattern and at least one via. The method includes perforating at least one through-hole corresponding with the at least one , which is in correspondence with the via, in a first insulator; applying a surface treatment on the first insulator by irradiating an ion beam; forming a first seed layer over an inner wall of the through-hole and over one or either side of the first insulator; forming a first plating resist over one or either side of the first insulator on which the first seed layer is formed; performing electroplating in correspondence with the circuit pattern and the via; removing the first plating resist; and removing a portion of the first seed layer by flash etching.
- Here, the insulator can be formed by impregnating a base material with a liquid composition and curing the liquid composition, where the liquid composition can include 20 to 50 parts by weight of a PMDA-ODA mixture, which can include pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40; 50 to 80 parts by weight of a triazine derivative; and 300 to 600 parts by weight of an organic solvent.
- The triazine derivative can be bismaleimide triazine, and the organic solvent can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof.
- The base material can be a material selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
- Applying the surface treatment can be performed using a gas containing one of argon (Ar), oxygen (O2), and nitrogen (N2), or a mixture thereof. Forming the seed layer can be performed by vacuum deposition.
- The method may further include, after removing the portion of the first seed layer, stacking a second insulator over one or either side of the first insulator, forming at least one blind via hole in the second insulator, applying a surface treatment on the second insulator by irradiating an ion beam, forming a second seed layer over an inner wall of the blind via hole and over one or either side of the second insulator, forming a second plating resist over one or either side of the second insulator on which the second seed layer is formed, performing electroplating, removing the second plating resist, and removing a portion of the second seed layer by flash etching.
- Additional aspects and advantages of the present invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
-
FIG. 1 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the invention. -
FIG. 2 ,FIG. 3 ,FIG. 4 ,FIG. 5 ,FIG. 6 ,FIG. 7 ,FIG. 8 ,FIG. 9 ,FIG. 10 ,FIG. 11 ,FIG. 12 ,FIG. 13 ,FIG. 14 , andFIG. 15 are cross sectional views each representing a process for a method of manufacturing a printed circuit board according to an embodiment of the invention. - As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the present invention to particular modes of practice, and it is to be appreciated that all changes, equivalents, and substitutes that do not depart from the spirit and technical scope of the present invention are encompassed in the present invention. In the description of the present invention, certain detailed explanations of related art are omitted when it is deemed that they may unnecessarily obscure the essence of the invention.
- The terms used in the present specification are merely used to describe particular embodiments, and are not intended to limit the present invention. An expression used in the singular encompasses the expression of the plural, unless it has a clearly different meaning in the context. In the present specification, it is to be understood that the terms such as “including” or “having,” etc., are intended to indicate the existence of the features, numbers, steps, actions, elements, parts, or combinations thereof disclosed in the specification, and are not intended to preclude the possibility that one or more other features, numbers, steps, actions, elements, parts, or combinations thereof may exist or may be added.
- Certain embodiments of the invention will be described below in more detail with reference to the accompanying drawings. Those components that are the same or are in correspondence are rendered the same reference numeral regardless of the figure number, and redundant explanations are omitted.
- First, a description will be provided on an insulating material based on an embodiment of the invention that can be used in a printed circuit board.
- The insulating material based on an embodiment of the invention may be formed by impregnating a base material with a liquid composition, which can include 20 to 50 parts by weight of a PMDA-ODA mixture that includes pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40, 50 to 80 parts by weight of a triazine derivative, and 300 to 600 parts by weight of an organic solvent, which can be one of dimethylformamide (DMF) and dimethylacetamide (DMAC) or a mixture thereof, and then curing the liquid composition.
- When the pyromellitic dianhydride, oxydianiline, and triazine derivative react in an organic solvent, a triazine-modified flame-retardant resin may be obtained. The insulating material obtained by impregnating a base material with this resin and curing the resin can be used advantageously in a printed circuit board to implement circuits with finer lines.
- The content of the pyromellitic dianhydride (PMDA) and oxydianiline (ODA) used in the liquid composition can be of a weight ratio between 40:60 and 60:40. In certain embodiments, a weight ratio between 45:55 and 55:45 can be used, and in certain embodiments, a weight ratio of about 50:50. A ratio outside the above range may lead to an excess of monomers that do not undergo polymerization, and may thus provide less desirable properties.
- After preparing the liquid composition with 20 to 50 parts by weight of this PMDA-ODA mixture, 50 to 80 parts by weight of the triazine derivative, and 300 to 600 parts by weight of the organic solvent, which can be dimethylformamide (DMF) or dimethylacetamide (DMAC) or a mixture of the two, an insulating material can be fabricated by impregnating the base material with the liquid composition and curing the liquid composition.
- Here, bismaleimide triazine can be used for the triazine derivative, and dimethylformamide (DMF) or dimethylacetamide (DMAC) or a mixture of the two can be used for the organic solvent. However, the invention is not thus limited.
- The content of each component may advantageously be adjusted in consideration of differences in adhesion and contraction stability in the triazine derivative. If the content of the PMDA-ODA mixture is less than 20 parts by weight, there may be less dispersion at the surfaces of the substrate, leading to less effective surface treatment. On the other hand, if the content exceeds 50 parts by weight, the water absorption of bismaleimide triazine can be 1.0% or higher, which can lead to lower dimensional stability. If the content of the triazine derivative is lower than 50 parts by weight, there will be fewer COOH groups and hence fewer hydrophilic groups, which can cause problems in adhesion. Conversely, if the content of the triazine derivative exceeds 80 parts by weight, there may not be adequate dispersion with the PMDA-ODA mixture, leading to lower adhesion and less effective surface treatment. The organic solvent can be maintained within the range described above, in order to keep the composition in a liquid phase and in a suitable viscosity for impregnating the base material.
- Curing agents and curing accelerators can be added to the liquid composition as necessary.
- The fabricating of the insulating material according to an aspect of the invention is not limited to a particular method, and any of various methods can be used that combines the liquid composition described above with a base material to produce an insulating material. In one example, the base material can be impregnated with the liquid composition, so that the liquid composition may permeate through the base material. The resulting fabric can be subject to a curing operation, for example, at a temperature of about 180 to 250° C., and can be completely cured to fabricate an A-stage insulator.
- Here, the base material can be a material such as fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric, but is not thus limited. It can be advantageous to employ fiberglass fabric for the base material in terms of dimensional stability, and a thickness between 30 and 100 μm can be desirable for implementing fine-line circuits.
- The insulator thus formed can be stacked, for example in two or more layers, after which heat and pressure can be applied to the arrangement, to obtain an unclad prepreg that may be used in the manufacture of a printed circuit board, for example. A metal foil can be arranged on one or either side of a prepreg obtained by stacking the insulators, after which heat and pressure can be applied to the arrangement, to obtain a metal clad laminate that may be used in the manufacture of a printed circuit board. Here, the metal foil may generally be a layer of copper or of aluminum, and may generally have a thickness of about 5 to 200 μm.
- 150 g of a PMDA-ODA mixture that includes pyromellitic dianhydride and oxydianiline in a 1:1 weight ratio, and 250 g of bismaleimide triazine were added to 750 g of dimethylformamide to prepare a liquid composition. The liquid composition was impregnated into a roll type fiberglass fabric (thickness: 10 to 20 μm) and completely cured at 200° C. to fabricate an insulator for use in a printed circuit board.
- The completely cured insulator can be cut according to the specifications for a substrate. Then, after stacking several layers of the insulator, copper foils were overlaid over both sides of the stack, and the arrangement was pressed for 120 minutes at 200° C. and 15 kg/cm2, to fabricate a copper clad laminate.
- The insulating material described above can be utilized in the manufacture of a printed circuit board. That is, a circuit pattern can be formed on one side or either side of an insulator, as well as vias for interlayer connection. Of course, it is also possible to stack several of these insulators and form a circuit pattern and vias, etc., on or in each of the layers, to manufacture a multi-layer printed circuit board.
- A description will now be provided in more detail on a method of manufacturing a printed circuit board using the insulating material described above.
-
FIG. 1 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the invention, andFIG. 2 throughFIG. 15 are cross sectional views each representing a process for a method of manufacturing a printed circuit board according to an embodiment of the invention. InFIGS. 2 to 15 , there are illustrated a copper cladlaminate 10, afirst insulator 11, copper foils 12, through-holes 21, afirst seed layer 22, first plating resists 23,circuit patterns 30, vias 31, 40, 50, second seed layers 42, 52, second plating resists 43, 53, blind viasecond insulators 41, 51, blind vias 45, 55, solder resists 60, and plating layers 70.holes - First, through-
holes 21 may be formed in afirst insulator 11 that correspond to vias (S110). This can be achieved using a method of preparing an unclad material that does not have metal foils formed thereon, as illustrated inFIG. 3 , and then perforating the through-holes 21, as illustrated inFIG. 4 . It is also possible to prepare a copper clad laminate (CCL) 10 that includes copper foils 12 formed on both sides of thefirst insulator 11 and generally etch the copper foils 12, to obtain thefirst insulator 11 as illustrated inFIG. 3 . Of course, other methods may also be used, such as preparing an RCC (resin coated copper) type material and removing the metal portions. - Next, a surface treatment can be applied to the
first insulator 11 by irradiating an ion beam (S115), as illustrated inFIG. 5 , and afirst seed layer 22 can be formed over the inner walls of the through-holes 21 and over one side or both sides of the first insulator 11 (S120). Performing the surface treatment on thefirst insulator 11 using an ion beam may provide greater adhesion between thefirst seed layer 22 and thefirst insulator 11, to facilitate the forming of fine circuit lines. - Together with performing the surface treatment over the
first insulator 11, a vacuum deposition method, such as E-beam processing, thermal evaporation, and sputtering, can also be used for forming thefirst seed layer 22, in order to further increase adhesion between thefirst insulator 11 and thefirst seed layer 22. - Using the composition described above for the
first insulator 11 can maximize the efficiency of the surface treatment using an ion beam, so that the adhesion between thefirst insulator 11 andfirst seed layer 22 can be further improved. - Next, as illustrated in
FIG. 6 , a first plating resist 23 can be formed on one side or either side of thefirst insulator 11 on which thefirst seed layer 22 is formed (S125), and electroplating can be performed in correspondence with thecircuit patterns 30 and vias 31 (seeFIG. 7 ) that are to be formed (S130), after which the first plating resist 23 can be removed (S135). - As illustrated in
FIG. 6 , the first plating resists 23 can be selectively formed over the insulation layer on which thefirst seed layer 22 is formed, and then electroplating can be performed, so that the plating layers may be formed only in the portions that are not covered by the first plating resists 23. The plating layers may later serve ascircuit patterns 30 and asvias 31 for interconnecting layers (seeFIG. 7 ). - Although
FIG. 7 illustrates the example in which plating is performed to completely fill the through-holes 21, this may not always be necessary, and the plating can also be performed to only a degree sufficient to connect either side of thefirst insulator 11. - After thus performing the plating, flash etching can be performed to remove portions of the first seed layer 22 (see
FIG. 7 ) (S140), as illustrated inFIG. 8 . By performing flash etching, the portions that will serve as parts of thecircuit patterns 30 can be separated electrically, and as a result, a double-sided printed circuit board can be manufactured. - In cases where a multi-layer printed circuit board is to be manufactured, build-up layers may additionally be formed on one or either side of the printed circuit board such as that illustrated in
FIG. 8 . A more detailed description will now be provided. - First, as illustrated in
FIG. 9 , a 40, 50 can be stacked on one side or either side of the first insulator 11 (S145). Although this particular embodiment is described using an example in which thesecond insulator 40, 50 are stacked over both sides of thesecond insulators first insulator 11, it is also possible to stack the second insulator on only one side of thefirst insulator 11 as necessary. - Here, the material for the
40, 50 can be of substantially the same composition as that of the material for thesecond insulators first insulator 11. The description on the composition for thefirst insulator 11 has been presented above and thus will not be repeated. - Next, as illustrated in
FIG. 10 , blind via 41, 51 can be formed in theholes second insulators 40, 50 (S150), and surface treatment can be applied to the 40, 50 by irradiating ion beams (S155), after which second seed layers 42, 52 can be formed over the surfaces of thesecond insulators second insulators 40, 50 (S160), as illustrated inFIG. 11 . Performing the surface treatment on the 40, 50 using an ion beam may provide greater adhesion between the second seed layers 42, 52 and thesecond insulators 40, 50, to facilitate the forming of fine circuit lines.second insulators - Together with performing the surface treatment over the
40, 50, a vacuum deposition method, such as E-beam processing, thermal evaporation, and sputtering, can also be used for forming the second seed layers 42, 52, in order to further increase adhesion between thesecond insulators 40, 50 and the second seed layers 42, 52.second insulators - Using the composition described above for the
40, 50 can maximize the efficiency of the surface treatment using an ion beam, so that the adhesion between thesecond insulators 40, 50 and second seed layers 42, 52 may be further improved.second insulators - Next, as illustrated in
FIG. 12 , second plating resists 43, 53 can be formed over the surfaces of the 40, 50 on which the second seed layers 42, 52 are formed (S165), and electroplating can be performed (S170) so that circuit patterns andsecond insulators blind vias 44, 54 (seeFIG. 13 ) may be formed, after which the second plating resists 43, 53 can be removed (S175). - Although
FIG. 13 illustrates the example in which plating is performed to completely fill the blind viaholes 41, 51 (seeFIG. 12 ), this may not always be necessary, and the plating can also be performed to only a degree sufficient to connect either side of each 40, 50.second insulator - After thus performing the plating, flash etching can be performed to remove portions of the second seed layers 42, 52 (see
FIG. 7 ) (S180), as illustrated inFIG. 14 . - Afterwards, solder resists 60 can be formed, as illustrated in
FIG. 15 , and nickel/gold plating layers 70 can be formed over portions of the circuit patterns uncovered to allow connection with an external device, etc., that is, the nickel/gold plating layers 70 can be formed over the pads, in order to improve connection reliability. - While the spirit of the invention has been described in detail with reference to particular embodiments, the embodiments are for illustrative purposes only and do not limit the invention. It is to be appreciated that those skilled in the art can change or modify the embodiments without departing from the scope and spirit of the invention. As such, many embodiments other than those set forth above can be found in the appended claims.
Claims (10)
1. An insulating material formed by impregnating a base material with a liquid composition and curing the liquid composition, the liquid composition comprising:
20 to 50 parts by weight of a PMDA-ODA mixture, the PMDA-ODA mixture including pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40;
50 to 80 parts by weight of a triazine derivative; and
300 to 600 parts by weight of an organic solvent.
2. The insulating material of claim 1 , wherein the triazine derivative is bismaleimide triazine.
3. The insulating material of claim 1 , wherein the organic solvent is selected from a group consisting of dimethylformamide (DMF), dimethylacetamide (DMAC), and mixtures thereof.
4. The insulating material of claim 1 , wherein the base material is selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
5. The insulating material of claim 1 , wherein the curing of the liquid composition is performed at a temperature of 180 to 250° C.
6. A printed circuit board comprising:
an insulator;
a circuit pattern formed on one or either side of the insulator; and
a via penetrating the insulator,
wherein the insulator is formed by impregnating a base material with a liquid composition and curing the liquid composition, the liquid composition comprising:
20 to 50 parts by weight of a PMDA-ODA mixture, the PMDA-ODA mixture including pyromellitic dianhydride (PMDA) and oxydianiline (ODA) mixed in a weight ratio of 40:60 to 60:40;
50 to 80 parts by weight of a triazine derivative; and
300 to 600 parts by weight of an organic solvent.
7. The printed circuit board of claim 6 , wherein the triazine derivative is bismaleimide triazine.
8. The printed circuit board of claim 6 , wherein the organic solvent is selected from a group consisting of dimethylformamide (DMF), dimethylacetamide (DMAC), and mixtures thereof.
9. The printed circuit board of claim 6 , wherein the base material is selected from a group consisting of fiberglass fabric, fiberglass non-woven fabric, polyamide fabric, polyamide non-woven fabric, polyester fabric, and polyester non-woven fabric.
10. The printed circuit board of claim 6 , wherein the curing of the liquid composition is performed at a temperature of 180 to 250° C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/137,935 US8209862B2 (en) | 2007-12-27 | 2011-09-21 | Insulating material and printed circuit board having the same |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070139192A KR100925757B1 (en) | 2007-12-27 | 2007-12-27 | Insulator for printed circuit board, printed circuit board having same and manufacturing method thereof |
| KR10-2007-0139192 | 2007-12-27 | ||
| US12/285,318 US8141244B2 (en) | 2007-12-27 | 2008-10-01 | Insulating material and printed circuit board having the same |
| US13/137,935 US8209862B2 (en) | 2007-12-27 | 2011-09-21 | Insulating material and printed circuit board having the same |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/285,318 Division US8141244B2 (en) | 2007-12-27 | 2008-10-01 | Insulating material and printed circuit board having the same |
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| Publication Number | Publication Date |
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| US20120012375A1 true US20120012375A1 (en) | 2012-01-19 |
| US8209862B2 US8209862B2 (en) | 2012-07-03 |
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| US12/285,318 Expired - Fee Related US8141244B2 (en) | 2007-12-27 | 2008-10-01 | Insulating material and printed circuit board having the same |
| US13/137,935 Expired - Fee Related US8209862B2 (en) | 2007-12-27 | 2011-09-21 | Insulating material and printed circuit board having the same |
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| US12/285,318 Expired - Fee Related US8141244B2 (en) | 2007-12-27 | 2008-10-01 | Insulating material and printed circuit board having the same |
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| KR (1) | KR100925757B1 (en) |
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| WO2015195186A1 (en) * | 2014-06-18 | 2015-12-23 | Massachusetts Institute Of Technology | Printed circuit board assembly with foam dielectric material |
| US20160348493A1 (en) * | 2015-05-29 | 2016-12-01 | Baker Hughes Incorporated | Downhole test signals for identification of operational drilling parameters |
| US10375838B2 (en) | 2013-07-15 | 2019-08-06 | Massachusetts Institute Of Technology | Sleeved coaxial printed circuit board vias |
| US10950929B2 (en) | 2016-07-14 | 2021-03-16 | Massachusetts Institute Of Technology | Foam radiator |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100925757B1 (en) * | 2007-12-27 | 2009-11-11 | 삼성전기주식회사 | Insulator for printed circuit board, printed circuit board having same and manufacturing method thereof |
| KR101045561B1 (en) * | 2009-08-03 | 2011-06-30 | 주식회사 일렉켐 | Substrate for ball grid array semiconductor package and manufacturing method thereof |
| KR101066795B1 (en) * | 2010-01-21 | 2011-09-22 | (주)코레쉬텍 | Manufacturing Method of Polyester Insulation Sheet |
| KR101055261B1 (en) * | 2010-02-24 | 2011-08-09 | (주)코레쉬텍 | Manufacturing method of polyester insulation sheet using flame retardant yarn |
| KR101045565B1 (en) * | 2011-04-08 | 2011-06-30 | 주식회사 일렉켐 | Plates for ball grid array semiconductor package, and its manufacturing process |
| US20130118794A1 (en) * | 2011-11-15 | 2013-05-16 | Bo-Yu Tseng | Package Substrate Structure |
| KR101397950B1 (en) * | 2012-09-07 | 2014-05-27 | 피코맥스(주) | Composition for fpcb coverlay and method for producing the same |
| KR101939822B1 (en) | 2016-12-19 | 2019-01-18 | 경희대학교 산학협력단 | Method of producing a nerve electrode |
| EP4124182A4 (en) * | 2020-12-16 | 2023-09-06 | Shennan Circuits Co., Ltd. | Circuit board and preparation method therefor |
| KR20250058346A (en) * | 2023-10-23 | 2025-04-30 | 엘지이노텍 주식회사 | Circuit board and package substrate having the same |
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| JP3932506B2 (en) * | 2002-01-10 | 2007-06-20 | 東レ・デュポン株式会社 | Polyimide film, printed circuit and metal wiring board |
| KR100797692B1 (en) * | 2006-06-20 | 2008-01-23 | 삼성전기주식회사 | Printed Circuit Board and Manufacturing Method |
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| US8034460B2 (en) * | 2005-07-27 | 2011-10-11 | Lg Chem, Ltd. | Metallic laminate and method of manufacturing the same |
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| US20090166076A1 (en) * | 2007-12-27 | 2009-07-02 | Samsung Electro-Mechanics Co., Ltd. | Insulating material and printed circuit board having the same |
Cited By (5)
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| US10375838B2 (en) | 2013-07-15 | 2019-08-06 | Massachusetts Institute Of Technology | Sleeved coaxial printed circuit board vias |
| WO2015195186A1 (en) * | 2014-06-18 | 2015-12-23 | Massachusetts Institute Of Technology | Printed circuit board assembly with foam dielectric material |
| US10249943B2 (en) | 2014-06-18 | 2019-04-02 | Massachusetts Institute Of Technology | Printed circuit board assembly with foam dielectric material |
| US20160348493A1 (en) * | 2015-05-29 | 2016-12-01 | Baker Hughes Incorporated | Downhole test signals for identification of operational drilling parameters |
| US10950929B2 (en) | 2016-07-14 | 2021-03-16 | Massachusetts Institute Of Technology | Foam radiator |
Also Published As
| Publication number | Publication date |
|---|---|
| US8141244B2 (en) | 2012-03-27 |
| US8209862B2 (en) | 2012-07-03 |
| KR100925757B1 (en) | 2009-11-11 |
| KR20090071008A (en) | 2009-07-01 |
| US20090166076A1 (en) | 2009-07-02 |
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