US20110176641A1 - D.C. Offset Estimation - Google Patents
D.C. Offset Estimation Download PDFInfo
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- US20110176641A1 US20110176641A1 US12/690,549 US69054910A US2011176641A1 US 20110176641 A1 US20110176641 A1 US 20110176641A1 US 69054910 A US69054910 A US 69054910A US 2011176641 A1 US2011176641 A1 US 2011176641A1
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- 238000005259 measurement Methods 0.000 claims abstract description 82
- 230000010363 phase shift Effects 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims description 19
- PTCVSZDUULXASE-UHFFFAOYSA-N 8-hydroxy-5-methyl-2,3-dihydro-[1,3]thiazolo[3,2-a]pyridin-4-ium-3-carboxylate Chemical compound CC1=CC=C([O-])C2=[N+]1C(C(O)=O)CS2 PTCVSZDUULXASE-UHFFFAOYSA-N 0.000 description 24
- 238000004891 communication Methods 0.000 description 14
- 201000001718 Roberts syndrome Diseases 0.000 description 7
- 208000012474 Roberts-SC phocomelia syndrome Diseases 0.000 description 7
- 238000012937 correction Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 230000015654 memory Effects 0.000 description 4
- 238000005001 rutherford backscattering spectroscopy Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/30—Circuits for homodyne or synchrodyne receivers
- H04B1/302—Circuits for homodyne or synchrodyne receivers for single sideband receivers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
- H04L27/362—Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated
- H04L27/364—Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0014—Carrier regulation
- H04L2027/0016—Stabilisation of local oscillators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
Definitions
- This invention relates to electronic communication systems and more particularly to signal offset compensation in such systems.
- Quadrature modulation schemes which use in-phase (I) and quadrature (Q) signal components, and do not have constant envelopes.
- Examples of such communication systems are cellular radio telephone systems that use wideband code division multiple access (WCDMA), orthogonal frequency division multiple access (OFDMA), and their variants.
- WCDMA wideband code division multiple access
- OFDMA orthogonal frequency division multiple access
- part of the communicated information is encoded in the amplitude (envelope) of the transmitted signal and part is encoded in the phase of the transmitted signal.
- the power amplifier (PA) and various other components of the radio transmitter have to be linear, which is to say for example that the functional relationship between the output power of the PA and the input power of the PA is a straight line for all possible power levels.
- the phase shift of the input signal for example through the PA has to be constant for all possible power levels.
- Amplitude/phase distortion (vector distortion) in the transmitter can also increase the bit error rate (BER) of the communication system, e.g., degrading the audio quality of a voice call or reducing the speed of an internet connection.
- BER bit error rate
- the likelihood of proper performance can be increased by including in the transmitter a measurement receiver (MRX) that samples the transmitted signal and generates a compensation signal is fed back to the modulator, PA, and/or other transmitter components to correct the transmitter output signal.
- MRX measurement receiver
- FIG. 1 shows an antenna 102 , a coupler 104 , an amplifier 106 , a quadrature modulator 108 , and an MRX 110 .
- the amplifier 106 and modulator 108 can be considered the “transmit path” of the arrangement 100 , which it will be understood typically includes oscillators and other components not shown.
- the MRX 110 samples the transmitted signal generated by the transmit path through the operation of the coupler 104 and provides a compensation signal to the modulator 108 .
- the MRX 110 can be used for several purposes, one of which is measurement, or more generally estimation, of the direct-current (d.c.) offset between I and Q components in the amplifier 106 and quadrature modulator 108 .
- the I/O d.c. offset of the MRX itself typically must be negligible (ideally, it should be zero) or at least well known. Otherwise, the I/O d.c. offset of the transmit path will generally not be correctly estimated.
- European Patent Application Publication No. EP 1 835 626 A1 by Ishikawa et al. describes a d.c. offset correction value estimating unit that estimates a d.c. offset correction value based on a transmit signal that is produced by a quadrature modulator.
- a signal level detecting unit detects the signal level of an input signal
- a weight factor calculating unit computes a weight factor for the d.c. offset correction value in accordance with the signal level
- a weighting unit assigns a weight to the d.c. offset correction value in accordance with the weight factor.
- a d.c. offset in the transmit signal is compensated by using the thus weighted d.c. offset correction value.
- U.S. Patent Application Publication No. US 2007/0092023 by Kang et al. describes a method for self-calibrating mismatch and d.c. offset in a mobile transceiver.
- the transceiver's transmitter is used as a signal generator and the transceiver's receiver is used to measure a response characteristic.
- a baseband processor calibrates the mismatch and the d.c. offset for the receiving and transmitting sides using a test signal received from the transmitter.
- U.S. Pat. No. 7,266,359 to Chen et al. describes a method for removing d.c. interference from a signal received by a communication receiver that removes d.c. offsets induced by the receiver and the transmitter.
- the method includes removing an estimated d.c. offset from a received signal, correcting a frequency shift in the received signal, estimating a second d.c. offset signal induced by the transmitter, and removing the
- the receiver d.c. offset is estimated and removed before performing a timing carrier offset correction using Barker code manipulation to remove receiver d.c. offset and to sum all Barker chips after effectively multiplying Barker codes to correlate to a Barker sequence unaffected by the receiver d.c. offset signal.
- U.S. Patent Application Publication No. US 2008/0063113 by Gao et al. describes a method of correcting d.c. offset errors in a transmitter having an OFDMA-based quadrature modulator.
- a compensator before the modulator compensates the d.c. offset and is updated with estimated d.c. offset values obtained by performing a discrete Fourier transform in the digital baseband domain while sending a pair of orthogonal test tones to the modulator's inputs.
- U.S. Patent Application Publication No. US 2009/0041161 by Jian et al. describes a d.c. offset estimation in an OFDMA system that includes a carrier frequency offset estimator receiving an input signal and estimating a carrier frequency offset value, a symbol timing recovery unit providing a symbol boundary of the input signal, and a d.c. offset estimator estimating a d.c. offset value based on the input signal, the carrier frequency offset value, and the symbol boundary.
- This invention enables the I/O d.c. offset in the transmit path to be estimated without prior knowledge of the I/O d.c. offset of the MRX itself. Moreover, this invention enables both the I/O d.c. offset of the transmit path and the I/O d.c. offset of the MRX to be estimated.
- an apparatus for estimating a d.c. offset in a transmitter having a transmit path for quadrature modulating a carrier with input I and Q component signals and generating a transmit signal includes a measurement receiver, a phase shifter, and an offset estimator.
- the measurement receiver is configured to quadrature demodulate a portion of the transmit signal to generate an I component measurement signal and a Q component measurement signal.
- the phase shifter is configured to generate a first pair of oscillator signals having a relative phase shift of substantially 90 degrees for quadrature demodulation in the measurement receiver and for quadrature modulation in the transmit path.
- the phase shifter is also configured to selectively generate a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a phase shift of 180 degrees with respect to the first pair of oscillator signals for quadrature demodulation in the measurement receiver.
- the offset estimator is configured to compute at least one of a d.c. offset of the transmit path and a d.c. offset of the measurement receiver based on the input I and Q component signals and on measurement I and Q component signals generated with the first and second pairs of oscillator signals.
- a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees includes generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals; generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
- a computer-readable medium having stored instructions that, when executed by a computer, cause the computer to perform a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees.
- the method includes generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals; generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
- FIG. 1 is a block diagram of transmitter with a measurement receiver
- FIG. 2 is a block diagram of a portion of an improved transmitter with a measurement receiver
- FIG. 3 is a flow chart of method of d.c. offset estimation
- FIG. 4 depicts a communication network
- FIG. 5 is a block diagram of a user equipment for the communication network.
- This invention is applicable to any type of communication system and can be applied in any part of the system, e.g., uplink (UL) or downlink (DL), where d.c.-offset estimation is of interest.
- UL uplink
- DL downlink
- the digital part 206 of the transmit path includes a digital transmit signal waveform generator (WFG) 216 that produces an in-phase transmit signal i tx and a quadrature transmit signal q tx , which are converted to analog form by respective digital-to-analog converters (DACs).
- WFG digital transmit signal waveform generator
- DACs digital-to-analog converters
- the analog part 204 of the transmit path uses the analog transmit signal components produced by the DACs to quadrature-modulate a carrier signal generated by the VCO 208 or equivalent local oscillator (LO) in the usual way with two mixers fed respectively by an unshifted and 90-degree shifted LO signal.
- the phase shifter 210 implements the 0-degree and 90-degree phase shifts of the LO signal needed for the quadrature modulation in the transmit path, and for quadrature demodulation in the MRX 212 as described below.
- the modulated carrier is suitably amplified, for example by a power amplifier PA and variable-gain amplifier VGA in the analog part 204 , and the complex transmitter output signal is passed to an antenna or other port (not shown) through the coupler 202 .
- the waveform generator 216 also provides an in-phase reference signal i ref and a quadrature reference signal q ref to the estimator 214 .
- the reference signals i ref and ref are simply the transmit signals i tx and q tx , respectively, and are used by the estimator 214 as described in more detail below.
- the generator 216 generates signals that are compliant with the applicable modulation type and system standards in terms of data rate, pulse shaping filter, data (IQ) constellation, etc.
- the generator 216 can be implemented in a substantially conventional way, although a relevant aspect of the generator 216 is the time alignment between the signal that is sent (i tx and q tx ) and the signal that is measured (i ref and q ref ).
- the generator 216 can include or implement a suitable variable delay element, or such a delay element can be provided elsewhere in the transmitter 200 , to adjust the reference signals with respect to the transmit signal.
- the phase shifter 210 In addition to nominal 0-degree and nominal 90-degree phase shifts used for the quadrature modulator in the analog part 204 and for the quadrature demodulator in the MRX 212 , the phase shifter 210 also generates nominal 180-degree and nominal 270-degree phase shifts of the LO signal for the quadrature demodulator in the MRX 212 .
- the MRX 212 performs a first measurement with the “normal” phase shift, i.e., 0 degrees and 90 degrees for the I and Q components, respectively, in the MRX quadrature demodulator, and a second measurement with a “special” phase-shift, i.e., 180 degrees and 270 degrees for the I and Q components, respectively.
- phase shifter 210 generates the shifts in successive pairs for particular time intervals, but it will be noted that the phase shifter 210 can be configured to provide four continuous outputs to the MRX 212 , which could then have two parallel demodulators, each comprising two mixers, generating four continuous measurement signal components. Although such an arrangement has some advantages, it requires extra physical space, more power, and careful matching of the pairs of mixers.
- the MRX 212 is desirable in order to save power, which can be important in a battery-powered transmitter. It is currently expected that the MRX would be used for periods of 25-50 microseconds, with an approximately 50% duty cycle of the 0/180 and 90/270 phase shifts, which of course are synchronized to the transmit path because the transmit and MRX measurement signals have to be time-aligned as noted above. It is also currently expected that the noisiness of the MRX measurement signals should be reduced by suitable smoothing, for example by low-pass filters, resettable integrators, or simply averaging. It will be noted that the equations given below are in terms of discrete signal samples, and do not include such smoothing, which can be implemented in many suitable ways, for example by software programming in the offset estimator 214 .
- the offset result can be combined with the analog transmit signals in the analog part 204 by suitable adders included before the mixers of the quadrature modulator.
- An offset result generated by the estimator 214 can also or instead be fed back to the MRX 212 as depicted in FIG. 2 through suitable adders included after the mixers in the quadrature demodulator.
- the offset result generated by the estimator 214 can be provided to other components (not shown) in the transmitter 200 , for example, for inclusion in a report message.
- FIG. 3 is a flow chart of a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees, e.g., 0-degree and 90-degree signals coming from the phase shifter 210 .
- a first pair of measurement I component and Q component measurement signals such as i meas and q meas described above, is generated by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals.
- step 304 a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees, e.g., 180-degree and 270-degree signals from the phase shifter 210 .
- the d.c. offset is computed based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
- the complex transmitter output signal including d.c. offset of the transmit path can be written as follows:
- z TX is the transmitter output signal
- i ref is an I channel reference
- q ref is a Q channel reference
- z DC,TX is the d.c. offset of the transmit path, which can be separated as shown into d.c. offsets of the I and Q components of the transmit path, i DC,TX and q DC,TX , respectively.
- the complex output signal including d.c. offset of the MRX 212 can be written as follows:
- z MRX is the MRX output signal
- i meas is the I channel signal measured by the MRX 212
- q meas is the Q channel signal measured by the MRX 212 .
- the combined d.c. offset z DC,tot of the transmit path and the MRX 212 can be written as follows:
- z DC,MRX is the d.c. offset of the MRX 212 and the other parameters are as defined above.
- the 1-channel and Q-channel measurement signals generated by the MRX 212 can be written as follows:
- i meas i ref +i DC,MRX +i DC,TX Eq. 4
- the I-channel and Q-channel measurement signals generated by the MRX 212 can be written as follows:
- î meas ⁇ i ref +i DC,MRX ⁇ i DC,TX Eq. 6
- the offset estimator 214 can compute the individual d.c. offsets of the transmit path and the MRX 212 using Eqs. 8B, 9B, 10B, and 11B.
- the estimator 214 and various other functional blocks of the transmitter 200 can be implemented by one or more suitably programmed electronic processors, collections of logic gates, etc. that process information stored in one or more memories.
- the stored information may include program instructions and data that enable the estimator 214 to implement the equations described above.
- FIG. 4 is a diagram of an exemplary communication network 400 , which may be, for example, a WCDMA communication system.
- Radio network controllers (RNCs) 402 a , 402 b control various radio network functions, including for example radio access bearer setup, diversity handover, etc. More generally, each RNC directs user calls via the appropriate RBSs, which communicate with user equipments (UEs) 300 a , 300 b through downlink (i.e., base-to-mobile, or forward) and uplink (i.e., mobile-to-base, or reverse) channels.
- UEs user equipments
- RNC 402 a is shown coupled to RBSs 404 a , 404 b , 404 c
- RNC 402 b is shown coupled to RBSs 404 d , 404 e , 404 f .
- Each RBS which can also be called a NodeB, serves a geographical area that can be divided into one or more cell(s).
- RBS 404 f is shown as having five antenna sectors S 1 -S 5 , all or some of which can be said to make up the cell of the RBS 404 f .
- the RBSs are coupled to their corresponding RNCs by dedicated telephone lines, optical fiber links, microwave links, etc.
- Both RNCs 402 a , 402 b are typically connected with external networks such as the public switched telephone network (PSTN), the Internet, etc. through one or more core network nodes, such as a mobile switching center and/or a packet radio service node (not shown).
- PSTN public switched telephone network
- core network nodes such as a mobile switching center and/or a packet radio service node (not shown).
- FIG. 5 depicts a communication device 500 , such as a mobile telephone, remote terminal, or equivalent device, that can communicate through a wireless link with a base station in a communication network.
- the device 500 can be a UE 300 in the network 400 .
- the UE 500 includes one or more programmable processors 502 or suitable logic that processes information stored in one or more memories 504 , 506 .
- the stored information may include, among other things, program instructions for computing the d.c. offsets as described above.
- the processor 502 typically includes timers, etc. that facilitate its operations.
- Transceiver (TRX) circuitry 508 provides for the reception and transmission of control and traffic signals on the link between the UE 500 and the base station, which can include similar transceiver circuitry.
- the TRX 508 includes the transmitter portion 200 described above that operates under the control of the processor 502 .
- the invention described here can additionally be considered to be embodied entirely within any form of computer-readable storage medium having stored therein an appropriate set of instructions for use by or in connection with an instruction-execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch instructions from a medium and execute the instructions.
- a “computer-readable medium” can be any means that can contain, store, or transport the program for use by or in connection with the instruction-execution system, apparatus, or device.
- the computer-readable medium can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device.
- the computer-readable medium include an electrical connection having one or more wires, a portable computer diskette, a RAM, a ROM, an erasable programmable read-only memory (EPROM or Flash memory), and an optical fiber.
- any such form may be referred to as “logic configured to” perform a described action, or alternatively as “logic that” performs a described action.
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Abstract
A combination of a phase shifter, a measurement receiver, and an offset estimator enable the d.c. offset in the transmit path of a quadrature transmitter to be distinguished from the d.c. offset in the measurement receiver. The measurement receiver performs a first measurement on the transmit path output with a “normal” phase shift of 0 degrees and 90 degrees for in-phase (I) and quadrature (Q) components, and a second measurement with a “special” phase-shift of 180 degrees and 270 degrees for the I and Q components, respectively
Description
- This invention relates to electronic communication systems and more particularly to signal offset compensation in such systems.
- Many current electronic communication systems use quadrature modulation schemes, which use in-phase (I) and quadrature (Q) signal components, and do not have constant envelopes. Examples of such communication systems are cellular radio telephone systems that use wideband code division multiple access (WCDMA), orthogonal frequency division multiple access (OFDMA), and their variants. Thus, part of the communicated information is encoded in the amplitude (envelope) of the transmitted signal and part is encoded in the phase of the transmitted signal.
- To avoid distorting the communicated information, the power amplifier (PA) and various other components of the radio transmitter have to be linear, which is to say for example that the functional relationship between the output power of the PA and the input power of the PA is a straight line for all possible power levels. In addition, the phase shift of the input signal for example through the PA has to be constant for all possible power levels.
- Departures from amplitude linearity and constant phase introduce distortion into the communicated signal, such as spectral broadening that can disturb adjacent channels. Amplitude/phase distortion (vector distortion) in the transmitter can also increase the bit error rate (BER) of the communication system, e.g., degrading the audio quality of a voice call or reducing the speed of an internet connection.
- In general, the likelihood of proper performance can be increased by including in the transmitter a measurement receiver (MRX) that samples the transmitted signal and generates a compensation signal is fed back to the modulator, PA, and/or other transmitter components to correct the transmitter output signal. Such an
arrangement 100 is depicted inFIG. 1 , which shows anantenna 102, acoupler 104, anamplifier 106, aquadrature modulator 108, and an MRX 110. Theamplifier 106 andmodulator 108 can be considered the “transmit path” of thearrangement 100, which it will be understood typically includes oscillators and other components not shown. As seen in the figure, theMRX 110 samples the transmitted signal generated by the transmit path through the operation of thecoupler 104 and provides a compensation signal to themodulator 108. - The
MRX 110 can be used for several purposes, one of which is measurement, or more generally estimation, of the direct-current (d.c.) offset between I and Q components in theamplifier 106 andquadrature modulator 108. To achieve that purpose correctly, the I/O d.c. offset of the MRX itself typically must be negligible (ideally, it should be zero) or at least well known. Otherwise, the I/O d.c. offset of the transmit path will generally not be correctly estimated. - European Patent Application Publication No.
EP 1 835 626 A1 by Ishikawa et al. describes a d.c. offset correction value estimating unit that estimates a d.c. offset correction value based on a transmit signal that is produced by a quadrature modulator. A signal level detecting unit detects the signal level of an input signal, a weight factor calculating unit computes a weight factor for the d.c. offset correction value in accordance with the signal level, and a weighting unit assigns a weight to the d.c. offset correction value in accordance with the weight factor. A d.c. offset in the transmit signal is compensated by using the thus weighted d.c. offset correction value. - U.S. Patent Application Publication No. US 2007/0092023 by Kang et al. describes a method for self-calibrating mismatch and d.c. offset in a mobile transceiver. The transceiver's transmitter is used as a signal generator and the transceiver's receiver is used to measure a response characteristic. A baseband processor calibrates the mismatch and the d.c. offset for the receiving and transmitting sides using a test signal received from the transmitter.
- U.S. Pat. No. 7,266,359 to Chen et al. describes a method for removing d.c. interference from a signal received by a communication receiver that removes d.c. offsets induced by the receiver and the transmitter. The method includes removing an estimated d.c. offset from a received signal, correcting a frequency shift in the received signal, estimating a second d.c. offset signal induced by the transmitter, and removing the
- estimated second d.c. offset from the received signal. The receiver d.c. offset is estimated and removed before performing a timing carrier offset correction using Barker code manipulation to remove receiver d.c. offset and to sum all Barker chips after effectively multiplying Barker codes to correlate to a Barker sequence unaffected by the receiver d.c. offset signal.
- U.S. Patent Application Publication No. US 2008/0063113 by Gao et al. describes a method of correcting d.c. offset errors in a transmitter having an OFDMA-based quadrature modulator. A compensator before the modulator compensates the d.c. offset and is updated with estimated d.c. offset values obtained by performing a discrete Fourier transform in the digital baseband domain while sending a pair of orthogonal test tones to the modulator's inputs.
- U.S. Patent Application Publication No. US 2009/0041161 by Jian et al. describes a d.c. offset estimation in an OFDMA system that includes a carrier frequency offset estimator receiving an input signal and estimating a carrier frequency offset value, a symbol timing recovery unit providing a symbol boundary of the input signal, and a d.c. offset estimator estimating a d.c. offset value based on the input signal, the carrier frequency offset value, and the symbol boundary.
- Despite those and other previous attempts, the problem of d.c. offset estimation remains difficult to solve, and the requirements on an MRX remain difficult to meet.
- This invention enables the I/O d.c. offset in the transmit path to be estimated without prior knowledge of the I/O d.c. offset of the MRX itself. Moreover, this invention enables both the I/O d.c. offset of the transmit path and the I/O d.c. offset of the MRX to be estimated.
- In accordance with aspects of this invention, there is provided an apparatus for estimating a d.c. offset in a transmitter having a transmit path for quadrature modulating a carrier with input I and Q component signals and generating a transmit signal. The apparatus includes a measurement receiver, a phase shifter, and an offset estimator. The measurement receiver is configured to quadrature demodulate a portion of the transmit signal to generate an I component measurement signal and a Q component measurement signal. The phase shifter is configured to generate a first pair of oscillator signals having a relative phase shift of substantially 90 degrees for quadrature demodulation in the measurement receiver and for quadrature modulation in the transmit path. The phase shifter is also configured to selectively generate a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a phase shift of 180 degrees with respect to the first pair of oscillator signals for quadrature demodulation in the measurement receiver. The offset estimator is configured to compute at least one of a d.c. offset of the transmit path and a d.c. offset of the measurement receiver based on the input I and Q component signals and on measurement I and Q component signals generated with the first and second pairs of oscillator signals.
- In other aspects, there is provided a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees. The method includes generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals; generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
- In other aspects, there is provided a computer-readable medium having stored instructions that, when executed by a computer, cause the computer to perform a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees. The method includes generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals; generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
- The several objects, features, and advantages of this invention will be understood by reading this description in conjunction with the drawings, in which:
-
FIG. 1 is a block diagram of transmitter with a measurement receiver; -
FIG. 2 is a block diagram of a portion of an improved transmitter with a measurement receiver; -
FIG. 3 is a flow chart of method of d.c. offset estimation; -
FIG. 4 depicts a communication network; and -
FIG. 5 is a block diagram of a user equipment for the communication network. - This invention is applicable to any type of communication system and can be applied in any part of the system, e.g., uplink (UL) or downlink (DL), where d.c.-offset estimation is of interest.
-
FIG. 2 is a block diagram of a portion of animproved transmitter 200 with a measurement receiver in accordance with this invention. Thetransmitter 200 includes acoupler 202, a transmit path that has ananalog part 204 and adigital part 206, a voltage-controlled oscillator (VCO) 208, aphase shifter 210, anMRX 212, and an offsetestimator 214. - The
digital part 206 of the transmit path includes a digital transmit signal waveform generator (WFG) 216 that produces an in-phase transmit signal itx and a quadrature transmit signal qtx, which are converted to analog form by respective digital-to-analog converters (DACs). Theanalog part 204 of the transmit path uses the analog transmit signal components produced by the DACs to quadrature-modulate a carrier signal generated by theVCO 208 or equivalent local oscillator (LO) in the usual way with two mixers fed respectively by an unshifted and 90-degree shifted LO signal. Thephase shifter 210 implements the 0-degree and 90-degree phase shifts of the LO signal needed for the quadrature modulation in the transmit path, and for quadrature demodulation in theMRX 212 as described below. The modulated carrier is suitably amplified, for example by a power amplifier PA and variable-gain amplifier VGA in theanalog part 204, and the complex transmitter output signal is passed to an antenna or other port (not shown) through thecoupler 202. - The
waveform generator 216 also provides an in-phase reference signal iref and a quadrature reference signal qref to theestimator 214. The reference signals iref and ref are simply the transmit signals itx and qtx, respectively, and are used by theestimator 214 as described in more detail below. In general, thegenerator 216 generates signals that are compliant with the applicable modulation type and system standards in terms of data rate, pulse shaping filter, data (IQ) constellation, etc. The artisan will understand that thegenerator 216 can be implemented in a substantially conventional way, although a relevant aspect of thegenerator 216 is the time alignment between the signal that is sent (itx and qtx) and the signal that is measured (iref and qref). In order to ensure a suitable time alignment, thegenerator 216 can include or implement a suitable variable delay element, or such a delay element can be provided elsewhere in thetransmitter 200, to adjust the reference signals with respect to the transmit signal. - As depicted in
FIG. 2 , theMRX 212 receives from the coupler 202 a portion of the transmit signal generated by the transmit path. That portion is amplified by a suitable low-noise amplifier LNA and passed to a quadrature demodulator that includes two mixers fed by selectively phase-shifted LO signals from thephase shifter 210. The down-shifted (demodulated) I and Q component signals produced by respective ones of the mixers are low-pass filtered and converted to digital component measurement signals imeas and qmeas by respective suitable analog-to-digital converters ADC. - In addition to nominal 0-degree and nominal 90-degree phase shifts used for the quadrature modulator in the
analog part 204 and for the quadrature demodulator in theMRX 212, thephase shifter 210 also generates nominal 180-degree and nominal 270-degree phase shifts of the LO signal for the quadrature demodulator in theMRX 212. TheMRX 212 performs a first measurement with the “normal” phase shift, i.e., 0 degrees and 90 degrees for the I and Q components, respectively, in the MRX quadrature demodulator, and a second measurement with a “special” phase-shift, i.e., 180 degrees and 270 degrees for the I and Q components, respectively. - It is currently preferred that the
phase shifter 210 generates the shifts in successive pairs for particular time intervals, but it will be noted that thephase shifter 210 can be configured to provide four continuous outputs to theMRX 212, which could then have two parallel demodulators, each comprising two mixers, generating four continuous measurement signal components. Although such an arrangement has some advantages, it requires extra physical space, more power, and careful matching of the pairs of mixers. - In general, using the
MRX 212 as little as possible is desirable in order to save power, which can be important in a battery-powered transmitter. It is currently expected that the MRX would be used for periods of 25-50 microseconds, with an approximately 50% duty cycle of the 0/180 and 90/270 phase shifts, which of course are synchronized to the transmit path because the transmit and MRX measurement signals have to be time-aligned as noted above. It is also currently expected that the noisiness of the MRX measurement signals should be reduced by suitable smoothing, for example by low-pass filters, resettable integrators, or simply averaging. It will be noted that the equations given below are in terms of discrete signal samples, and do not include such smoothing, which can be implemented in many suitable ways, for example by software programming in the offsetestimator 214. - The combination of the
phase shifter 210,MRX 212, and offsetestimator 214 as described above enables the d.c. offset in the transmit path, comprising the analog and 204, 206, to be distinguished from the d.c. offset in thedigital parts MRX 212. Theestimator 214, which may be a suitably programmed digital processor or collection of logic gates, can compute either or both of the d.c. offsets according to the following equations and provide the computed offsets as results that can be used by other components in thetransmitter 200. - As depicted in
FIG. 2 , an offset result generated by theestimator 214, which is an estimate of the d.c. offset, can be fed back to manipulate either the analog or 204, 206 or thedigital parts MRX 212. For example, the offset result can be fed back to the transmitdigital part 206 by providing the result to the transmitgenerator 216, which can then compensate the transmit signals itx, qtx it generates based on the offset result. Such compensation can include simply adding the offset result to the transmit signals either in thegenerator 216 by including suitable adders (not shown for clarity) external to thegenerator 216. For another example, the offset result can be combined with the analog transmit signals in theanalog part 204 by suitable adders included before the mixers of the quadrature modulator. An offset result generated by theestimator 214 can also or instead be fed back to theMRX 212 as depicted inFIG. 2 through suitable adders included after the mixers in the quadrature demodulator. Also as depicted inFIG. 2 , the offset result generated by theestimator 214 can be provided to other components (not shown) in thetransmitter 200, for example, for inclusion in a report message. - Thus,
FIG. 3 is a flow chart of a method of estimating a d.c. offset in a transmitter having a transmit signal generated by quadrature mixing input I and Q component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees, e.g., 0-degree and 90-degree signals coming from thephase shifter 210. Instep 302, a first pair of measurement I component and Q component measurement signals, such as imeas and qmeas described above, is generated by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals. Instep 304, a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees, e.g., 180-degree and 270-degree signals from thephase shifter 210. In step 306, the d.c. offset is computed based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals. - The complex transmitter output signal including d.c. offset of the transmit path can be written as follows:
-
z TX =i ref +q ref +z DC,TX =i ref +q ref +i DC,TX +q DC,TX Eq. 1 - in which zTX is the transmitter output signal, iref is an I channel reference, qref is a Q channel reference, and zDC,TX is the d.c. offset of the transmit path, which can be separated as shown into d.c. offsets of the I and Q components of the transmit path, iDC,TX and qDC,TX, respectively.
- In a similar way, the complex output signal including d.c. offset of the
MRX 212 can be written as follows: -
z MRX =i meas +q meas Eq. 2 - in which zMRX is the MRX output signal, imeas is the I channel signal measured by the
MRX 212, and qmeas is the Q channel signal measured by theMRX 212. The combined d.c. offset zDC,tot of the transmit path and theMRX 212 can be written as follows: -
z DC,tot =Z DC,TX +Z DC,MRX =i DC,TX +q DC,TX +i DC,MRX +q DC,MRX Eq. 3 - in which zDC,MRX is the d.c. offset of the
MRX 212 and the other parameters are as defined above. - With the usual 0-degree and 90-degree phase shifts in the transmit path and
MRX 212, the 1-channel and Q-channel measurement signals generated by theMRX 212 can be written as follows: -
i meas =i ref +i DC,MRX +i DC,TX Eq. 4 -
q meas =q ref +q DC,MRX +q DC,TX Eq. 5 - and with the “special” 180-degree and 270-degree phase shifts in the
MRX 212, the I-channel and Q-channel measurement signals generated by theMRX 212 can be written as follows: -
î meas =−i ref +i DC,MRX −i DC,TX Eq. 6 -
{circumflex over (q)} meas =−q ref +q DC,MRX −q DC,TX Eq. 7 - in which the “hat” indicates the “special” phase shifts.
- Adding Eq. 4 and Eq. 6 yields the following:
-
i meas +î meas=2i DC,MRX Eq. 8A - which can be re-arranged to give the 1-channel d.c. offset of the
MRX 212 as follows: -
- In a similar way, adding Eq. 5 and Eq. 7 yields the following:
-
q meas +{circumflex over (q)} meas=2q DC,MRX Eq. 9A - which can be re-arranged to give the Q-channel d.c. offset of the
MRX 212 as follows: -
- Subtracting Eq. 6 from Eq. 4 yields the following:
-
i meas −î meas=2i ref+2i DC,TX Eq. 10A - which can be re-arranged to give the I-channel d.c. offset of the transmit path as follows:
-
- In a similar way, subtracting Eq. 7 from Eq. 5 yields the following:
-
q meas −{circumflex over (q)} meas=2q ref+2q DC,TX Eq. 11A - which can be re-arranged to give the Q-channel d.c. offset of the transmit path as follows:
-
- The offset
estimator 214 can compute the individual d.c. offsets of the transmit path and theMRX 212 using Eqs. 8B, 9B, 10B, and 11B. - The
estimator 214 and various other functional blocks of thetransmitter 200 can be implemented by one or more suitably programmed electronic processors, collections of logic gates, etc. that process information stored in one or more memories. The stored information may include program instructions and data that enable theestimator 214 to implement the equations described above. -
FIG. 4 is a diagram of anexemplary communication network 400, which may be, for example, a WCDMA communication system. Radio network controllers (RNCs) 402 a, 402 b control various radio network functions, including for example radio access bearer setup, diversity handover, etc. More generally, each RNC directs user calls via the appropriate RBSs, which communicate with user equipments (UEs) 300 a, 300 b through downlink (i.e., base-to-mobile, or forward) and uplink (i.e., mobile-to-base, or reverse) channels.RNC 402 a is shown coupled to RBSs 404 a, 404 b, 404 c, andRNC 402 b is shown coupled to 404 d, 404 e, 404 f. Each RBS, which can also be called a NodeB, serves a geographical area that can be divided into one or more cell(s).RBSs RBS 404 f is shown as having five antenna sectors S1-S5, all or some of which can be said to make up the cell of theRBS 404 f. The RBSs are coupled to their corresponding RNCs by dedicated telephone lines, optical fiber links, microwave links, etc. Both 402 a, 402 b are typically connected with external networks such as the public switched telephone network (PSTN), the Internet, etc. through one or more core network nodes, such as a mobile switching center and/or a packet radio service node (not shown). The artisan will understand that the components and arrangement depicted inRNCs FIG. 4 are examples and should not be construed as limiting the components and arrangement of an actual communication system. -
FIG. 5 depicts acommunication device 500, such as a mobile telephone, remote terminal, or equivalent device, that can communicate through a wireless link with a base station in a communication network. Thedevice 500 can be a UE 300 in thenetwork 400. Among other things, theUE 500 includes one or moreprogrammable processors 502 or suitable logic that processes information stored in one or 504, 506. The stored information may include, among other things, program instructions for computing the d.c. offsets as described above. It will be appreciated that themore memories processor 502 typically includes timers, etc. that facilitate its operations. Transceiver (TRX)circuitry 508 provides for the reception and transmission of control and traffic signals on the link between theUE 500 and the base station, which can include similar transceiver circuitry. TheTRX 508 includes thetransmitter portion 200 described above that operates under the control of theprocessor 502. - It is expected that this invention can be implemented in a wide variety of environments, including for example mobile communication devices. It will be appreciated that procedures described above are carried out repetitively as necessary. To facilitate understanding, many aspects of the invention are described in terms of sequences of actions that can be performed by, for example, elements of a programmable computer system. It will be recognized that various actions could be performed by specialized circuits (e.g., discrete logic gates interconnected to perform a specialized function or application-specific integrated circuits), by program instructions executed by one or more processors, or by a combination of both. Many communication devices can easily carry out the computations and determinations described here with their programmable processors and application-specific integrated circuits.
- Moreover, the invention described here can additionally be considered to be embodied entirely within any form of computer-readable storage medium having stored therein an appropriate set of instructions for use by or in connection with an instruction-execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch instructions from a medium and execute the instructions. As used here, a “computer-readable medium” can be any means that can contain, store, or transport the program for use by or in connection with the instruction-execution system, apparatus, or device. The computer-readable medium can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium include an electrical connection having one or more wires, a portable computer diskette, a RAM, a ROM, an erasable programmable read-only memory (EPROM or Flash memory), and an optical fiber.
- Thus, the invention may be embodied in many different forms, not all of which are described above, and all such forms are contemplated to be within the scope of the invention. For each of the various aspects of the invention, any such form may be referred to as “logic configured to” perform a described action, or alternatively as “logic that” performs a described action.
- It is emphasized that the terms “comprises” and “comprising”, when used in this application, specify the presence of stated features, integers, steps, or components and do not preclude the presence or addition of one or more other features, integers, steps, components, or groups thereof.
- The particular embodiments described above are merely illustrative and should not be considered restrictive in any way. The scope of the invention is determined by the following claims, and all variations and equivalents that fall within the range of the claims are intended to be embraced therein.
Claims (9)
1. An apparatus for estimating a direct-current (d.c.) offset in a transmitter having a transmit path for quadrature modulating a carrier with input in-phase (I) and quadrature (Q) component signals and generating a transmit signal, the apparatus comprising:
a measurement receiver, wherein the measurement receiver is configured to quadrature demodulate a portion of the transmit signal to generate an I component measurement signal and a Q component measurement signal;
a phase shifter, wherein the phase shifter is configured to generate a first pair of oscillator signals having a relative phase shift of substantially 90 degrees for quadrature demodulation in the measurement receiver and for quadrature modulation in the transmit path, and the phase shifter is configured to selectively generate a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a phase shift of substantially 180 degrees with respect to the first pair of oscillator signals for quadrature demodulation in the measurement receiver; and
an offset estimator, wherein the offset estimator is configured to compute at least one of a d.c. offset of the transmit path and a d.c. offset of the measurement receiver based on the input I and Q component signals and on measurement I and Q component signals generated with the first and second pairs of oscillator signals.
2. The apparatus of claim 1 , wherein the offset estimator is configured to compute an I component d.c. offset of the measurement receiver according to:
in which iDC,MRX is the I component of the d.c. offset of the measurement receiver, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, and imeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals; and the offset estimator is configured to compute a Q component d.c. offset of the measurement receiver according to:
in which qDC,MRX is the Q component of the d.c. offset of the measurement receiver, qmeas is the measurement Q component signal generated with the other one of the first pair of oscillator signals, and {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals.
3. The apparatus of claim 1 , wherein the offset estimator is configured to compute an I component d.c. offset of the transmit path according to:
in which iDC,TX is the I component of the d.c. offset of the transmit path, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, îmeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals, and iref is the I component signal; and the offset estimator is configured to compute a Q component d.c. offset of the transmit path according to:
in which qDC,TX is the Q component of the d.c. offset of the transmit path, qmeas is the Q component measurement signal generated with the other one of the first pair of oscillator signals, {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals, and qref is the Q component signal.
4. A method of estimating a direct-current (d.c.) offset in a transmitter having a transmit signal generated by quadrature mixing input in-phase (I) and quadrature (Q) component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees, the method comprising:
generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals;
generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and
computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
5. The method of claim 4 , wherein computing the d.c. offset includes computing an I component d.c. offset according to:
in which iDC,MRX is the I component d.c. offset, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, and îmeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals; and computing the d.c. offset includes computing a Q component d.c. offset according to:
in which qDC,MRX is the Q component d.c. offset, qmeas is the measurement Q component signal generated with the other one of the first pair of oscillator signals, and {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals.
6. The method of claim 4 , wherein computing the d.c. offset includes computing an I component d.c. offset of the transmit path according to:
in which iDC,TX is the I component of the d.c. offset of the transmit path, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, îmeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals, and iref is the I component signal; and computing the d.c. offset includes computing a Q component d.c. offset of the transmit path according to:
in which qDC,TX is the Q component of the d.c. offset of the transmit path, qmeas is the Q component measurement signal generated with the other one of the first pair of oscillator signals, {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals, and qref is the Q component signal.
7. A computer-readable medium having stored instructions that, when executed by a computer, cause the computer to perform a method of estimating a direct-current (d.c.) offset in a transmitter having a transmit signal generated by quadrature mixing input in-phase (I) and quadrature (Q) component signals with respective ones of a first pair of oscillator signals having a relative phase shift of substantially 90 degrees, wherein the method comprises:
generating a first pair of measurement I component and Q component measurement signals by quadrature demodulating a portion of the transmit signal with the first pair of oscillator signals;
generating a second pair of measurement I component and Q component signals by quadrature demodulating a portion of the transmit signal with a second pair of oscillator signals having a relative phase shift of substantially 90 degrees and a relative phase shift with respect to the first pair of oscillator signals of substantially 180 degrees; and
computing the d.c. offset based on the first and second pairs of measurement I and Q component signals and on the input I and Q component signals.
8. The medium of claim 7 , wherein computing the d.c. offset includes computing an I component d.c. offset according to:
in which iDC,MRX is the I component d.c. offset, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, and îmeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals; and computing the d.c. offset includes computing a Q component d.c. offset according to:
in which qDC,MRX is the Q component d.c. offset, qmeas is the measurement Q component signal generated with the other one of the first pair of oscillator signals, and {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals.
9. The medium of claim 7 , wherein computing the d.c. offset includes computing an I component d.c. offset of the transmit path according to:
in which iDC,TX is the I component of the d.c. offset of the transmit path, imeas is the measurement I component signal generated with one of the first pair of oscillator signals, îmeas is the measurement I component signal generated with one of the second pair of oscillator signals having a 180-degree phase shift with respect to the one of the first pair of oscillator signals, and iref is the I component signal; and computing the d.c. offset includes computing a Q component d.c. offset of the transmit path according to:
in which qDC,TX is the Q component of the d.c. offset of the transmit path, qmeas is the Q component measurement signal generated with the other one of the first pair of oscillator signals, {circumflex over (q)}meas is the measurement Q component signal generated with the other one of the second pair of oscillator signals, and qref is the Q component signal.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/690,549 US20110176641A1 (en) | 2010-01-20 | 2010-01-20 | D.C. Offset Estimation |
| EP11701783A EP2526625A1 (en) | 2010-01-20 | 2011-01-20 | Improved d.c. offset estimation |
| US13/522,662 US8976692B2 (en) | 2010-01-20 | 2011-01-20 | D.C. offset estimation |
| CN201180006556.6A CN102742165B (en) | 2010-01-20 | 2011-01-20 | Improved DC Offset Estimation |
| PCT/EP2011/050753 WO2011089184A1 (en) | 2010-01-20 | 2011-01-20 | Improved d.c. offset estimation |
| KR1020127019040A KR101771272B1 (en) | 2010-01-20 | 2011-01-20 | Improved d.c. offset estimation |
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| Application Number | Title | Priority Date | Filing Date |
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| US13/522,662 Continuation-In-Part US8976692B2 (en) | 2010-01-20 | 2011-01-20 | D.C. offset estimation |
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| Publication Number | Publication Date |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/690,549 Abandoned US20110176641A1 (en) | 2010-01-20 | 2010-01-20 | D.C. Offset Estimation |
| US13/522,662 Expired - Fee Related US8976692B2 (en) | 2010-01-20 | 2011-01-20 | D.C. offset estimation |
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| US (2) | US20110176641A1 (en) |
| EP (1) | EP2526625A1 (en) |
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| US20110176641A1 (en) * | 2010-01-20 | 2011-07-21 | St-Ericsson Sa | D.C. Offset Estimation |
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| US9742600B2 (en) | 2015-02-05 | 2017-08-22 | Samsung Electronics Co., Ltd. | Method and system for estimating and compensating for direct current (DC) offset in ultra-low power (ULP) receiver |
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2011
- 2011-01-20 KR KR1020127019040A patent/KR101771272B1/en not_active Expired - Fee Related
- 2011-01-20 EP EP11701783A patent/EP2526625A1/en not_active Withdrawn
- 2011-01-20 CN CN201180006556.6A patent/CN102742165B/en not_active Expired - Fee Related
- 2011-01-20 US US13/522,662 patent/US8976692B2/en not_active Expired - Fee Related
- 2011-01-20 WO PCT/EP2011/050753 patent/WO2011089184A1/en not_active Ceased
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| US7020216B1 (en) * | 1999-09-29 | 2006-03-28 | Rohde & Schwarz Gmbh & Co Kg | Method for adjusting a phase angle of a phase modifier of a transmitting device |
| US20090302919A1 (en) * | 2007-03-06 | 2009-12-10 | Takao Sasaki | Phase Shifter |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104320099A (en) * | 2014-10-17 | 2015-01-28 | 成都九华圆通科技发展有限公司 | Vector synthesizer with phase compensation |
| US11342948B1 (en) * | 2020-12-03 | 2022-05-24 | Rohde & Schwarz Gmbh & Co. Kg | Mixer module for mixing a radio frequency signal |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2011089184A1 (en) | 2011-07-28 |
| US8976692B2 (en) | 2015-03-10 |
| CN102742165B (en) | 2014-09-17 |
| US20120314602A1 (en) | 2012-12-13 |
| CN102742165A (en) | 2012-10-17 |
| KR20120112614A (en) | 2012-10-11 |
| EP2526625A1 (en) | 2012-11-28 |
| KR101771272B1 (en) | 2017-08-24 |
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