US20100122114A1 - Data protection method for memory - Google Patents
Data protection method for memory Download PDFInfo
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- US20100122114A1 US20100122114A1 US12/366,099 US36609909A US2010122114A1 US 20100122114 A1 US20100122114 A1 US 20100122114A1 US 36609909 A US36609909 A US 36609909A US 2010122114 A1 US2010122114 A1 US 2010122114A1
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
- G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7211—Wear leveling
Definitions
- the present invention generally relates to a data protection method, and more particularly, to a data protection method for a memory.
- Flash memories having the advantages including non-volatility, high density, and fast response, have become an outstanding one of the many kinds of commercialized memories.
- Even only repetitive reading operations may cause variations of the data saved in the flash memory, which may further lead to an unpredictable error that the read data is inconsistent with the original data.
- error correction codes are often utilized in data protection technologies for protecting data saved in flash memories.
- the system can execute a limited error recovery to the flash memory by conducting a calculation of error correction codes at a controller end.
- the error recovery depends on the capability of a controller to generate error correction codes to protect data. For example, one controller may be capable of detecting and recovering 1 bit from 256 bytes, while another controller may be capable of detecting and recovering 4 bits or even 8 bits from 512 bytes.
- a conventional technology proposes to read out the data saved in the flash memory and correct the error thereof and then rewrite the data back to the flash memory before the saved data exceeding the recovery capability of the error correction codes, so as to assure the correctness of the data saved in the flash memory.
- instant operations of data reading out, data correction, and data rewriting back to the flash memory drastically affect the speed of the system reading data from the flash memory.
- the data saved in the flash memory is sequentially read out, and if there is an erroneous data detected during the reading process, the erroneous data would be corrected and thus rewritten back to the flash memory.
- the flash memory has a larger capacity, the time spent on scanning all data saved in the flash memory is also longer. Therefore, some erroneous data may be detected relatively late, so that the error bit number of the data exceeds the correcting capability of the error correction codes. Further, the recovery and moving operations add additional erase times of the blocks of the flash memory, thus consuming the lifetime of the blocks.
- the present invention is directed to provide a data protection method, for protecting a data saved in a non-volatile memory, while simultaneously considering the reading speed and lifetime of the non-volatile memory.
- the present invention provides a data protection method, adapted for a non-volatile memory.
- the non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of pages.
- the blocks of the non-volatile memory are partitioned into a data area and a spare area.
- the data protection method includes the following steps. First, calculation results of error correction codes of the pages of the non-volatile memory are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory. Then, erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated.
- a block having a minimum erasing time is selected out from the spare area according to the second form as a replacement block. It is then determined whether to execute a block exchange of a specific block with the replacement block in accordance with whether there is a recovery data saved in the volatile memory.
- the data protection method further includes a step of determining whether to execute the block exchange of the specific block with the replacement block according to the efficiency value of recovery and substitution of the specific block.
- the data protection method further includes the following steps. It is determined that whether there is any recovery data saved in the volatile memory. When there is a recovery data saved in the volatile memory, a specific block, to which the recovery data belongs, is selected from the data area of the non-volatile memory, and a part of data of the specific block and the recovery data are sequentially saved in the replacement block. When there is no recovery data saved in the volatile memory, the efficiency values of recovery and substitution of the blocks of the non-volatile memory are calculated, by which the specific block is selected out, and whether to save data of the specific block into the replacement block is determined according to a first threshold value.
- the data protection method further includes: determining whether a system with the non-volatile memory is in an idle status; when the system with the non-volatile memory is in the idle status, repeating all of the above steps; and when the system with the non-volatile memory is not in the idle status, suspending all steps.
- the step of selecting the specific block to which the recovery data belong from the data area, and sequentially saving the part of data saved into the specific block and the recovery data in the replacement block further includes the following steps. First, a page and a block to which the recovery data belongs are selected from the pages and the blocks and are determined as a specific page and the specific block. Then, data saved in the block other than those saved in the specific page is read out, and are sequentially saved together with the recovery data into the replacement block.
- the step of calculating the efficiency values of recovery and substitution of the blocks to select out the specific block, and determining whether to save data of the specific block into the replacement block according to the first threshold value further includes the following steps. First, the bit error weight values recorded in the first form and the erasing times recorded in the second form are calculated with a predetermined equation, so as to obtain the efficiency values of recovery and substitution of the blocks. Then, a block having a maximum efficiency value of recovery and substitution is selected from the data area, and taken as the specific block.
- the efficiency value of recovery and substitution is greater than the first threshold value.
- the data saved in the specific block is read out and recovered, and the recovered data of the specific block is sequentially saved into the replacement block.
- the efficiency value of recovery and substitution is smaller than the first threshold value, the data saved in the specific block is not required to be substituted.
- the step of substituting between the specific block and the replacement block includes the following steps. First, a logic address linked to the specific block is varied to link to the replacement block. Then, the data saved in the specific block is cleared, and thus the specific block is moved to the spare area.
- the present invention records bit error weight values and erasing times of the blocks during routine operations of the non-volatile memory. Therefore, when the system is in an idle status, the data of those blocks having higher bit error weight values can be recovered, so as to maintain the data being recovered before it exceeds the correcting capability of the error correction codes. Further, the present invention moves data of those blocks having less erasing times to other blocks, so as to release the blocks having less erasing times for more effective use. In such a way, comparing with the conventional technologies, the present invention utilizes all blocks of the non-volatile memory in a more average manner, so as to further extend the lifetime of the non-volatile memory. Further, the present invention employs a more effective mechanism to provide an optimal protection to the data saved in the non-volatile memory and averagely execute the erasing operations, thus improving the reading speed of the non-volatile memory.
- FIG. 1 is a flow chart illustrating a data protection method according to an embodiment of the present invention.
- FIG. 2 is a schematic structural diagram illustrating a flash memory according to an embodiment of the present invention.
- FIG. 3 is a detailed flow chart illustrating the step S 110 of FIG. 1 according to an embodiment of the present invention.
- FIG. 4 is a detailed flow chart illustrating the step S 120 according to an embodiment of the present invention.
- FIG. 5 is a flow chart illustrating a data protection method according to another embodiment of the present invention.
- FIG. 6 is a flow chart illustrating a data protection method obtained by modifying the embodiment of FIG. 5 according to another embodiment of the present invention.
- FIG. 7 is a flow chart illustrating a data protection method according to a further embodiment of the present invention.
- FIG. 1 is a flow chart illustrating a data protection method according to an embodiment of the present invention.
- the data protection method is adapted for a memory.
- the memory is illustrated taking a non-volatile memory as an example.
- the non-volatile memory for example can be a flash memory.
- the flash memory is to be structurally illustrated hereby.
- FIG. 2 there is shown a flash memory 200 partitioned into a plurality of physical blocks.
- the flash memory 200 includes a plurality of physical blocks, e.g., BP 11 to BP 13 , and BP 21 to BP 23 .
- the physical blocks are briefly described as blocks when mentioned below.
- each of the blocks is divided into a plurality of pages.
- the block BP 11 includes pages P 11 to P 13
- the block BP 12 includes pages P 21 to P 23 .
- a block of the flash memory is a minimum unit for executing an erasing operation, while a page of the block is a minimum unit for executing a programming or reading operation.
- the blocks of the flash memory are divided into several areas.
- the blocks of the flash memory 200 are divided into a data area 210 and a spare area 220 .
- the present invention is not exclusive restricted as such. In other words, any flash memory which blocks are not divided into different areas can also be complied with the data protection method according to the present invention to achieve the similar protection effect.
- step S 110 calculation results of error correction codes of several pages are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory.
- FIG. 3 is a detailed flow chart illustrating the step S 110 of FIG. 1 according to an embodiment of the present invention. Taking the flash memory 200 shown in FIG. 2 as an example, and further referring to FIGS. 2 and 3 together, there are shown the detailed steps of step S 110 .
- the first form is initialized, in which the bit error weight values ED b of all blocks recorded in the first form are set as 0.
- one page is selected from the pages of the blocks of the flash memory 200 for reading.
- the flash memory 200 is constituted by blocks BP 11 and BP 12 only, and the pages of the blocks BP 11 and BP 12 are pages P 11 to P 13 and P 21 to P 23 respectively.
- the page selected for reading is P 11
- the page P 11 is considered as a predetermined page.
- the predetermined page P 11 is executed with a calculation of the error correction codes, so as to obtain the error bit number of the predetermined page P 11 .
- a bit error weight value ED bp is obtained according to the error bit number. For example, as shown in equation (1), when the error bit number of the predetermined page P 11 is detected to be 1 (e.g., there is 1 erroneous bit in the predetermined page P 11 ), the bit error weight value ED bp is equal to a 1 . Correspondingly, when the error bit number of the predetermined page P 11 is detected to be 2 (e.g., there are 2 erroneous bits in the predetermined page P 11 ), the bit error weight value ED bp is equal to a 2 .
- the bit error weight value ED bp is accumulately added to the bit error weight value ED b of the block BP 11 corresponding to the predetermined page P 11 .
- the error weight value ED bp is added to the bit error weight value ED b , thus obtain an accumulated bit error weight value ED b ′.
- the bit error weight values ED b are recorded in the first form, and therefore at step S 340 , the bit error weight value ED b of the block BP 11 originally recorded in the first form is updated to the accumulated bit error weight value ED b ′.
- step S 350 it is determined whether the bit error weight value ED bp exceeds a second threshold value. If the maximum error bit number which can be corrected by the error correction codes is 8, the second threshold value can be set as a bit error weight value ⁇ a 6 ⁇ corresponding to an error bit number 6 . In such a way, the system can determine a recoverable rate of the data of the predetermined page P 11 by comparing the bit error weight value ED bp with the second threshold value, thus determining whether to backup the data of the predetermined page P 11 . It should be noted that those skilled in the art could vary the second threshold value in accordance with the practical design as desired.
- step S 360 the data of the predetermined page P 11 is recovered and backed up, and is saved as a recovery data in a volatile memory, e.g., dynamic random access memory (DRAM) of the system.
- DRAM dynamic random access memory
- step S 370 the first form is saved in the flash memory 200 , and the foregoing steps S 310 through S 360 are repeated, until all pages of the flash memory 200 have been read one by one.
- the system reads the page P n during routine reading operation, so as to timely update the first form and the second form, without specifically reading each of the pages one by one. Further, when the system is idled for a long time, the system can also arrange to execute an overall updating protection by sequentially reading all of the pages. In other words, the pages P 11 to P 13 , and P 21 to P 23 can be sequentially taken as the predetermined page. In such a way, the bit error weight value ED bp of the pages P 11 to P 13 obtained according to the error correction codes are used for updating the bit error weight value ED b of the block BP 11 in the first form, and determining whether to backup the pages P 11 to P 13 according to a comparison with the second threshold value.
- bit error weight value ED bp of the pages P 21 to P 23 obtained according to the error correction codes are used for updating the bit error weight value ED b of the block BP 12 in the first form, and determining whether to backup the pages P 21 to P 23 according to a comparison with the second threshold value.
- the system is allowed to record the bit error weight value of each block by executing step S 110 and timely backup the data that is going to exceed the correcting capability of the error correction codes, during the routine operation of reading the non-volatile memory. Then, at step S 120 , the system records the erasing times of the blocks in the second form, and updates the first form at the same time of recording the second form.
- FIG. 4 is a detailed flow chart illustrating the step S 120 according to an embodiment of the present invention. Taking the flash memory 200 shown in FIG. 2 as an example, and further referring to FIGS. 2 and 4 together, there are shown the detailed steps of step S 120 .
- step S 410 when the system to which the non-volatile memory belongs is first time started, the second form is initialized, in which the erasing times EC b of all blocks recorded in the second form are set as 0. Then, at step S 420 , when one of the blocks, e.g., BP 11 , is erased, the erasing time EC b in the second form corresponding to the erased block BP 11 is added with 1, and the bit error weight value ED b in the first form corresponding to the cleared block BP 11 is set to be 0.
- the blocks e.g., BP 11
- the system records the erasing times of each of the blocks by executing step S 120 , during the routine operation of erasing the non-volatile memory. Then, at step S 130 , a block with a minimum erasing time is selected from the spare area according to the second form, and is taken as a replacement block. It should be noted that in case the memory is not divided into a data area and a spare area, then a block having a minimum/least erasing time is selected from all of the blocks according to the second form, and is taken as a replacement block. For example, as shown in FIG. 2 , if the block BP 21 of the spare area 220 has the minimum erasing time, then the block BP 21 is taken as the replacement block.
- step S 140 is executed to determine whether there is any recovery data saved in the volatile memory. If the volatile memory contains some data saved therein, then the flow executes step S 150 . In this case, a specific block to which the recovery data is belonged is selected from the data area, and a part of data of the specific block and the recovery data are sequentially saved into the replacement block.
- the block BP 11 and the page P 11 to which the recovery data is belonged are respectively selected from all of the blocks and all of the pages, and are taken as a specific block and a specific page (step S 151 ).
- step S 152 data of pages in the specific block other than the specific pages P 11 are read out and recovered. For example, data of pages P 12 and P 13 are read out and recovered.
- the data of the pages in the specific block other than the specific pages P 11 and the recovery data are sequentially saved into the replacement block BP 21 .
- step S 160 efficiency values BE b of recovery and substitution of the blocks are calculated for selecting the specific block from the data area, and it is determined whether to save the data of the specific block into the replacement block according to the first threshold value.
- step S 160 the detailed flow of the step S 160 is depicted as following.
- bit error weight values ED b recorded in the first form and the erasing times EC b recorded in the second form are calculated with a specific equation so as to obtain the efficiency values BE b of recovery and substitution.
- the efficiency value of recovery and substitution of the i th block is represented as BE bi
- the bit error weight value thereof is represented as ED bi
- the erasing times thereof is represented as EC bi
- MinEC the minimum erasing time of the spare area 220 recorded in the second form
- BE bi ⁇ ED bi + ⁇ (MinEC ⁇ EC bi )
- i is a positive integer
- ⁇ and ⁇ are factors.
- a block having a maximum efficiency value of recovery and substitution is selected from the data area, and taken as a specific block.
- a block having a maximum efficiency value of recovery and substitution is selected from all of the blocks according to the second form, and taken as a specific block.
- blocks in the data area having greater bit error weight values ED b have high priority to be selected as the specific block.
- an erasing time of a certain block is much smaller than the maximum erasing time of all blocks in the spare area, the certain block also has high priority to be selected as the specific block. Weights of the two priorities discussed above are normalized by the setting of the two factors ⁇ and ⁇ .
- step S 163 it is determined whether the efficiency value of recovery and substitution of the specific block is greater than the first threshold value.
- the efficiency value of recovery and substitution is smaller than the first threshold value, which indicates none of the blocks is required to be executed with a data recovery or data moving operation.
- step S 190 is executed to stop all steps. In such a way, unnecessary writing operations executed to the blocks can be reduced, thus the lifetime of the memory can be improved.
- the efficiency value of recovery and substitution is greater than the first threshold value, then at step S 164 , the data of the specific block is read out and recovered, and the recovered data of the specific block is sequentially saved into the replacement block.
- step S 170 a block exchange is executed between the specific block and the replacement block.
- a block exchange is executed between the specific block and the replacement block.
- the block BP 11 of the data area 210 is the specific block
- the block BP 21 of the spare area 220 is the replacement block
- step S 170 a logical block address linked to the specific block BP 11 is changed to be linked to the replacement block BP 21 .
- step S 170 further clears the data of the specific block BP 11 , and moves the specific block BP 11 which originally belongs to the data area 210 to the spare area 220 .
- step S 180 it is determined whether the system to which the non-volatile memory belongs is in an idle status.
- step S 190 is executed to stop all steps.
- all steps are repeated until the system feeds back a busy status, or the maximum efficiency value of recovery and substitution of the blocks in the data area is smaller than the first threshold value.
- FIG. 5 is a flow chart illustrating a data protection method according to another embodiment of the present invention.
- the data protection method is adapted for a plurality of pages of a plurality of blocks of a non-volatile memory.
- step S 510 calculation results of error correction codes of several pages of the non-volatile memory are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory.
- step S 520 erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated.
- step S 530 it is determined whether there is recovery data saved in the volatile memory. If there is a recovery data saved in the volatile memory, then the flow executes step S 540 , in which a block having a minimum erasing time is selected out from the blocks according to the second form as a replacement block.
- step S 550 a block exchange operation is executed with respect to a specific block and the replacement block.
- the flow returns to the step S 510 , thus maintaining regular operation of the system.
- steps S 520 and S 540 those blocks having less erasing times would be released for being used as blocks for block exchange.
- the present invention utilizes all blocks of the non-volatile memory in an average manner. Further, those skilled in the art may vary the flow of the steps given above by the embodiment of FIG. 5 as desired in accordance with the spirit of the present invention.
- FIG. 6 is a flow chart illustrating a data protection method obtained by modifying the embodiment of FIG. 5 according to another embodiment of the present invention.
- the embodiment of FIG. 6 differs from the embodiment of FIG. 5 in that it finds out the replacement block (at step S 540 ) and thereafter determines whether there is any recovery data saved in the volatile memory (at step S 530 ).
- the flow of FIG. 6 can directly execute the block exchange (step S 550 ).
- Other details of the embodiment of FIG. 6 are similar to that of FIG. 5 , and are not to be iterated hereby.
- FIG. 7 is a flow chart illustrating a data protection method according to a further embodiment of the present invention.
- the data protection method of FIG. 7 is adapted for a plurality of pages of a plurality of blocks of a non-volatile memory.
- step S 710 calculation results of error correction codes of the pages are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory.
- step S 720 erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated.
- step S 730 a block having a minimum erasing time is selected out from the blocks according to the second form and is taken as a replacement block.
- step S 740 efficiency values of recovery and substitution of the blocks are then calculated so as to select a specific block, and compare the efficiency value of recovery and substitution of the specific block with a first threshold value for determining whether to save the data of the specific block into the replacement block.
- step S 750 executes a block exchange with respect to the specific block and the replacement block.
- the flow returns back to step S 710 , thus maintaining regular operation of the system.
- the present invention determines the priority sequence of recovering data of the blocks when the system is in an idle status according to the bit error weight values of the blocks. Further, with respect to those blocks having less erasing times, the present invention moves the data thereof to other blocks, so as to release the blocks from the data area for use. In such a way, comparing with the conventional technologies, the present invention utilizes all blocks of the non-volatile memory in an average manner more, so as to further extend the lifetime of the non-volatile memory. Further, the present invention employs a more effective mechanism to provide optimal protection to the data saved in the volatile memory and averagely execute the erasing operations.
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Abstract
Description
- This application claims the priority benefit of Chinese application serial no. 200810174866.9, filed on Nov. 10, 2008. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
- 1. Field of the Invention
- The present invention generally relates to a data protection method, and more particularly, to a data protection method for a memory.
- 2. Description of Related Art
- Flash memories, having the advantages including non-volatility, high density, and fast response, have become an outstanding one of the many kinds of commercialized memories. However, with respect to a conventional flash memory, even only repetitive reading operations may cause variations of the data saved in the flash memory, which may further lead to an unpredictable error that the read data is inconsistent with the original data.
- In order to avoid the occurrence of such an unpredictable error, error correction codes are often utilized in data protection technologies for protecting data saved in flash memories. For example, when the data saved in a flash memory is being read, the system can execute a limited error recovery to the flash memory by conducting a calculation of error correction codes at a controller end. The error recovery depends on the capability of a controller to generate error correction codes to protect data. For example, one controller may be capable of detecting and recovering 1 bit from 256 bytes, while another controller may be capable of detecting and recovering 4 bits or even 8 bits from 512 bytes.
- However, even though facilitated with such error correction codes, when a flash memory has been read for a long time, it may also have the problem that the error exceeds the calculation capability of the controller. Correspondingly, a conventional technology proposes to read out the data saved in the flash memory and correct the error thereof and then rewrite the data back to the flash memory before the saved data exceeding the recovery capability of the error correction codes, so as to assure the correctness of the data saved in the flash memory. However, instant operations of data reading out, data correction, and data rewriting back to the flash memory drastically affect the speed of the system reading data from the flash memory.
- Alternatively, in accordance with another conventional technology, when the system is in an idle status, the data saved in the flash memory is sequentially read out, and if there is an erroneous data detected during the reading process, the erroneous data would be corrected and thus rewritten back to the flash memory. Unfortunately, when the flash memory has a larger capacity, the time spent on scanning all data saved in the flash memory is also longer. Therefore, some erroneous data may be detected relatively late, so that the error bit number of the data exceeds the correcting capability of the error correction codes. Further, the recovery and moving operations add additional erase times of the blocks of the flash memory, thus consuming the lifetime of the blocks.
- In other words, it has become a major concern of using flash memories to effectively protect the data of the flash memories, and simultaneously consider the reading speed and lifetime of the flash memories.
- Accordingly, the present invention is directed to provide a data protection method, for protecting a data saved in a non-volatile memory, while simultaneously considering the reading speed and lifetime of the non-volatile memory.
- The present invention provides a data protection method, adapted for a non-volatile memory. The non-volatile memory includes a plurality of blocks, each of the blocks includes a plurality of pages. The blocks of the non-volatile memory are partitioned into a data area and a spare area. The data protection method includes the following steps. First, calculation results of error correction codes of the pages of the non-volatile memory are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory. Then, erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated.
- Then, a block having a minimum erasing time is selected out from the spare area according to the second form as a replacement block. It is then determined whether to execute a block exchange of a specific block with the replacement block in accordance with whether there is a recovery data saved in the volatile memory.
- According to an embodiment of the present invention, the data protection method further includes a step of determining whether to execute the block exchange of the specific block with the replacement block according to the efficiency value of recovery and substitution of the specific block.
- According to an embodiment of the present invention, the data protection method further includes the following steps. It is determined that whether there is any recovery data saved in the volatile memory. When there is a recovery data saved in the volatile memory, a specific block, to which the recovery data belongs, is selected from the data area of the non-volatile memory, and a part of data of the specific block and the recovery data are sequentially saved in the replacement block. When there is no recovery data saved in the volatile memory, the efficiency values of recovery and substitution of the blocks of the non-volatile memory are calculated, by which the specific block is selected out, and whether to save data of the specific block into the replacement block is determined according to a first threshold value.
- According to an embodiment of the present invention, the data protection method further includes: determining whether a system with the non-volatile memory is in an idle status; when the system with the non-volatile memory is in the idle status, repeating all of the above steps; and when the system with the non-volatile memory is not in the idle status, suspending all steps.
- According to an embodiment of the present invention, the step of selecting the specific block to which the recovery data belong from the data area, and sequentially saving the part of data saved into the specific block and the recovery data in the replacement block further includes the following steps. First, a page and a block to which the recovery data belongs are selected from the pages and the blocks and are determined as a specific page and the specific block. Then, data saved in the block other than those saved in the specific page is read out, and are sequentially saved together with the recovery data into the replacement block.
- According to an embodiment of the present invention, the step of calculating the efficiency values of recovery and substitution of the blocks to select out the specific block, and determining whether to save data of the specific block into the replacement block according to the first threshold value further includes the following steps. First, the bit error weight values recorded in the first form and the erasing times recorded in the second form are calculated with a predetermined equation, so as to obtain the efficiency values of recovery and substitution of the blocks. Then, a block having a maximum efficiency value of recovery and substitution is selected from the data area, and taken as the specific block.
- Further, it is determined that whether the efficiency value of recovery and substitution is greater than the first threshold value. When the efficiency value of recovery and substitution is greater than the first threshold value, the data saved in the specific block is read out and recovered, and the recovered data of the specific block is sequentially saved into the replacement block. Correspondingly, when the efficiency value of recovery and substitution is smaller than the first threshold value, the data saved in the specific block is not required to be substituted.
- According to an embodiment of the present invention, the step of substituting between the specific block and the replacement block includes the following steps. First, a logic address linked to the specific block is varied to link to the replacement block. Then, the data saved in the specific block is cleared, and thus the specific block is moved to the spare area.
- The present invention records bit error weight values and erasing times of the blocks during routine operations of the non-volatile memory. Therefore, when the system is in an idle status, the data of those blocks having higher bit error weight values can be recovered, so as to maintain the data being recovered before it exceeds the correcting capability of the error correction codes. Further, the present invention moves data of those blocks having less erasing times to other blocks, so as to release the blocks having less erasing times for more effective use. In such a way, comparing with the conventional technologies, the present invention utilizes all blocks of the non-volatile memory in a more average manner, so as to further extend the lifetime of the non-volatile memory. Further, the present invention employs a more effective mechanism to provide an optimal protection to the data saved in the non-volatile memory and averagely execute the erasing operations, thus improving the reading speed of the non-volatile memory.
- The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
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FIG. 1 is a flow chart illustrating a data protection method according to an embodiment of the present invention. -
FIG. 2 is a schematic structural diagram illustrating a flash memory according to an embodiment of the present invention. -
FIG. 3 is a detailed flow chart illustrating the step S110 ofFIG. 1 according to an embodiment of the present invention. -
FIG. 4 is a detailed flow chart illustrating the step S120 according to an embodiment of the present invention. -
FIG. 5 is a flow chart illustrating a data protection method according to another embodiment of the present invention. -
FIG. 6 is a flow chart illustrating a data protection method obtained by modifying the embodiment ofFIG. 5 according to another embodiment of the present invention. -
FIG. 7 is a flow chart illustrating a data protection method according to a further embodiment of the present invention. - Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
-
FIG. 1 is a flow chart illustrating a data protection method according to an embodiment of the present invention. The data protection method is adapted for a memory. In depicting the present invention, the memory is illustrated taking a non-volatile memory as an example. The non-volatile memory for example can be a flash memory. - Prior to illustrating the data protection method of the embodiment in details, the flash memory is to be structurally illustrated hereby. As shown in
FIG. 2 , there is shown aflash memory 200 partitioned into a plurality of physical blocks. For example, theflash memory 200 includes a plurality of physical blocks, e.g., BP11 to BP13, and BP21 to BP23. For convenience of illustration, the physical blocks are briefly described as blocks when mentioned below. Further each of the blocks is divided into a plurality of pages. For example, the block BP11 includes pages P11 to P13, while the block BP12 includes pages P21 to P23. - Generally, a block of the flash memory is a minimum unit for executing an erasing operation, while a page of the block is a minimum unit for executing a programming or reading operation. Further, for simplifying the management complexity of the flash memory, the blocks of the flash memory are divided into several areas. For example, the blocks of the
flash memory 200 are divided into adata area 210 and aspare area 220. It should be noted that although the present invention is illustrated in accordance with the embodiment in which the blocks are divided into different areas, the present invention is not exclusive restricted as such. In other words, any flash memory which blocks are not divided into different areas can also be complied with the data protection method according to the present invention to achieve the similar protection effect. - Referring to
FIGS. 1 and 2 together, the data protection method of the current embodiment is shown. First, at step S110, calculation results of error correction codes of several pages are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory. -
FIG. 3 is a detailed flow chart illustrating the step S110 ofFIG. 1 according to an embodiment of the present invention. Taking theflash memory 200 shown inFIG. 2 as an example, and further referring toFIGS. 2 and 3 together, there are shown the detailed steps of step S110. - First, at step S300, when the system to which the non-volatile memory (e.g., the flash memory 200) is first time started, the first form is initialized, in which the bit error weight values EDb of all blocks recorded in the first form are set as 0. Then, at step S310, one page is selected from the pages of the blocks of the
flash memory 200 for reading. For example, theflash memory 200 is constituted by blocks BP11 and BP12 only, and the pages of the blocks BP11 and BP12 are pages P11 to P13 and P21 to P23 respectively. When the page selected for reading is P11, the page P11 is considered as a predetermined page. Then, at step S320, the predetermined page P11 is executed with a calculation of the error correction codes, so as to obtain the error bit number of the predetermined page P11. - Then, at step S330, a bit error weight value EDbp is obtained according to the error bit number. For example, as shown in equation (1), when the error bit number of the predetermined page P11 is detected to be 1 (e.g., there is 1 erroneous bit in the predetermined page P11), the bit error weight value EDbp is equal to a1. Correspondingly, when the error bit number of the predetermined page P11 is detected to be 2 (e.g., there are 2 erroneous bits in the predetermined page P11), the bit error weight value EDbp is equal to a2.
-
- Then, at step S340, the bit error weight value EDbp is accumulately added to the bit error weight value EDb of the block BP11 corresponding to the predetermined page P11. For example, referring to equation (2), at step S340, the error weight value EDbp is added to the bit error weight value EDb, thus obtain an accumulated bit error weight value EDb′. As set forth above, the bit error weight values EDb are recorded in the first form, and therefore at step S340, the bit error weight value EDb of the block BP11 originally recorded in the first form is updated to the accumulated bit error weight value EDb′.
-
EDb′=EDb+EDbp equation (2) - Further, at step S350, it is determined whether the bit error weight value EDbp exceeds a second threshold value. If the maximum error bit number which can be corrected by the error correction codes is 8, the second threshold value can be set as a bit error weight value {a6} corresponding to an error bit number 6. In such a way, the system can determine a recoverable rate of the data of the predetermined page P11 by comparing the bit error weight value EDbp with the second threshold value, thus determining whether to backup the data of the predetermined page P11. It should be noted that those skilled in the art could vary the second threshold value in accordance with the practical design as desired.
- When the bit error weight value EDbp exceeds a second threshold value, that indicates the data of the predetermined page P11 is going to exceed the correcting capability of the error correction codes. Thus, at step S360, the data of the predetermined page P11 is recovered and backed up, and is saved as a recovery data in a volatile memory, e.g., dynamic random access memory (DRAM) of the system.
- On the contrary, when the bit error weight value EDbp does not exceed the second threshold value yet, that indicates the data of the predetermined page P11 is within the correcting capability of the error correction codes and can be recovered by the error correction codes. In this case, the flow executes step S370. At step S370, the first form is saved in the
flash memory 200, and the foregoing steps S310 through S360 are repeated, until all pages of theflash memory 200 have been read one by one. - According to the previously mentioned steps of the present invention, the system reads the page Pn during routine reading operation, so as to timely update the first form and the second form, without specifically reading each of the pages one by one. Further, when the system is idled for a long time, the system can also arrange to execute an overall updating protection by sequentially reading all of the pages. In other words, the pages P11 to P13, and P21 to P23 can be sequentially taken as the predetermined page. In such a way, the bit error weight value EDbp of the pages P11 to P13 obtained according to the error correction codes are used for updating the bit error weight value EDb of the block BP11 in the first form, and determining whether to backup the pages P11 to P13 according to a comparison with the second threshold value. Correspondingly, the bit error weight value EDbp of the pages P21 to P23 obtained according to the error correction codes are used for updating the bit error weight value EDb of the block BP12 in the first form, and determining whether to backup the pages P21 to P23 according to a comparison with the second threshold value.
- In such a way, the system is allowed to record the bit error weight value of each block by executing step S110 and timely backup the data that is going to exceed the correcting capability of the error correction codes, during the routine operation of reading the non-volatile memory. Then, at step S120, the system records the erasing times of the blocks in the second form, and updates the first form at the same time of recording the second form.
- For example,
FIG. 4 is a detailed flow chart illustrating the step S120 according to an embodiment of the present invention. Taking theflash memory 200 shown inFIG. 2 as an example, and further referring toFIGS. 2 and 4 together, there are shown the detailed steps of step S120. - First, at step S410, when the system to which the non-volatile memory belongs is first time started, the second form is initialized, in which the erasing times ECb of all blocks recorded in the second form are set as 0. Then, at step S420, when one of the blocks, e.g., BP11, is erased, the erasing time ECb in the second form corresponding to the erased block BP11 is added with 1, and the bit error weight value EDb in the first form corresponding to the cleared block BP11 is set to be 0.
- In such a way, the system records the erasing times of each of the blocks by executing step S120, during the routine operation of erasing the non-volatile memory. Then, at step S130, a block with a minimum erasing time is selected from the spare area according to the second form, and is taken as a replacement block. It should be noted that in case the memory is not divided into a data area and a spare area, then a block having a minimum/least erasing time is selected from all of the blocks according to the second form, and is taken as a replacement block. For example, as shown in
FIG. 2 , if the block BP21 of thespare area 220 has the minimum erasing time, then the block BP21 is taken as the replacement block. - Then, step S140 is executed to determine whether there is any recovery data saved in the volatile memory. If the volatile memory contains some data saved therein, then the flow executes step S150. In this case, a specific block to which the recovery data is belonged is selected from the data area, and a part of data of the specific block and the recovery data are sequentially saved into the replacement block.
- For example, supposing that the block BP21 of the
spare area 200 is a replacement block, and the volatile memory contains the recovery data of the page P11, therefore, at step S150, the block BP11 and the page P11 to which the recovery data is belonged are respectively selected from all of the blocks and all of the pages, and are taken as a specific block and a specific page (step S151). Then, at step S152, data of pages in the specific block other than the specific pages P11 are read out and recovered. For example, data of pages P12 and P13 are read out and recovered. Then, the data of the pages in the specific block other than the specific pages P11 and the recovery data are sequentially saved into the replacement block BP21. - Further, if there is no recovery data saved in the volatile memory, then at step S160, efficiency values BEb of recovery and substitution of the blocks are calculated for selecting the specific block from the data area, and it is determined whether to save the data of the specific block into the replacement block according to the first threshold value.
- Specifically, the detailed flow of the step S160 is depicted as following. First, at step S161, the bit error weight values EDb recorded in the first form and the erasing times ECb recorded in the second form are calculated with a specific equation so as to obtain the efficiency values BEb of recovery and substitution. For example, when the efficiency value of recovery and substitution of the ith block is represented as BEbi, and the bit error weight value thereof is represented as EDbi, and the erasing times thereof is represented as ECbi, while the minimum erasing time of the
spare area 220 recorded in the second form is represented as MinEC (in case the memory is not divided into a data area and a spare area, then a block having a minimum erasing times is selected from all of the blocks according to the second form, and represented as MinEC), then the specific equation is defined as: -
BEbi=αEDbi+β(MinEC−ECbi) -
when (MinEC−ECbi)<0′β=0 equation (3) - in which i is a positive integer, α and β are factors.
- Then, at step S162, a block having a maximum efficiency value of recovery and substitution is selected from the data area, and taken as a specific block. It should be noted that in case the memory is not divided into a data area and a spare area, then a block having a maximum efficiency value of recovery and substitution is selected from all of the blocks according to the second form, and taken as a specific block. In other words, blocks in the data area having greater bit error weight values EDb have high priority to be selected as the specific block. Further, when an erasing time of a certain block is much smaller than the maximum erasing time of all blocks in the spare area, the certain block also has high priority to be selected as the specific block. Weights of the two priorities discussed above are normalized by the setting of the two factors α and β.
- Then, at step S163, it is determined whether the efficiency value of recovery and substitution of the specific block is greater than the first threshold value. When the efficiency value of recovery and substitution is smaller than the first threshold value, which indicates none of the blocks is required to be executed with a data recovery or data moving operation. In this case, step S190 is executed to stop all steps. In such a way, unnecessary writing operations executed to the blocks can be reduced, thus the lifetime of the memory can be improved. Correspondingly, when the efficiency value of recovery and substitution is greater than the first threshold value, then at step S164, the data of the specific block is read out and recovered, and the recovered data of the specific block is sequentially saved into the replacement block.
- Then, at step S170, a block exchange is executed between the specific block and the replacement block. For example, assuming that the block BP11 of the
data area 210 is the specific block, and the block BP21 of thespare area 220 is the replacement block, at step S170, a logical block address linked to the specific block BP11 is changed to be linked to the replacement block BP21. Further, the step S170 further clears the data of the specific block BP11, and moves the specific block BP11 which originally belongs to thedata area 210 to thespare area 220. - After the recovery and moving operations are completed, at step S180, it is determined whether the system to which the non-volatile memory belongs is in an idle status. When the system to which the non-volatile memory belongs is not in an idle status, the step S190 is executed to stop all steps. Correspondingly, when the system to which the non-volatile memory belongs is in the idle status, all steps are repeated until the system feeds back a busy status, or the maximum efficiency value of recovery and substitution of the blocks in the data area is smaller than the first threshold value.
-
FIG. 5 is a flow chart illustrating a data protection method according to another embodiment of the present invention. The data protection method is adapted for a plurality of pages of a plurality of blocks of a non-volatile memory. Referring toFIG. 5 , first at step S510, calculation results of error correction codes of several pages of the non-volatile memory are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory. - Then, at step S520, erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated. Then, at step S530, it is determined whether there is recovery data saved in the volatile memory. If there is a recovery data saved in the volatile memory, then the flow executes step S540, in which a block having a minimum erasing time is selected out from the blocks according to the second form as a replacement block. Then, at step S550, a block exchange operation is executed with respect to a specific block and the replacement block.
- Otherwise, if there is no recovery data saved in the volatile memory, the flow returns to the step S510, thus maintaining regular operation of the system. However, it should be noted that by executing the steps S520 and S540, those blocks having less erasing times would be released for being used as blocks for block exchange. In such a way, comparing with the conventional technologies, the present invention utilizes all blocks of the non-volatile memory in an average manner. Further, those skilled in the art may vary the flow of the steps given above by the embodiment of
FIG. 5 as desired in accordance with the spirit of the present invention. - For example,
FIG. 6 is a flow chart illustrating a data protection method obtained by modifying the embodiment ofFIG. 5 according to another embodiment of the present invention. Referring toFIG. 6 , the embodiment ofFIG. 6 differs from the embodiment ofFIG. 5 in that it finds out the replacement block (at step S540) and thereafter determines whether there is any recovery data saved in the volatile memory (at step S530). As such, when it is determined that there is a recovery data saved in the volatile memory, the flow ofFIG. 6 can directly execute the block exchange (step S550). Other details of the embodiment ofFIG. 6 are similar to that ofFIG. 5 , and are not to be iterated hereby. -
FIG. 7 is a flow chart illustrating a data protection method according to a further embodiment of the present invention. The data protection method ofFIG. 7 is adapted for a plurality of pages of a plurality of blocks of a non-volatile memory. Referring toFIG. 7 , first, at step S710, calculation results of error correction codes of the pages are used for updating bit error weight values of the blocks recorded in a first form, so as to determine whether to backup at least one recovery data to a volatile memory. Then, at step S720, erasing times of the blocks are recorded in a second form, and meanwhile the first form is updated. - Then, at step S730, a block having a minimum erasing time is selected out from the blocks according to the second form and is taken as a replacement block. At step S740, efficiency values of recovery and substitution of the blocks are then calculated so as to select a specific block, and compare the efficiency value of recovery and substitution of the specific block with a first threshold value for determining whether to save the data of the specific block into the replacement block. It should be further noted that when it is determined to save the data of the specific block into the replacement block, the flow executes step S750 to execute a block exchange with respect to the specific block and the replacement block. On the contrary, when it is determined not to save the data of the specific block into the replacement block, the flow returns back to step S710, thus maintaining regular operation of the system.
- In summary, the present invention determines the priority sequence of recovering data of the blocks when the system is in an idle status according to the bit error weight values of the blocks. Further, with respect to those blocks having less erasing times, the present invention moves the data thereof to other blocks, so as to release the blocks from the data area for use. In such a way, comparing with the conventional technologies, the present invention utilizes all blocks of the non-volatile memory in an average manner more, so as to further extend the lifetime of the non-volatile memory. Further, the present invention employs a more effective mechanism to provide optimal protection to the data saved in the volatile memory and averagely execute the erasing operations.
- It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims (12)
BEbi=αEDbi+β(MinEC−ECbi)
when (MinEC−ECbi)<0′β=0.
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| CN200810174866 | 2008-11-10 | ||
| CN2008101748669A CN101740123B (en) | 2008-11-10 | 2008-11-10 | Data protection method of memory |
| CN2008101748669 | 2008-11-10 |
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Cited By (2)
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| US20120137104A1 (en) * | 2009-08-28 | 2012-05-31 | Artek Microelectronics Co., Ltd. | Allocation method and apparatus of moderate memory |
| CN117707988A (en) * | 2023-08-08 | 2024-03-15 | 荣耀终端有限公司 | Method and device for recycling memory |
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| CN103229154A (en) * | 2010-08-17 | 2013-07-31 | 成都市华为赛门铁克科技有限公司 | Method, device and storage device for moving data in storage device |
| US8589730B2 (en) * | 2010-08-31 | 2013-11-19 | Apple Inc. | Handling errors during device bootup from a non-volatile memory |
| CN103577342B (en) * | 2012-07-25 | 2018-04-17 | 慧荣科技股份有限公司 | Method for managing data stored in flash memory and related memory device and controller |
| US9305663B2 (en) * | 2013-12-20 | 2016-04-05 | Netapp, Inc. | Techniques for assessing pass/fail status of non-volatile memory |
| US9348748B2 (en) * | 2013-12-24 | 2016-05-24 | Macronix International Co., Ltd. | Heal leveling |
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Also Published As
| Publication number | Publication date |
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| CN101740123A (en) | 2010-06-16 |
| US8230302B2 (en) | 2012-07-24 |
| CN101740123B (en) | 2012-04-04 |
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