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US20100055916A1 - Method for decapsulating package - Google Patents

Method for decapsulating package Download PDF

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Publication number
US20100055916A1
US20100055916A1 US12/617,708 US61770809A US2010055916A1 US 20100055916 A1 US20100055916 A1 US 20100055916A1 US 61770809 A US61770809 A US 61770809A US 2010055916 A1 US2010055916 A1 US 2010055916A1
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Prior art keywords
chip
solder bumps
underfill
etching process
active surface
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US12/617,708
Inventor
Tung-Yi Shih
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United Microelectronics Corp
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Individual
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Assigned to UNITED MICROELECTRONICS CORP. reassignment UNITED MICROELECTRONICS CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SHIH, TUNG-YI
Publication of US20100055916A1 publication Critical patent/US20100055916A1/en
Abandoned legal-status Critical Current

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    • H10W74/01
    • H10W72/071
    • H10W74/012
    • H10W74/15
    • H10W90/724
    • H10W90/734

Definitions

  • the present invention relates to a semiconductor process. More particularly, the present invention relates to a technology to detection of a method for decapsulating a package.
  • Integrated circuit (IC) packaging is a way of separating the IC chips on a wafer after the front-end semiconductor fabrication process, connecting the chips to individual lead frames and encapsulating the chips for a better protection.
  • the most common chip packaging technique includes the flip chip interconnect technology.
  • the method includes providing conductive bumps on the input/output (I/O) contacts of a chip and then flipping over the chip so that the bumps can directly contact a substrate.
  • the major advantages of the flip chip bonding technique are small area occupation, high lead count, short interconnect, low inductance and easy-to-control noise level.
  • the flip chip package is particularly suitable for producing high-speed, high-performance, light and compact device.
  • the package In order to perform a failure analysis on the package or to conduct a rework process on the package, it is necessary to decapsulate the package to be a chip without having the solder bumps and the underfill thereon.
  • the most common method for removing the underfill and the solder bumps is to grind or polish away the substrate from the chip and remove the underfill and the solder bumps as well.
  • the surface of the chip is easily damaged during the grinding or polishing process. Therefore, the electrical probing during the failure inspection is seriously affected by the grinding or polishing result.
  • the solder bumps are removed together with the underfill. Therefore, when the underfill is the only part needed to be rework, it is hard to remove the underfill but leave the solder bumps on the chip by using the grinding or polishing process.
  • none of the methods can remove the underfill completely without leaving the underfill residual on the chip or can remove the underfill completely without damaging the solder bumps. Furthermore, none of the methods can remove the solder bumps without damaging the metal pads on the chip or can remove the solder bumps without spending a lot of money.
  • At least one objective of the present invention is to provide a method for removing an underfill from a chip.
  • the underfill is completely removed without damaging the solder bumps.
  • At least another objective of the present invention is to provide a method for removing solder bumps from a chip. By applying the method according to the present invention, the solder bumps are removed without damaging the metal pads on the chip.
  • the other objective of the present invention is to provide a method for decapsulating a package without damaging a chip packed therein.
  • the invention provides a method for removing an underfill from a chip.
  • the method comprises steps of providing a chip having an active surface, wherein a plurality of solder bumps are disposed on the active surface of the chip and an underfill is disposed over the active surface and filling between the solder bumps.
  • a dry etching process is performed in an inert-gas environment to remove a portion of the underfill.
  • a wet etching process is performed to remove the rest portion of the underfill.
  • the dry etching process includes a reaction ion etching process.
  • the inert-gas environment includes an argon-gas environment.
  • the wet etching process is performed with the use of a fuming nitric acid.
  • the wet etching process is performed at a temperature of about 60 ⁇ 100° C. for about 30 seconds ⁇ 5 minutes.
  • the method further comprises a step of performing a purging process to clean the chip by using nitrogen gas.
  • the invention also provides a method for removing solder bumps from a chip.
  • the method comprises steps of providing a chip having an active surface, wherein a plurality of solder bumps is disposed on the active surface.
  • a thermal process is performed to melt the solder bumps and then a solder bump removal is performed to remove the melted solder bumps from the active surface of the chip.
  • the solder bump removal process includes a physical stripping-away process.
  • the physical stripping-away process is selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
  • the thermal process when the thermal process is performed at a pressure of about 1 atm, the thermal process is performed at a temperature of about 100 ⁇ 320° C.
  • the thermal process is performed in a thermal liquid type system.
  • the thermal liquid type system employs a vacuum oil.
  • the invention further provides a method for decapsulating a package.
  • the method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface.
  • the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a plurality of solder balls.
  • the heat sink is disposed over the rear surface of the chip.
  • the solder bumps are disposed on the active surface of the chip.
  • the substrate has a first surface connected with the chip through the solder bumps.
  • the underfill is disposed between the chip and the substrate and filling between the solder bumps.
  • the solder balls are disposed on a second surface of the substrate.
  • the method further comprises removing the heat sink and removing the substrate together with the solder balls.
  • a dry etching process is performed to remove a portion of the underfill.
  • a wet etching process is performed to remove the rest portion of the underfill.
  • a thermal process is performed to melt the solder bumps and then a solder bump removal process is performed to remove the melted solder bumps from the active surface of the chip.
  • the dry etching process includes a reaction ion etching process.
  • the reaction ion etching process is performed in an inert-gas environment.
  • the wet etching process is performed with the use of a fuming nitric acid.
  • the wet etching process is performed at a temperature of about 60 ⁇ 100° C. for about 30 seconds ⁇ 5 minutes.
  • the method further comprises a step of performing a purging process to clean the chip by using nitrogen gas before the solder bump removal process is performed.
  • the solder bump removal process includes a physical stripping-away process.
  • the physical stripping-away process is selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
  • the thermal process when the thermal process is performed at a pressure of about 1 atm, the thermal process is performed at a temperature of about 100 ⁇ 320° C.
  • the thermal process is performed in a thermal liquid type system.
  • the thermal liquid type system employs vacuum oil.
  • the underfill can be completely removed without damaging the solder bumps or leaving the underfill residual on the chip and the solder bumps can be removed without damaging the metal pads on the chips.
  • the performance of the reverse engineering, the rework process or the failure inspection process is not affected by the processes for removing the underfill and the solder bumps.
  • the solder bumps are removed by utilizing the physical property of the material of the solder bumps, the cost for removing the solder bumps is low.
  • FIG. 1 is a cross-sectional view schematically illustrating a package.
  • FIG. 2 is a process flow showing a method for removing an underfill from a chip according to one embodiment of the present invention.
  • FIG. 3 is a process flow showing a method for removing solder bumps from a chip according to one embodiment of the present invention.
  • FIG. 4 is a process flow showing a method for decapsulating a package according to one embodiment of the present invention.
  • FIG. 1 is a cross-sectional view schematically illustrating a package.
  • FIG. 2 is a process flow showing a method for removing an underfill from a chip according to one embodiment of the present invention.
  • a package 1 is provided.
  • the package 1 can be, for example, a flip-chip package.
  • the package 1 comprises a chip 100 and a substrate 106 .
  • the chip 100 further comprises an active surface 100 a and a rear surface 100 b .
  • the chip 100 is disposed over the substrate 106 in a way that the active surface 100 a is opposite to the substrate 106 .
  • There are several solder bumps 102 are disposed on the active surface of the chip 100 and between the chip 100 and the substrate 106 .
  • the substrate 106 is connected to the chip 100 through the solder bumps 102 .
  • an underfill 104 is further disposed between the substrate 106 and the chip 100 and filling between the solder bumps 102 .
  • a heat sink 110 is disposed on the rear surface 100 b of the chip 100 .
  • solder balls 108 are disposed on a surface of the substrate 106 other than the surface in contact with the solder bumps 102 .
  • step S 201 before the method for removing the underfill, the heat sink 110 and the substrate 106 with the solder balls 108 are removed to expose the rear surface 100 b of the chip 100 , the underfill 104 and the solder bumps 102 (step S 201 ). Then, by following the solid arrows, in the step S 202 , a dry etching process is performed to remove a portion of the underfill 104 (as shown in FIG. 1 ). Thereafter, in the step S 204 , a wet etching process is performed to remove the rest portion of the underfill 104 to expose a portion of the active surface 100 a of the chip 100 and the solder bumps 102 .
  • the underfill 104 can be removed by performing the wet etching process prior to the dry etching process. Then, in the step S 206 (following either the indication of the solid arrow or the indication of the dotted arrow), a purging process is performed to clean the chip 100 . Hence, the solder bumps 102 are fully exposed and a portion of the active surface 100 a of the chip 100 is exposed as well. Therefore, the failure inspection can be performed on the solder bumps 100 a.
  • the dry etching process can be, for example, a reaction ion etching process.
  • the dry etching process can be, for example, performed in an inert-gas environment, such as an argon-gas environment.
  • the wet etching process can be, for example, performed with the use of a fuming nitric acid at a temperature of about 60 ⁇ 100° C. for about 30 seconds ⁇ 5 minutes.
  • the purging process can be, for example, performed by spraying the nitrogen gas through a nozzle onto the chip.
  • the underfill is removed by only using the wet etching method so that it takes a lot of the time for removing the underfill from the chip. Therefore, the time for the solder bumps exposing under the corrosive solution of the wet etching process is long. Hence, the solder bumps are damaged at the time the underfill is removed.
  • the underfill is removed by dry etching only so that a portion of the underfill still remains on the chip. Therefore, inspection accuracy of the failure analysis is affected.
  • the wet etching process and the dry etching process are performed to remove the underfill.
  • the time for performing the wet etching process is short so that the solder bumps can be prevent from being damaged by the etchant.
  • the underfill residual left by the dry etching process can be completely removed.
  • FIG. 3 is a process flow showing a method for removing solder bumps from a chip according to one embodiment of the present invention.
  • the chip 100 with the solder bumps 102 is provided (step S 301 ).
  • the underfill 104 can be either remaining on the active surface 100 a of the chip 100 or removed beforehand.
  • a removal process including a thermal process S 303 a and a solder bump removal process S 303 b is performed to melt the solder bumps 102 and then to remove the melted solder bumps from the active surface 100 a of the chip 100 .
  • the solder bump removal process S 303 b includes a physical stripping-away process.
  • the physical stripping-away process can be selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
  • the thermal process S 303 a is performed at a pressure of about 1 atm, the thermal process S 303 a is performed at a temperature of about 100 ⁇ 320° C.
  • the thermal process is performed in a thermal liquid type system with the use of vacuum oil.
  • the thermal liquid such as vacuum oil
  • the solder bumps 102 melt in the thermal liquid and then the melted solder bumps are removed by using a physical tripping-away process mentioned above. Hence, the metal pads on the chip are exposed.
  • Table 1 shows the compositions and the melting points of three common solder bump materials. According to the material of the solder bumps, the process temperature of the solder bump removal process is varied.
  • the solder bumps are eroded by the solution and the metal pads on the chip are damaged by the solution as well. Furthermore, it is clearly shown in the experimental data that the removal performance of the nitric acid-based solution is poor for removing the solder bumps made of high-lead material. On the contrary, in the method of the present invention, the solder bumps are removed from the chip by using a method according to the physical property of the material of the solder bumps. Hence, the metal pads on the chip are not damaged and the cost for performing the solder bump removal process is low.
  • FIG. 4 is a process flow showing a method for decapsulating a package according to one embodiment of the present invention.
  • the method for decapsulating the package is the combination of the aforementioned method for removing the underfill (shown in FIG. 2 ) and the method for removing the solder bumps (shown in FIG. 3 ).
  • a package 1 shown in FIG. 1
  • the heat sink 110 is removed and the substrate 106 with the solder balls 108 is removed as well.
  • the underfill 104 is removed.
  • either the dry etching process (S 407 ) or the wet etching process (S 409 ) can be performed first. That is, by following the solid arrows, the dry etching process (S 409 ) is performed prior to the wet etching process (S 409 ). Alternatively, by following the dotted arrows, the wet etching process (S 409 ) is performed prior to the dry etching process (S 407 ).
  • a purging process is performed by spraying the nitrogen gas onto the chip through a nozzle to clean the surface of the chip 100 (S 411 ).
  • the method for removing the solder bumps 102 is performed (S 413 ).
  • a removal process including a thermal process S 415 a and a solder bump removal process S 415 b is performed to melt the solder bumps 102 and then to remove the melted solder bumps from the active surface 100 a of the chip 100 .
  • the recipes for the method for removing the underfill and the method for removing the solder bumps are as same as what have mentioned above and are not described herein.
  • the underfill can be completely removed without damaging the solder bumps or leaving the underfill residual on the chip and the solder bumps can be removed without damaging the metal pads on the chips.
  • the performance of the reverse engineering, the rework process or the failure inspection process is not affected by the processes for removing the underfill and the solder bumps.
  • the solder bumps are removed by utilizing the physical property of the material of the solder bumps, the cost for removing the solder bumps is low.

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

A method for decapsulating a package is provided. The method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface. Further, the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a plurality of solder balls. The method further comprises removing the heat sink and removing the substrate together with the solder balls. A dry etching process is performed to remove a portion of the underfill. A wet etching process is performed to remove the rest portion of the underfill. A thermal process solder bump removal process is performed to melt the solder bumps and then a solder bump removal process is performed to remove the melted solder bumps from the active surface of the chip.

Description

    CROSS REFERENCE TO RELATED APPLICATIONS
  • This is a continuation application of U.S. patent application Ser. No. 11/535,073, filed on Sep. 26, 2006, and all benefits of such earlier application are hereby claimed for this new continuation application.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a semiconductor process. More particularly, the present invention relates to a technology to detection of a method for decapsulating a package.
  • 2. Description of the Prior Art
  • Integrated circuit (IC) packaging is a way of separating the IC chips on a wafer after the front-end semiconductor fabrication process, connecting the chips to individual lead frames and encapsulating the chips for a better protection. At present, the most common chip packaging technique includes the flip chip interconnect technology. The method includes providing conductive bumps on the input/output (I/O) contacts of a chip and then flipping over the chip so that the bumps can directly contact a substrate. The major advantages of the flip chip bonding technique are small area occupation, high lead count, short interconnect, low inductance and easy-to-control noise level. As a result, the flip chip package is particularly suitable for producing high-speed, high-performance, light and compact device.
  • In order to perform a failure analysis on the package or to conduct a rework process on the package, it is necessary to decapsulate the package to be a chip without having the solder bumps and the underfill thereon. The most common method for removing the underfill and the solder bumps is to grind or polish away the substrate from the chip and remove the underfill and the solder bumps as well. However, the surface of the chip is easily damaged during the grinding or polishing process. Therefore, the electrical probing during the failure inspection is seriously affected by the grinding or polishing result. Furthermore, by using the grinding or polishing process, the solder bumps are removed together with the underfill. Therefore, when the underfill is the only part needed to be rework, it is hard to remove the underfill but leave the solder bumps on the chip by using the grinding or polishing process.
  • In order to remove the underfill without removing the solder bumps or to remove the solder bumps without damaging the underfill, the industry develops several ways. However, none of the methods can remove the underfill completely without leaving the underfill residual on the chip or can remove the underfill completely without damaging the solder bumps. Furthermore, none of the methods can remove the solder bumps without damaging the metal pads on the chip or can remove the solder bumps without spending a lot of money.
  • SUMMARY OF THE INVENTION
  • Accordingly, at least one objective of the present invention is to provide a method for removing an underfill from a chip. By applying the method according to the present invention, the underfill is completely removed without damaging the solder bumps.
  • At least another objective of the present invention is to provide a method for removing solder bumps from a chip. By applying the method according to the present invention, the solder bumps are removed without damaging the metal pads on the chip.
  • The other objective of the present invention is to provide a method for decapsulating a package without damaging a chip packed therein.
  • To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method for removing an underfill from a chip. The method comprises steps of providing a chip having an active surface, wherein a plurality of solder bumps are disposed on the active surface of the chip and an underfill is disposed over the active surface and filling between the solder bumps. A dry etching process is performed in an inert-gas environment to remove a portion of the underfill. A wet etching process is performed to remove the rest portion of the underfill.
  • According to one embodiment of the present invention, the dry etching process includes a reaction ion etching process.
  • According to one embodiment of the present invention, the inert-gas environment includes an argon-gas environment.
  • According to one embodiment of the present invention, the wet etching process is performed with the use of a fuming nitric acid.
  • According to one embodiment of the present invention, the wet etching process is performed at a temperature of about 60˜100° C. for about 30 seconds˜5 minutes.
  • According to one embodiment of the present invention, the method further comprises a step of performing a purging process to clean the chip by using nitrogen gas.
  • The invention also provides a method for removing solder bumps from a chip. The method comprises steps of providing a chip having an active surface, wherein a plurality of solder bumps is disposed on the active surface. A thermal process is performed to melt the solder bumps and then a solder bump removal is performed to remove the melted solder bumps from the active surface of the chip.
  • According to one embodiment of the present invention, the solder bump removal process includes a physical stripping-away process.
  • According to one embodiment of the present invention, the physical stripping-away process is selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
  • According to one embodiment of the present invention, when the thermal process is performed at a pressure of about 1 atm, the thermal process is performed at a temperature of about 100˜320° C.
  • According to one embodiment of the present invention, the thermal process is performed in a thermal liquid type system.
  • According to one embodiment of the present invention, the thermal liquid type system employs a vacuum oil.
  • The invention further provides a method for decapsulating a package. The method comprises steps of providing a package having a chip therein, wherein the chip has an active surface and a rear surface. Further, the package further comprises a heat sink, a plurality of solder bumps, a substrate, an underfill and a plurality of solder balls. The heat sink is disposed over the rear surface of the chip. The solder bumps are disposed on the active surface of the chip. The substrate has a first surface connected with the chip through the solder bumps. The underfill is disposed between the chip and the substrate and filling between the solder bumps. The solder balls are disposed on a second surface of the substrate. The method further comprises removing the heat sink and removing the substrate together with the solder balls. A dry etching process is performed to remove a portion of the underfill. A wet etching process is performed to remove the rest portion of the underfill. A thermal process is performed to melt the solder bumps and then a solder bump removal process is performed to remove the melted solder bumps from the active surface of the chip.
  • According to one embodiment of the present invention, the dry etching process includes a reaction ion etching process.
  • According to one embodiment of the present invention, the reaction ion etching process is performed in an inert-gas environment.
  • According to one embodiment of the present invention, the wet etching process is performed with the use of a fuming nitric acid.
  • According to one embodiment of the present invention, the wet etching process is performed at a temperature of about 60˜100° C. for about 30 seconds˜5 minutes.
  • According to one embodiment of the present invention, the method further comprises a step of performing a purging process to clean the chip by using nitrogen gas before the solder bump removal process is performed.
  • According to one embodiment of the present invention, the solder bump removal process includes a physical stripping-away process.
  • According to one embodiment of the present invention, the physical stripping-away process is selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
  • According to one embodiment of the present invention, when the thermal process is performed at a pressure of about 1 atm, the thermal process is performed at a temperature of about 100˜320° C.
  • According to one embodiment of the present invention, the thermal process is performed in a thermal liquid type system.
  • According to one embodiment of the present invention, the thermal liquid type system employs vacuum oil.
  • In the present invention, by applying the method for removing the underfill and the method for removing the solder bumps according to the present invention in the method for decapsulating the package, the underfill can be completely removed without damaging the solder bumps or leaving the underfill residual on the chip and the solder bumps can be removed without damaging the metal pads on the chips. Hence, the performance of the reverse engineering, the rework process or the failure inspection process is not affected by the processes for removing the underfill and the solder bumps. Furthermore, since the solder bumps are removed by utilizing the physical property of the material of the solder bumps, the cost for removing the solder bumps is low.
  • In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, a preferred embodiment accompanied with figures is described in detail below.
  • These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a cross-sectional view schematically illustrating a package.
  • FIG. 2 is a process flow showing a method for removing an underfill from a chip according to one embodiment of the present invention.
  • FIG. 3 is a process flow showing a method for removing solder bumps from a chip according to one embodiment of the present invention.
  • FIG. 4 is a process flow showing a method for decapsulating a package according to one embodiment of the present invention.
  • DETAILED DESCRIPTION
  • FIG. 1 is a cross-sectional view schematically illustrating a package. FIG. 2 is a process flow showing a method for removing an underfill from a chip according to one embodiment of the present invention. As shown in FIG. 1, a package 1 is provided. The package 1 can be, for example, a flip-chip package. Furthermore, the package 1 comprises a chip 100 and a substrate 106. The chip 100 further comprises an active surface 100 a and a rear surface 100 b. The chip 100 is disposed over the substrate 106 in a way that the active surface 100 a is opposite to the substrate 106. There are several solder bumps 102 are disposed on the active surface of the chip 100 and between the chip 100 and the substrate 106. That is, the substrate 106 is connected to the chip 100 through the solder bumps 102. Also, an underfill 104 is further disposed between the substrate 106 and the chip 100 and filling between the solder bumps 102. Moreover, on the rear surface 100 b of the chip 100, there is a heat sink 110. In addition, there are several solder balls 108 are disposed on a surface of the substrate 106 other than the surface in contact with the solder bumps 102.
  • As shown in FIG. 2, before the method for removing the underfill, the heat sink 110 and the substrate 106 with the solder balls 108 are removed to expose the rear surface 100 b of the chip 100, the underfill 104 and the solder bumps 102 (step S201). Then, by following the solid arrows, in the step S202, a dry etching process is performed to remove a portion of the underfill 104 (as shown in FIG. 1). Thereafter, in the step S204, a wet etching process is performed to remove the rest portion of the underfill 104 to expose a portion of the active surface 100 a of the chip 100 and the solder bumps 102. Alternatively, by following the dotted arrows, the underfill 104 can be removed by performing the wet etching process prior to the dry etching process. Then, in the step S206 (following either the indication of the solid arrow or the indication of the dotted arrow), a purging process is performed to clean the chip 100. Hence, the solder bumps 102 are fully exposed and a portion of the active surface 100 a of the chip 100 is exposed as well. Therefore, the failure inspection can be performed on the solder bumps 100 a.
  • It should be noticed that the dry etching process can be, for example, a reaction ion etching process. Also, the dry etching process can be, for example, performed in an inert-gas environment, such as an argon-gas environment. Furthermore, the wet etching process can be, for example, performed with the use of a fuming nitric acid at a temperature of about 60˜100° C. for about 30 seconds˜5 minutes. In addition, the purging process can be, for example, performed by spraying the nitrogen gas through a nozzle onto the chip.
  • In the conventional underfill removal process, the underfill is removed by only using the wet etching method so that it takes a lot of the time for removing the underfill from the chip. Therefore, the time for the solder bumps exposing under the corrosive solution of the wet etching process is long. Hence, the solder bumps are damaged at the time the underfill is removed. As for another conventional method for removing the underfill, the underfill is removed by dry etching only so that a portion of the underfill still remains on the chip. Therefore, inspection accuracy of the failure analysis is affected. By comparing to the conventional underfill removal process, in the present invention, the wet etching process and the dry etching process are performed to remove the underfill. Therefore, the time for performing the wet etching process is short so that the solder bumps can be prevent from being damaged by the etchant. In addition, because of the assistance of the wet etching, the underfill residual left by the dry etching process can be completely removed.
  • When the package failure happens on the chip, it is necessary to remove the solder bumps from the chip for further examination. FIG. 3 is a process flow showing a method for removing solder bumps from a chip according to one embodiment of the present invention. As shown in FIG. 3, the chip 100 with the solder bumps 102 is provided (step S301). It should be noticed that, the underfill 104 can be either remaining on the active surface 100 a of the chip 100 or removed beforehand. Then, in the step S303, a removal process including a thermal process S303 a and a solder bump removal process S303 b is performed to melt the solder bumps 102 and then to remove the melted solder bumps from the active surface 100 a of the chip 100.
  • Notably, the solder bump removal process S303 b includes a physical stripping-away process. Also, the physical stripping-away process can be selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof. Moreover, when the thermal process S303 a is performed at a pressure of about 1 atm, the thermal process S303 a is performed at a temperature of about 100˜320° C. Furthermore, the thermal process is performed in a thermal liquid type system with the use of vacuum oil. That is, during the solder bump removal process, the thermal liquid, such as vacuum oil, is used as a heating medium and the solder bumps 102 melt in the thermal liquid and then the melted solder bumps are removed by using a physical tripping-away process mentioned above. Hence, the metal pads on the chip are exposed.
  • Taking the commercialized solder bump materials as examples, Table 1 shows the compositions and the melting points of three common solder bump materials. According to the material of the solder bumps, the process temperature of the solder bump removal process is varied.
  • TABLE 1
    Material Composition Melting points
    Eutectic Sn/Pb = 63/37 183° C.
    High lead Sn/Pb = 3/97, 10/90, 5/95 310~320° C.
    Lead free Major: Sn—Ag and Sn—Ag—Cu 221° C. (Sn/Ag)
    217° C. (Sn/Ag/Cu)
  • In addition, in the conventional method for removing the solder bumps from the chip with the use of a nitric acid-based solution, the solder bumps are eroded by the solution and the metal pads on the chip are damaged by the solution as well. Furthermore, it is clearly shown in the experimental data that the removal performance of the nitric acid-based solution is poor for removing the solder bumps made of high-lead material. On the contrary, in the method of the present invention, the solder bumps are removed from the chip by using a method according to the physical property of the material of the solder bumps. Hence, the metal pads on the chip are not damaged and the cost for performing the solder bump removal process is low.
  • FIG. 4 is a process flow showing a method for decapsulating a package according to one embodiment of the present invention. When a reverse engineering, a rework process or a failure inspection process is performed on the chip, the decapsulation of the package is performed. The method for decapsulating the package is the combination of the aforementioned method for removing the underfill (shown in FIG. 2) and the method for removing the solder bumps (shown in FIG. 3). As shown in FIG. 4, in the step S401, a package 1 (shown in FIG. 1) is provided. Then, in the step S403, the heat sink 110 is removed and the substrate 106 with the solder balls 108 is removed as well. Thereafter, in the step S405, the underfill 104 is removed. As mentioned above, in the method for removing the underfill 104, either the dry etching process (S407) or the wet etching process (S409) can be performed first. That is, by following the solid arrows, the dry etching process (S409) is performed prior to the wet etching process (S409). Alternatively, by following the dotted arrows, the wet etching process (S409) is performed prior to the dry etching process (S407). After the underfill 104 is removed, a purging process is performed by spraying the nitrogen gas onto the chip through a nozzle to clean the surface of the chip 100 (S411). Then, the method for removing the solder bumps 102 is performed (S413). As described above, in the step S415, a removal process including a thermal process S415 a and a solder bump removal process S415 b is performed to melt the solder bumps 102 and then to remove the melted solder bumps from the active surface 100 a of the chip 100. The recipes for the method for removing the underfill and the method for removing the solder bumps are as same as what have mentioned above and are not described herein.
  • By applying the method for removing the underfill and the method for removing the solder bumps according to the present invention in the method for decapsulating the package, the underfill can be completely removed without damaging the solder bumps or leaving the underfill residual on the chip and the solder bumps can be removed without damaging the metal pads on the chips. Hence, the performance of the reverse engineering, the rework process or the failure inspection process is not affected by the processes for removing the underfill and the solder bumps. Furthermore, since the solder bumps are removed by utilizing the physical property of the material of the solder bumps, the cost for removing the solder bumps is low.
  • The present invention has been disclosed above in the preferred embodiments, but is not limited to those. It is known to persons skilled in the art that some modifications and innovations may be made without departing from the spirit and scope of the present invention. Therefore, the scope of the present invention should be defined by the following claims.
  • Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims (12)

1. A method for removing an underfill from a chip, comprising:
providing a chip having an active surface, wherein a plurality of solder bumps are disposed on the active surface of the chip and an underfill is disposed over the active surface and filling between the solder bumps;
performing a dry etching process in an inert-gas environment to remove a portion of the underfill; and
performing a wet etching process to remove the rest portion of the underfill.
2. The method of claim 1, wherein the dry etching process includes a reaction ion etching process.
3. The method of claim 1, wherein the inert-gas environment includes an argon-gas environment.
4. The method of claim 1, wherein the wet etching process is performed with the use of a fuming nitric acid.
5. The method of claim 1, wherein the wet etching process is performed at a temperature of about 60˜100° C. for about 30 seconds˜5 minutes.
6. The method of claim 1 further comprising performing a purging process to clean the chip by using nitrogen gas.
7. A method for removing solder bumps from a chip, comprising:
providing a chip having an active surface, wherein a plurality of solder bumps are disposed on the active surface;
performing a thermal process to melt the solder bumps; and
performing a solder bump removal process to remove the melted solder bumps from the active surface of the chip.
8. The method of claim 7, wherein the solder bump removal process includes a physical stripping-away process.
9. The method of claim 8, wherein the physical stripping-away process is selected from a group consisting of a disturbing method, a gravity method, suction method, ultrasonic method and a combination thereof.
10. The method of claim 7, wherein, at a pressure of about 1 atm, the thermal process is performed at a temperature of about 100˜320° C.
11. The method of claim 7, wherein the thermal process is performed in a thermal liquid type system.
12. The method of claim 11, wherein the thermal liquid type system employs a vacuum oil.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106067437A (en) * 2015-04-21 2016-11-02 株式会社迪思科 Stripping means and ultrasonic activation angle
CN108878308A (en) * 2017-05-11 2018-11-23 上海新微技术研发中心有限公司 De-packaging method based on IGBT module
US10354985B2 (en) 2016-06-15 2019-07-16 Samsung Electronics Co., Ltd. Semiconductor device having stacked semiconductor chips and method for fabricating the same
US10362720B2 (en) * 2014-08-06 2019-07-23 Greene Lyon Group, Inc. Rotational removal of electronic chips and other components from printed wire boards using liquid heat media

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102044405B (en) * 2009-10-13 2012-08-08 中芯国际集成电路制造(上海)有限公司 Chip separation method in multi-chip pack
US20120313296A1 (en) * 2011-06-10 2012-12-13 Aliphcom Component protective overmolding
US9069380B2 (en) 2011-06-10 2015-06-30 Aliphcom Media device, application, and content management using sensory input
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US20140217157A1 (en) 2013-02-07 2014-08-07 Greene Lyon Group, Inc. Removal of electronic chips and other components from printed wire boards using liquid heat media
CN106783537A (en) * 2016-12-01 2017-05-31 武汉新芯集成电路制造有限公司 A kind of method for removing crystal column surface solder
CN116682758B (en) * 2023-06-02 2025-12-30 开芯半导体(深圳)有限公司 Chip desealing device and chip desealing method

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4474621A (en) * 1982-06-16 1984-10-02 International Telephone And Telegraph Corporation Method for low temperature ashing in a plasma
US5783098A (en) * 1996-05-31 1998-07-21 Nisene Technology Group Decapsulator and method for decapsulating plastic encapsulated device
JPH1161287A (en) * 1997-08-25 1999-03-05 Hitachi Ltd Waste printed circuit solder separator
US6358852B1 (en) * 2000-05-17 2002-03-19 Advanced Micro Devices, Inc. Decapsulation techniques for multi-chip (MCP) devices
US20020046855A1 (en) * 1999-03-18 2002-04-25 Colin Hatchard Underfill removal for easing separation of an integrated circuit device and package
US6429028B1 (en) * 2000-08-29 2002-08-06 Dpa Labs, Incorporated Process to remove semiconductor chips from a plastic package
US6467671B1 (en) * 1999-09-22 2002-10-22 Canon Kabushiki Kaisha Solder recovering method and solder recovering apparatus
US6709888B2 (en) * 2002-07-26 2004-03-23 Motorola, Inc. Method of decapsulating a packaged copper-technology integrated circuit
US20050028361A1 (en) * 2003-08-07 2005-02-10 Indium Corporation Of America Integrated underfill process for bumped chip assembly
US20050140026A1 (en) * 2001-09-07 2005-06-30 Salmon Peter C. Fabrication methods for electronic system modules
US20060134901A1 (en) * 2004-12-22 2006-06-22 National Starch And Chemical Investment Holding Corporation Hot-Melt Underfill Composition and Methos of Application
US7071012B2 (en) * 2003-07-05 2006-07-04 Micron Technology, Inc. Methods relating to the reconstruction of semiconductor wafers for wafer-level processing
US20060201910A1 (en) * 2004-12-22 2006-09-14 Nordson Corporation Methods for removing extraneous amounts of molding material from a substrate
US20070020815A1 (en) * 2005-07-22 2007-01-25 Raghunandan Chaware Process for exposing solder bumps on an underfill coated semiconductor
US7172977B1 (en) * 2004-11-15 2007-02-06 National Semiconductor Corporation Method for non-destructive removal of cured epoxy from wafer backside

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4474621A (en) * 1982-06-16 1984-10-02 International Telephone And Telegraph Corporation Method for low temperature ashing in a plasma
US5783098A (en) * 1996-05-31 1998-07-21 Nisene Technology Group Decapsulator and method for decapsulating plastic encapsulated device
JPH1161287A (en) * 1997-08-25 1999-03-05 Hitachi Ltd Waste printed circuit solder separator
US20020046855A1 (en) * 1999-03-18 2002-04-25 Colin Hatchard Underfill removal for easing separation of an integrated circuit device and package
US6467671B1 (en) * 1999-09-22 2002-10-22 Canon Kabushiki Kaisha Solder recovering method and solder recovering apparatus
US6358852B1 (en) * 2000-05-17 2002-03-19 Advanced Micro Devices, Inc. Decapsulation techniques for multi-chip (MCP) devices
US6429028B1 (en) * 2000-08-29 2002-08-06 Dpa Labs, Incorporated Process to remove semiconductor chips from a plastic package
US20050140026A1 (en) * 2001-09-07 2005-06-30 Salmon Peter C. Fabrication methods for electronic system modules
US6709888B2 (en) * 2002-07-26 2004-03-23 Motorola, Inc. Method of decapsulating a packaged copper-technology integrated circuit
US7071012B2 (en) * 2003-07-05 2006-07-04 Micron Technology, Inc. Methods relating to the reconstruction of semiconductor wafers for wafer-level processing
US20050028361A1 (en) * 2003-08-07 2005-02-10 Indium Corporation Of America Integrated underfill process for bumped chip assembly
US7172977B1 (en) * 2004-11-15 2007-02-06 National Semiconductor Corporation Method for non-destructive removal of cured epoxy from wafer backside
US20060134901A1 (en) * 2004-12-22 2006-06-22 National Starch And Chemical Investment Holding Corporation Hot-Melt Underfill Composition and Methos of Application
US20060201910A1 (en) * 2004-12-22 2006-09-14 Nordson Corporation Methods for removing extraneous amounts of molding material from a substrate
US20070020815A1 (en) * 2005-07-22 2007-01-25 Raghunandan Chaware Process for exposing solder bumps on an underfill coated semiconductor

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10362720B2 (en) * 2014-08-06 2019-07-23 Greene Lyon Group, Inc. Rotational removal of electronic chips and other components from printed wire boards using liquid heat media
US11343950B2 (en) 2014-08-06 2022-05-24 Greene Lyon Group, Inc. Rotational removal of electronic chips and other components from printed wire boards using liquid heat media
CN106067437A (en) * 2015-04-21 2016-11-02 株式会社迪思科 Stripping means and ultrasonic activation angle
CN106067437B (en) * 2015-04-21 2021-05-25 株式会社迪思科 Peeling method and ultrasonic vibration angle
US10354985B2 (en) 2016-06-15 2019-07-16 Samsung Electronics Co., Ltd. Semiconductor device having stacked semiconductor chips and method for fabricating the same
US10923465B2 (en) 2016-06-15 2021-02-16 Samsung Electronics Co., Ltd. Semiconductor device having stacked semiconductor chips and method for fabricating the same
CN108878308A (en) * 2017-05-11 2018-11-23 上海新微技术研发中心有限公司 De-packaging method based on IGBT module

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