US20090057265A1 - Method of manufacturing multilayer printed circuit board - Google Patents
Method of manufacturing multilayer printed circuit board Download PDFInfo
- Publication number
- US20090057265A1 US20090057265A1 US12/230,219 US23021908A US2009057265A1 US 20090057265 A1 US20090057265 A1 US 20090057265A1 US 23021908 A US23021908 A US 23021908A US 2009057265 A1 US2009057265 A1 US 2009057265A1
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- sintered bodies
- via holes
- ones
- insulating substrates
- sintered
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- 239000002245 particle Substances 0.000 claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims description 58
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 32
- 238000010168 coupling process Methods 0.000 claims description 23
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 18
- 229910052709 silver Inorganic materials 0.000 claims description 18
- 239000004332 silver Substances 0.000 claims description 18
- 238000010438 heat treatment Methods 0.000 claims description 14
- 230000002776 aggregation Effects 0.000 claims description 10
- 238000004220 aggregation Methods 0.000 claims description 10
- 230000008878 coupling Effects 0.000 claims description 10
- 238000005859 coupling reaction Methods 0.000 claims description 10
- 239000002904 solvent Substances 0.000 claims description 9
- 238000003825 pressing Methods 0.000 claims description 7
- 238000005245 sintering Methods 0.000 claims description 7
- 230000008569 process Effects 0.000 description 44
- 239000011347 resin Substances 0.000 description 33
- 229920005989 resin Polymers 0.000 description 33
- 229910052718 tin Inorganic materials 0.000 description 24
- 239000002184 metal Substances 0.000 description 21
- 229910052751 metal Inorganic materials 0.000 description 21
- 238000005530 etching Methods 0.000 description 9
- 230000001681 protective effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000004696 Poly ether ether ketone Substances 0.000 description 5
- 239000004697 Polyetherimide Substances 0.000 description 5
- 229920002530 polyetherether ketone Polymers 0.000 description 5
- 229920001601 polyetherimide Polymers 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 230000005856 abnormality Effects 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 239000007790 solid phase Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 239000011230 binding agent Substances 0.000 description 2
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 229940116411 terpineol Drugs 0.000 description 2
- 229910017692 Ag3Sn Inorganic materials 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000012459 cleaning agent Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000011874 heated mixture Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 230000003578 releasing effect Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000006104 solid solution Substances 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0263—Details about a collection of particles
- H05K2201/0272—Mixed conductive particles, i.e. using different conductive particles, e.g. differing in shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
Definitions
- the present invention relates to a method of manufacturing a multilayer printed circuit board.
- via holes provided in a plurality of resin films are filled with a conductive paste.
- the conductive paste includes metal particles, an organic solvent, and resin that functions as a binder.
- Each of the resin films has a circuit pattern layer.
- the resin films are stacked and the multilayered circuit patterns are electrically coupled through the conductive paste as described, for example, in U.S. Pat. No. 6,889,433 corresponding to JP-A-2001-24323.
- a protective film is attached to a surface of the resin film.
- the protective film is removed from the resin film after drying the organic solvent in the conductive paste.
- the conductive paste may collapse or may fall on the resin film. Thereby, a conducting abnormality or a short circuit abnormality may occur.
- a conductive paste having a high metal content rate is used for improving a conductivity of connecting portions, the above-descried disadvantage becomes more serious.
- a plurality of insulating substrates each having a first surface and a second surface is prepared.
- a circuit pattern is formed on each of the first surfaces of the plurality of insulating substrates to form the plurality of the circuit patterns.
- a plurality of via holes is provided so as to extend through respective ones of the plurality of insulating substrates from a side of the second surfaces in such a manner that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns.
- Ones of a plurality of sintered bodies is inserted into corresponding ones of the plurality of via holes, in which the plurality of sintered bodies is formed by sintering a plurality of aggregation of conductive particles.
- the plurality of sintered bodies is fixed into the plurality of via holes.
- the plurality of insulating substrates is stacked and the plurality of circuit patterns is electrically coupled through the plurality of sintered bodies.
- the circuit patterns can be electrically coupled without filling a conductive paste into the via holes.
- a protective film that is used for filling the conductive paste is not required, and thereby the manufacturing process can be simplified.
- a fall of the conductive paste or a spill of the conductive paste, which can possibly occur when the protective film is removed, can be prevented.
- a plurality of insulating substrates each having a first surface and a second surface is prepared.
- a circuit pattern is formed on each of the first surfaces of the plurality of insulating substrates to form the plurality of the circuit patterns.
- a plurality of via holes is provided so as to extend through respective ones of the plurality of insulating substrates from a side of the second surfaces in such a manner that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns.
- Ones of a plurality of sintered bodies is inserted into corresponding ones of the plurality of via holes, in which the plurality of sintered bodies is formed by sintering a plurality of aggregation of conductive particles and the plurality of sintered bodies has a height that is less than a depth of the plurality of via holes.
- the plurality of insulating substrates is stacked in such a manner that ones of the plurality of circuit patterns is fitted into corresponding ones of the plurality of via holes.
- the stacked insulating substrates are pressed during heating so that the ones of the plurality of the circuit patterns comes in contact with corresponding ones of the plurality of sintered bodies in the corresponding ones of the plurality of via holes and the plurality of circuit patterns is electrically coupled through the plurality of sintered bodies.
- FIG. 1A-FIG . 1 E are cross-sectional diagrams illustrating an exemplary manufacturing process of a multilayer printed circuit board according to a first embodiment
- FIG. 2A and FIG. 2B are diagrams illustrating an exemplary sintered-body inserting process
- FIG. 3 is a diagram illustrating an exemplary sintered-body fixing process
- FIG. 4 is a diagram illustrating an exemplary circuit-pattern coupling process
- FIG. 5A and FIG. 5B are diagrams illustrating an exemplary circuit-pattern coupling process according to a second embodiment.
- FIG. 6A to FIG. 6D are diagrams illustrating an exemplary manufacturing process of sintered bodies according to a third embodiment.
- a method of manufacturing a multilayer printed circuit board according to a first embodiment will be described with reference to FIG. 1A to FIG. 4 .
- a conductive metal layer 2 is attached on a first surface of an insulation resin film 1 that functions as an insulating substrate.
- the resin film 1 is a thermoplastic resin film having a thickness between about 25 ⁇ m and about 75 ⁇ m.
- the resin film 1 consists of between about 65% and about 35% polyether ether ketone resin and between about 35% and about 65% polyetherimide resin by weight.
- the metal layer 2 is made of copper and has a thickness about 18 ⁇ m, for example.
- a circuit-pattern forming process for forming a circuit pattern 3 on the first surface of the resin film 1 is performed.
- the circuit-pattern forming process can be performed by etching, printing, deposition, or plating.
- the circuit pattern 3 is formed by an etching process.
- the metal layer 2 is etched from the first surface side of the resin film 1 as illustrated in FIG. 1B . Thereby, a first circuit pattern film 10 is formed.
- a via-hole providing process is performed by irradiating a carbon gas laser from a second surface side of the resin film 1 .
- a plurality of via holes 4 is provided so as to extend through the resin film 1 and the circuit pattern 3 becomes the bottom of the via holes 4 .
- a second pattern film 20 is formed.
- An opening diameter of the via holes 4 is determined in such a manner that one of sintered bodies 5 can be inserted into corresponding ones of the via holes 4 in a sintered-body inserting process.
- the opening diameter is larger than the maximum dimension of the sintered bodies 5 .
- the sintered bodies 5 may have a sphere shape, a column shape, a rectangular solid shape, or cube shape, for example.
- Portions of the circuit pattern 3 that are located at the bottom of the via holes 4 function as electrodes when multilayered circuit patterns 3 are electrically coupled in a circuit-pattern coupling process.
- an output power and an irradiation time of the carbon gas laser is controlled so that a hole does not extend in the circuit pattern 3 .
- an excimer laser can be used for providing the via holes 4 , for example.
- the via-hole providing process may be also performed by using a drill.
- the via holes 4 can be made small and excessive damage to the circuit pattern 3 can be prevented.
- the sintered bodies 5 are formed by sintering aggregations of conducting particles.
- the sintered bodies 5 may have a height same as open ends of the via holes 4 , for example. Alternatively, the sintered bodies 5 may slightly protrude from the open ends of the via holes 4 .
- Each of the via holes 4 is provide to have a clearance between an inner surface of the via hole 4 and an outer surface of sintered body 5 . In the present case, when the sintered bodies 5 are deformed in a sintered-body fixing process, the deformation amount can be let into the clearance.
- the aggregations are formed from several kinds of conducting particles under a pressurized condition so as to have a predetermined shape and a predetermined size. Then, the aggregations are heated at a temperature under a melting point. Thereby, the conductive particles have a bonding force therebetween and the aggregations are solidified.
- the sintered bodies 5 inserted in the via holes 4 become coupling members 6 in the circuit-pattern coupling process.
- the conducting particles include silver (Ag) particles and tin (Sn) particles.
- a tin content of the whole conducing particles is in a range from about 20% to about 80% by weight.
- tin content is in a range from about 30% to about 50% by weight.
- alloy layers provided between bonded interfaces of the aggregations become thin.
- a valance between a conductive property and a bonding property may become worse compared with a case where the tin content is in a range from about 20% to about 80%.
- the tin content is in a range from about 30% to about 50% by weight, the valance between the conductive property and the bonding property is improved.
- a mixture of the tin particles and the silver particles are heated at a high temperature.
- the heated mixture is sprayed on a rotating disk and is dispersed by centrifugal force so as to have a predetermined particle size.
- the spheres of the mixture are cooled to a predetermined temperature.
- the sphere-shaped sintered bodies 5 including Ag 3 Sn and Ag.Sn solid solution are formed.
- each sintered body 5 When the thickness of the resin film 1 is expressed by thickness T, the maximum dimension of each sintered body 5 is in a range from T to 1.4 T. During experimentation, superior results are observed when the maximum dimension of each sintered body 5 is in a range from T to 1.3 T. In a case where each sintered body 5 has a sphere shape, the maximum dimension is a diameter. When each sintered body 5 has the maximum dimension in a range from T to 1.4 T, the conductive property and the bonding property are appropriate as a sintered body made of tin particles and silver particles.
- the sintered bodies 5 are formed to have a diameter of 90 ⁇ m.
- the diameters of the sintered bodies 5 are within a range from T to 1.4 T.
- the sintered-body inserting process will now be described with reference to FIGS. 2A and 2B .
- the sintered-body inserting process is performed by using an inserting apparatus, for example.
- the inserting apparatus includes a metal mask 63 , and a rotational moving body 60 .
- the metal mask 63 has a plurality of through holes 64 .
- the rotational moving body 60 includes a rotating part 61 and a curtain part 62 that hangs from the rotating part 61 .
- the inserting apparatus introduces the sintered bodies 5 into the via holes 4 one by one.
- a diameter of the through holes 64 is set in such a manner that ones of the sintered bodies 5 can fall through corresponding ones of the through holes 64 .
- the through holes 64 extend through the metal mask 63 so as to correspond to the via holes 4 extend through the second pattern film 20 .
- the second pattern film 20 is positioned with respect to the metal mask 63 in such a manner the via holes 4 correspond to the through holes 64 respectively.
- the sintered bodies 5 more than the number of via holes 4 are disposed on a surface of the metal mask 63 .
- the rotational moving body 60 is moved toward the through holes 64 while rotating the rotating part 61 .
- the sintered bodies 5 are introduced into the through holes 64 by the curtain part 62 that moves while rotating.
- the sintered bodies 5 introduced to the through holes 64 fall through the through holes 64 one by one and are fitted into the via holes 4 .
- the third circuit pattern film 30 in which the sintered bodies 5 are disposed in the via holes 4 is formed.
- the sintered bodies 5 may also be arranged in the via holes 4 of the second circuit pattern film 20 without using the metal mask 63 and excess sintered bodies 5 remaining on the surface of the second circuit pattern film 20 may be removed by using a squeegee.
- the sintered bodies 5 are deformed in the via holes 4 as illustrated in FIG. 1E .
- the coupling members 6 are formed and are fixed in the via holes 4 .
- a fourth circuit pattern film 40 is formed.
- the sintered-body fixing process can be performed by using various methods.
- the sintered bodies 5 may be fixed by deformation into the via holes 4 by pressing.
- the sintered bodies 5 may also be fixed by surface tension using a solvent applied between the sintered bodies 5 and the inner surfaces of the via holes 4 .
- the tin particles may be dispersed from a surface of the silver particles by applying an ultrasonic vibration or may be melted from the surface of the silver particles by heating in a predetermined temperature.
- the term “fix” means that the sintered bodies 5 have sufficient fixed power whereby movement is prevented even with an external force applied. As a result, the circuit-pattern coupling process can be performed successfully without the sintered bodies 5 falling out of position.
- the coupling members 6 may also be formed by roll-pressing.
- a pressure is applied to a surface of the third circuit pattern film 30 by moving a roller 50 from one side to the other side while rotating. Thereby, the sintered bodies 5 are deformed to fit inner shapes of the via holes 4 .
- the circuit patterns 3 of a plurality of circuit pattern films are electrically coupled.
- the first circuit pattern film 10 is disposed on a plurality of, for example, two fourth circuit pattern films 40 .
- the first circuit pattern film 10 and the two fourth circuit pattern films 40 are stacked in such a manner that each first surface, on which the circuit pattern 3 is formed, is arranged on a downside and the circuit patterns 3 face coupling members 6 of adjacent circuit pattern film.
- a pressure is applied to an upper surface of the first circuit pattern film 10 and a lower surface of the lowest fourth circuit pattern film 40 during heating by using a vacuum heating pressing apparatus.
- the vacuum heating pressing is performed at a temperature in a range from about 250 degrees centigrade to about 350 degrees centigrade, under a pressure in a range from 1 MPa to about 10 MPa, for a time in a range from about 10 minutes to about 20 minutes.
- the two fourth pattern films 40 and the first circuit pattern film 10 are heat-sealed and are integrated.
- a multilayer printed circuit board 100 is formed as illustrated in FIG. 4 .
- the circuit patterns 3 of adjacent circuit pattern films are electrically coupled through the coupling members 6 in the via holes 4 .
- the coupling members 6 in the via holes 4 are welded with pressure to the surfaces of the circuit patterns 3 that are located the bottom of the via holes 4 .
- the tin component in the coupling members 6 and the copper component of the circuit patterns 3 are mutually solid-phase diffused, and a solid-phase diffusion layer is provided between the coupling members 6 and the circuit patterns 3 .
- the multilayered circuit patterns 3 can be electrically coupled.
- the present manufacturing method of the multilayer printed circuit board 100 includes the etching process, the via-hole providing process, the sintered-body inserting process, the sintered-body fixing process, and the circuit-pattern coupling process.
- the circuit pattern 3 is formed by etching the metal layer 2 that is attached to the first surface of the resin film 1 .
- the via-hole providing process the via holes 4 are provided in the resin film 1 from the second surface side so as to reach the circuit pattern 3 .
- the sintered-body inserting process ones of the sintered bodies 5 made of the conducting particles are inserted into corresponding ones of the via holes 4 .
- the sintered bodies 5 are fixed in the via holes 4 so as to be attached to the surface of the circuit pattern 3 located at the bottom of the via holes 4 .
- the fourth circuit pattern film 40 is formed.
- a plurality of fourth circuit pattern films 40 are stacked, and the multilayered circuit patterns 3 are electrically coupled through the coupling members 6 made of the sintered bodies 5 .
- the sintered bodies 5 each having the predetermined dimension are disposed in the via holes 4 .
- a conductive substance can be stably fixed in the via holes 4 . Therefore, a deficiency of the conductive substance or a collapse of the conductive substance in the via holes 4 can be restricted.
- a spill of the conductive substance from the via holes 4 can be restricted.
- the circuit patterns 3 can be electrically coupled without filling a conductive paste into the via holes 4 , a protective film that is used for filling the conductive paste is not required.
- the manufacturing process can be simplified. Furthermore, a fall of the conductive paste or a spill of the conductive paste, which can possibly occur when the protective film is removed, can be prevented.
- a manufacturing method of a multilayer printed circuit board 100 A according to a second embodiment of the invention will now be described.
- a via-hole providing process, a sintered-body inserting process, and a circuit-pattern coupling process are different from those processes described in the first embodiment.
- the sintered-body fixing process described in the first embodiment is not required in the present manufacturing method.
- Other processes are similar to those process described in the first embodiment. Thus, a description of the other processes will be omitted.
- the via holes 4 are provided to have such an opening diameter that a circuit patterns 3 A of an adjacent circuit film can be fitted into the via holes 4 in the circuit-pattern coupling process.
- the sintered bodies 5 A In the sintered-body inserting process, ones of sintered bodies 5 A that have components similar to the sintered bodies 5 is inserted into corresponding ones of the via holes 4 . Accordingly, a third circuit pattern film 30 A is formed.
- the sintered bodies 5 A has a height that is less than a depth of the via holes 4 . Thus, the sintered bodies 5 A do not protrude from the open ends of the via holes 4 to an outside of the resin film 1 .
- an upper surface (i.e., exposed surface) of each of the sintered bodies 5 disposed in the via holes 4 are positioned below a surface around the open end of corresponding ones of the via holes 4 at a predetermined distance.
- the predetermined distance is less than or equal to a thickness of the circuit patterns 3 A.
- the dimension of the sintered bodies 5 A is different from the sintered bodies 5 in the first embodiment.
- the sintered bodies 5 A can be formed in a manner similar to the sintered bodies 5 .
- circuit-pattern coupling process is performed as illustrated in FIG. 5A and FIG. 5B .
- a first circuit pattern film 10 A is disposed on a plurality of, for example, three third circuit pattern films 30 A and 30 B.
- the third pattern film 30 B has the circuit pattern 3 similarly to the third pattern film 30 illustrated in FIG. 1C .
- the first circuit pattern film 10 A and the third circuit pattern films 30 A and 30 B are stacked in such a manner that each first surface, on which the circuit pattern 3 or 3 A is formed, is arranged on the downside and each circuit pattern 3 A is fitted into the via hole 4 located under each circuit pattern 3 A.
- Each circuit pattern 3 A of the third circuit pattern films 30 A contacts the sintered body 5 in the via hole 4 .
- An upper surface of the first circuit pattern film 10 A and a lower surface of the third pattern film 30 B are pressed during heating by using a vacuum heating pressing apparatus.
- the vacuum heating pressing is performed at a temperature in a range from about 250 degrees centigrade to about 350 degrees centigrade, under a pressure in a range from about 1 MPa to about 10 MPa, for a time in a range from about 10 minutes and 20 minutes.
- the third pattern films 30 A and 30 B and the first circuit pattern film 10 A are heat-sealed and are integrated.
- the multilayer printed circuit board 100 A is formed as illustrated in FIG. 5B .
- the circuit patterns 3 and 3 A of adjacent circuit pattern films are electrically coupled through the sintered bodies 5 A in the via holes 4 .
- the sintered bodies 5 A disposed in the via holes 4 are applied with a predetermined pressure, the sintered bodies 5 A contact the surface of the circuit patterns 3 A.
- the tin component in the sintered bodies 5 and the copper component of the circuit patterns 3 and 3 A are mutually solid-phase diffused, and a solid-phase diffusion layer is provided between the sintered bodies 5 A and the circuit patterns 3 and 3 A.
- the multilayer circuit patterns 3 and 3 A can be electrically coupled.
- the present manufacturing method of the multilayer printed circuit board 100 A includes the etching process, the via-hole providing process, the sintered-body inserting process, and the circuit-pattern coupling process.
- the circuit pattern 3 A is formed by etching the metal layer 2 that is attached to the first surface of the resin film 1 .
- the via-hole providing process the via holes 4 are provided so as to extend through the resin film 1 from the second surface side so as to reach the circuit pattern 3 A.
- the sintered-body inserting process ones of the sintered bodies 5 A is inserted into corresponding ones of the via holes 4 , and thereby the circuit pattern films 30 A is formed.
- each sintered body 5 has such a dimension that the each sintered body 5 does not protrude from the via hole 4 to the outside.
- the third circuit pattern films 30 A are hot-pressed in a state where the circuit patterns 3 A contact the sintered bodies 5 A in the via holes 4 . Thereby, the multilayered circuit patterns 3 are electrically coupled.
- the effect similar to the first embodiment can be obtained.
- the manufacturing process can be simplified.
- a manufacturing method of sintered body according to a third embodiment of the invention will be described with reference to FIG. 6A to FIG. 6D .
- the sintered bodies manufactured by the present manufacturing method can be used for the manufacturing method of the multilayer printed circuit board according to the first and the second embodiments.
- tin particles 71 and silver particles 73 are added to a solvent 72 and are mixed to form a conductive paste 70 .
- the silver particles 73 have an average particle size of about 1 ⁇ m and a specific surface area of about 1.2 m 2 /g.
- the tin particles 71 have an average particle size of about 5 ⁇ m and a specific surface area of about 0.5 m 2 /g.
- the solvent 72 includes terpineol, for example.
- a resin component including the solvent 72 functions as a binder for holding a shape of the whole conductive particles.
- the tin content of the whole conductive particles may be similar to the tin content of the first embodiment.
- a content ratio of the silver particles 73 to the tin particles 71 is about 65:35.
- the conductive paste 70 including an aggregation of the conductive particles is formed to have a predetermined shape by paste printing with a metal mask 80 .
- the metal mask 80 has a plurality of through holes 81 having the predetermined shape.
- each through hole 81 has a depth of about 50 ⁇ m and an inner diameter of about 100 ⁇ m.
- the metal mask 80 is disposed on a substrate 82 having a releasing property.
- the substrate 82 is made of fluorine resin.
- a predetermined amount of the conductive paste 70 that includes the tin particle 71 , the silver particles 73 , and the solvent 72 is provided on a surface of the metal mask 80 .
- the conductive paste 70 is spread on the whole surface of metal mask 80 by using a brush 83 . Thereby, the conductive paste 70 is filled into the through holes 81 of the metal mask 80 as illustrated in FIG. 6A .
- Each disk has a side shape substantially same as an inner surface of the through holes 81 and a height substantially same as a thickness of the metal mask 80 .
- the disk-shaped conductive pastes 70 are sintered at a temperature about 260 degrees centigrade.
- sintered bodies 74 are formed.
- the heat treatment can be performed by using a general reflow furnace, a vapor reflow furnace, an atmosphere firing furnace, or a box furnace, for example.
- the heat treatment may be performed in a reductive atmosphere for preventing an oxidation of the thin component.
- the solvent 72 including terpineol is evaporated and is dried, and the tin particles 71 and the silver particles 73 are mixed.
- a melting point of the tin particles 71 is about 232 degrees centigrade.
- the tin particles 71 are melted and attach to surfaces of the silver particles 73 .
- the heat treatment is kept in the above-described state, the melted tin is diffused from the surface of the silver particles. Thereby, sintered bodies 74 made of tin and silver is formed.
- the sintered bodies 74 is cleaned with a cleaning agent 83 for removing carbide.
- the cleaned sintered bodies 74 are dried, and thereby the sintered bodies 5 and 5 A used for the sintered-body inserting process are provided.
- the conductive paste 70 that includes the tin particles 71 , the silver particle 73 , and the solvent 72 is formed into the predetermined shape and is sintered by the heat treatment. Then the sintered bodies 74 are cleaned for removing carbide, and thereby the sintered bodies 5 and 5 A used for the sintered-body inserting process are provided.
- the sintered bodies 5 and 5 A are shaped using the metal mask 80 .
- the sintered bodies 5 and 5 A can be produced in large quantities with a high degree of accuracy, and a conductive property and a bonding property of the multilayer printed circuit boards 100 and 100 A are improved.
- the resin film 1 consists of between about 65% and 35% polyether ether ketone resin and between about 35% and 65% polyetherimide resin by weight, as an example.
- the resin film 1 may also include polyether ether ketone resin, polyetherimide resin, and a nonconductive filler.
- the resin film 1 may include polyether ether ketone (PEEK) or polyetherimide (PEI).
- the multilayer printed circuit board 100 according to the first embodiment has three layers and the multilayer printed circuit board 100 A according to the second embodiment has four layers, as an example.
- the number of the multilayer circuit board is not limited to the above examples as long as each of the multilayer printed circuit boards 100 and 100 A has multilayered circuit patterns.
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Abstract
In a method of manufacturing a multilayer printed circuit board, a plurality of insulating substrates each having a first surface and a second surface is prepared. A circuit pattern is formed on each of the first surfaces of the insulating substrates. A plurality of via holes is provided so as to extend through respective ones of the insulating substrates from a side of the second surfaces in such a manner that the via holes reach corresponding ones of the circuit patterns. Ones of a plurality of sintered bodies made of conductive particles is inserted into corresponding ones of the via holes and is fixed in the via holes. The insulating substrates are stacked so that the circuit patterns are electrically coupled through the sintered bodies.
Description
- The present application is based on and claims priority to Japanese Patent Application No. 2007-224596 filed on Aug. 30, 2007, the contents of which are incorporated in their entirety herein by reference.
- 1. Field of the Invention
- The present invention relates to a method of manufacturing a multilayer printed circuit board.
- 2. Description of the Related Art
- In a conventional manufacturing method of a multilayer printed circuit board, via holes provided in a plurality of resin films are filled with a conductive paste. The conductive paste includes metal particles, an organic solvent, and resin that functions as a binder. Each of the resin films has a circuit pattern layer. The resin films are stacked and the multilayered circuit patterns are electrically coupled through the conductive paste as described, for example, in U.S. Pat. No. 6,889,433 corresponding to JP-A-2001-24323.
- In the present manufacturing method, when the conductive paste is filled into the via holes, a protective film is attached to a surface of the resin film. Thereby, the conductive paste is prevented from attaching to the surface of the resin film except for the via holes. The protective film is removed from the resin film after drying the organic solvent in the conductive paste.
- However, when the protective film is removed, the conductive paste may collapse or may fall on the resin film. Thereby, a conducting abnormality or a short circuit abnormality may occur. Particularly, when a conductive paste having a high metal content rate is used for improving a conductivity of connecting portions, the above-descried disadvantage becomes more serious.
- In view of the foregoing problems, it is an object of the present invention to provide a manufacturing method of a multilayer printed circuit board that can prevent a conducting abnormality due to an insufficient conductive paste or a short circuit abnormality due to a fallen conductive paste.
- In accordance with a first aspect of a method of manufacturing a multilayer printed circuit board, a plurality of insulating substrates each having a first surface and a second surface is prepared. A circuit pattern is formed on each of the first surfaces of the plurality of insulating substrates to form the plurality of the circuit patterns. A plurality of via holes is provided so as to extend through respective ones of the plurality of insulating substrates from a side of the second surfaces in such a manner that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns. Ones of a plurality of sintered bodies is inserted into corresponding ones of the plurality of via holes, in which the plurality of sintered bodies is formed by sintering a plurality of aggregation of conductive particles. The plurality of sintered bodies is fixed into the plurality of via holes. The plurality of insulating substrates is stacked and the plurality of circuit patterns is electrically coupled through the plurality of sintered bodies.
- In the present manufacturing method, the circuit patterns can be electrically coupled without filling a conductive paste into the via holes. Thus, a protective film that is used for filling the conductive paste is not required, and thereby the manufacturing process can be simplified. Furthermore, a fall of the conductive paste or a spill of the conductive paste, which can possibly occur when the protective film is removed, can be prevented.
- In accordance with a second aspect of a method of manufacturing a multilayer printed circuit board, a plurality of insulating substrates each having a first surface and a second surface is prepared. A circuit pattern is formed on each of the first surfaces of the plurality of insulating substrates to form the plurality of the circuit patterns. A plurality of via holes is provided so as to extend through respective ones of the plurality of insulating substrates from a side of the second surfaces in such a manner that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns. Ones of a plurality of sintered bodies is inserted into corresponding ones of the plurality of via holes, in which the plurality of sintered bodies is formed by sintering a plurality of aggregation of conductive particles and the plurality of sintered bodies has a height that is less than a depth of the plurality of via holes. The plurality of insulating substrates is stacked in such a manner that ones of the plurality of circuit patterns is fitted into corresponding ones of the plurality of via holes. The stacked insulating substrates are pressed during heating so that the ones of the plurality of the circuit patterns comes in contact with corresponding ones of the plurality of sintered bodies in the corresponding ones of the plurality of via holes and the plurality of circuit patterns is electrically coupled through the plurality of sintered bodies.
- In the present manufacturing method, effects similar to the manufacturing method according to the first aspect can be obtained. In addition, because a process for fixing the sintered bodies into the via holes is performed at the same time where the multilayered circuit patterns are electrically coupled, the manufacturing process can be further simplified.
- Additional objects and advantages of the present invention will be more readily apparent from the following detailed description of preferred embodiments when taken together with the accompanying drawings. In the drawings:
-
FIG. 1A-FIG . 1E are cross-sectional diagrams illustrating an exemplary manufacturing process of a multilayer printed circuit board according to a first embodiment; -
FIG. 2A andFIG. 2B are diagrams illustrating an exemplary sintered-body inserting process; -
FIG. 3 is a diagram illustrating an exemplary sintered-body fixing process; -
FIG. 4 is a diagram illustrating an exemplary circuit-pattern coupling process; -
FIG. 5A andFIG. 5B are diagrams illustrating an exemplary circuit-pattern coupling process according to a second embodiment; and -
FIG. 6A toFIG. 6D are diagrams illustrating an exemplary manufacturing process of sintered bodies according to a third embodiment. - A method of manufacturing a multilayer printed circuit board according to a first embodiment will be described with reference to
FIG. 1A toFIG. 4 . - At first, as illustrated in
FIG. 1A , aconductive metal layer 2 is attached on a first surface of aninsulation resin film 1 that functions as an insulating substrate. Theresin film 1 is a thermoplastic resin film having a thickness between about 25 μm and about 75 μm. For example, theresin film 1 consists of between about 65% and about 35% polyether ether ketone resin and between about 35% and about 65% polyetherimide resin by weight. Themetal layer 2 is made of copper and has a thickness about 18 μm, for example. - Then, a circuit-pattern forming process for forming a
circuit pattern 3 on the first surface of theresin film 1 is performed. For example, the circuit-pattern forming process can be performed by etching, printing, deposition, or plating. In the present embodiment, thecircuit pattern 3 is formed by an etching process. In the etching process, themetal layer 2 is etched from the first surface side of theresin film 1 as illustrated inFIG. 1B . Thereby, a firstcircuit pattern film 10 is formed. - Next, as illustrated in
FIG. 1C , a via-hole providing process is performed by irradiating a carbon gas laser from a second surface side of theresin film 1. Thereby, a plurality of viaholes 4 is provided so as to extend through theresin film 1 and thecircuit pattern 3 becomes the bottom of the via holes 4. Accordingly, asecond pattern film 20 is formed. An opening diameter of the via holes 4 is determined in such a manner that one ofsintered bodies 5 can be inserted into corresponding ones of the via holes 4 in a sintered-body inserting process. Thus, the opening diameter is larger than the maximum dimension of thesintered bodies 5. Thesintered bodies 5 may have a sphere shape, a column shape, a rectangular solid shape, or cube shape, for example. - Portions of the
circuit pattern 3 that are located at the bottom of the via holes 4 function as electrodes whenmultilayered circuit patterns 3 are electrically coupled in a circuit-pattern coupling process. When the via holes 4 are provided, an output power and an irradiation time of the carbon gas laser is controlled so that a hole does not extend in thecircuit pattern 3. - As a substitute for the carbon gas laser, an excimer laser can be used for providing the via holes 4, for example. The via-hole providing process may be also performed by using a drill. By using a laser beam, the via holes 4 can be made small and excessive damage to the
circuit pattern 3 can be prevented. - Next, in a sintered-body inserting process, ones of the
sintered bodies 5 is inserted into corresponding ones of the via holes 4, as illustrated inFIG. 1D . Accordingly, a thirdcircuit pattern film 30 is formed. Thesintered bodies 5 are formed by sintering aggregations of conducting particles. Thesintered bodies 5 may have a height same as open ends of the via holes 4, for example. Alternatively, thesintered bodies 5 may slightly protrude from the open ends of the via holes 4. Each of the via holes 4 is provide to have a clearance between an inner surface of the viahole 4 and an outer surface ofsintered body 5. In the present case, when thesintered bodies 5 are deformed in a sintered-body fixing process, the deformation amount can be let into the clearance. - In order to form the
sintered bodies 5, the aggregations are formed from several kinds of conducting particles under a pressurized condition so as to have a predetermined shape and a predetermined size. Then, the aggregations are heated at a temperature under a melting point. Thereby, the conductive particles have a bonding force therebetween and the aggregations are solidified. Thesintered bodies 5 inserted in the via holes 4 becomecoupling members 6 in the circuit-pattern coupling process. - In the present embodiment, the conducting particles include silver (Ag) particles and tin (Sn) particles. A tin content of the whole conducing particles is in a range from about 20% to about 80% by weight. During experimentation, superior results are observed when the tin content is in a range from about 30% to about 50% by weight. When the tin content is less than about 20% by weight or when the tin content is greater than about 80% by weight, alloy layers provided between bonded interfaces of the aggregations become thin. Thus, a valance between a conductive property and a bonding property may become worse compared with a case where the tin content is in a range from about 20% to about 80%. When the tin content is in a range from about 30% to about 50% by weight, the valance between the conductive property and the bonding property is improved.
- In a process for forming the
sintered bodies 5 to have a sphere shape, a mixture of the tin particles and the silver particles are heated at a high temperature. The heated mixture is sprayed on a rotating disk and is dispersed by centrifugal force so as to have a predetermined particle size. Then, the spheres of the mixture are cooled to a predetermined temperature. Thereby, the sphere-shapedsintered bodies 5 including Ag3Sn and Ag.Sn solid solution are formed. - When the thickness of the
resin film 1 is expressed by thickness T, the maximum dimension of eachsintered body 5 is in a range from T to 1.4 T. During experimentation, superior results are observed when the maximum dimension of eachsintered body 5 is in a range from T to 1.3 T. In a case where each sinteredbody 5 has a sphere shape, the maximum dimension is a diameter. When each sinteredbody 5 has the maximum dimension in a range from T to 1.4 T, the conductive property and the bonding property are appropriate as a sintered body made of tin particles and silver particles. For example, when theresin film 1 has a thickness of 75 μm and thecircuit pattern 3 made of a copper film has a thickness of 18 μm, thesintered bodies 5 are formed to have a diameter of 90 μm. In the present case, even if thesintered bodies 5 have production variations, the diameters of thesintered bodies 5 are within a range from T to 1.4 T. - The sintered-body inserting process will now be described with reference to
FIGS. 2A and 2B . The sintered-body inserting process is performed by using an inserting apparatus, for example. - The inserting apparatus includes a
metal mask 63, and a rotational movingbody 60. Themetal mask 63 has a plurality of throughholes 64. The rotational movingbody 60 includes arotating part 61 and acurtain part 62 that hangs from therotating part 61. The inserting apparatus introduces thesintered bodies 5 into the via holes 4 one by one. A diameter of the throughholes 64 is set in such a manner that ones of thesintered bodies 5 can fall through corresponding ones of the through holes 64. The through holes 64 extend through themetal mask 63 so as to correspond to the via holes 4 extend through thesecond pattern film 20. - At first, the
second pattern film 20 is positioned with respect to themetal mask 63 in such a manner the via holes 4 correspond to the throughholes 64 respectively. Then, thesintered bodies 5 more than the number of viaholes 4 are disposed on a surface of themetal mask 63. The rotational movingbody 60 is moved toward the throughholes 64 while rotating therotating part 61. Thesintered bodies 5 are introduced into the throughholes 64 by thecurtain part 62 that moves while rotating. Thesintered bodies 5 introduced to the throughholes 64 fall through the throughholes 64 one by one and are fitted into the via holes 4. Thereby, the thirdcircuit pattern film 30 in which thesintered bodies 5 are disposed in the via holes 4 is formed. - Alternatively, the
sintered bodies 5 may also be arranged in the via holes 4 of the secondcircuit pattern film 20 without using themetal mask 63 and excesssintered bodies 5 remaining on the surface of the secondcircuit pattern film 20 may be removed by using a squeegee. - Then, in a sintered-body fixing process, the
sintered bodies 5 are deformed in the via holes 4 as illustrated inFIG. 1E . Thereby, thecoupling members 6 are formed and are fixed in the via holes 4. Accordingly, a fourthcircuit pattern film 40 is formed. - The sintered-body fixing process can be performed by using various methods. For example, the
sintered bodies 5 may be fixed by deformation into the via holes 4 by pressing. Thesintered bodies 5 may also be fixed by surface tension using a solvent applied between thesintered bodies 5 and the inner surfaces of the via holes 4. The tin particles may be dispersed from a surface of the silver particles by applying an ultrasonic vibration or may be melted from the surface of the silver particles by heating in a predetermined temperature. It should be noted that the term “fix” means that thesintered bodies 5 have sufficient fixed power whereby movement is prevented even with an external force applied. As a result, the circuit-pattern coupling process can be performed successfully without thesintered bodies 5 falling out of position. - The
coupling members 6 may also be formed by roll-pressing. In the present case, as illustrated inFIG. 3 , a pressure is applied to a surface of the thirdcircuit pattern film 30 by moving aroller 50 from one side to the other side while rotating. Thereby, thesintered bodies 5 are deformed to fit inner shapes of the via holes 4. - Next, in the circuit-pattern coupling process, the
circuit patterns 3 of a plurality of circuit pattern films are electrically coupled. At first, the firstcircuit pattern film 10 is disposed on a plurality of, for example, two fourthcircuit pattern films 40. The firstcircuit pattern film 10 and the two fourthcircuit pattern films 40 are stacked in such a manner that each first surface, on which thecircuit pattern 3 is formed, is arranged on a downside and thecircuit patterns 3face coupling members 6 of adjacent circuit pattern film. Then, a pressure is applied to an upper surface of the firstcircuit pattern film 10 and a lower surface of the lowest fourthcircuit pattern film 40 during heating by using a vacuum heating pressing apparatus. For example, the vacuum heating pressing is performed at a temperature in a range from about 250 degrees centigrade to about 350 degrees centigrade, under a pressure in a range from 1 MPa to about 10 MPa, for a time in a range from about 10 minutes to about 20 minutes. - Thereby, the two
fourth pattern films 40 and the firstcircuit pattern film 10 are heat-sealed and are integrated. As a result, a multilayer printedcircuit board 100 is formed as illustrated inFIG. 4 . In the multilayer printedcircuit board 100, thecircuit patterns 3 of adjacent circuit pattern films are electrically coupled through thecoupling members 6 in the via holes 4. - The
coupling members 6 in the via holes 4 are welded with pressure to the surfaces of thecircuit patterns 3 that are located the bottom of the via holes 4. Thus, the tin component in thecoupling members 6 and the copper component of thecircuit patterns 3 are mutually solid-phase diffused, and a solid-phase diffusion layer is provided between thecoupling members 6 and thecircuit patterns 3. Thus, themultilayered circuit patterns 3 can be electrically coupled. - As described above, the present manufacturing method of the multilayer printed
circuit board 100 includes the etching process, the via-hole providing process, the sintered-body inserting process, the sintered-body fixing process, and the circuit-pattern coupling process. In the etching process, thecircuit pattern 3 is formed by etching themetal layer 2 that is attached to the first surface of theresin film 1. In the via-hole providing process, the via holes 4 are provided in theresin film 1 from the second surface side so as to reach thecircuit pattern 3. In the sintered-body inserting process, ones of thesintered bodies 5 made of the conducting particles are inserted into corresponding ones of the via holes 4. In the sintered-body fixing process, thesintered bodies 5 are fixed in the via holes 4 so as to be attached to the surface of thecircuit pattern 3 located at the bottom of the via holes 4. Thereby, the fourthcircuit pattern film 40 is formed. In the circuit-pattern coupling process, a plurality of fourthcircuit pattern films 40 are stacked, and themultilayered circuit patterns 3 are electrically coupled through thecoupling members 6 made of thesintered bodies 5. - In the present manufacturing method, the
sintered bodies 5 each having the predetermined dimension are disposed in the via holes 4. Thus, a conductive substance can be stably fixed in the via holes 4. Therefore, a deficiency of the conductive substance or a collapse of the conductive substance in the via holes 4 can be restricted. In addition, a spill of the conductive substance from the via holes 4 can be restricted. Because thecircuit patterns 3 can be electrically coupled without filling a conductive paste into the via holes 4, a protective film that is used for filling the conductive paste is not required. Thus, the manufacturing process can be simplified. Furthermore, a fall of the conductive paste or a spill of the conductive paste, which can possibly occur when the protective film is removed, can be prevented. - A manufacturing method of a multilayer printed
circuit board 100A according to a second embodiment of the invention will now be described. In the present manufacturing method, a via-hole providing process, a sintered-body inserting process, and a circuit-pattern coupling process are different from those processes described in the first embodiment. In addition, the sintered-body fixing process described in the first embodiment is not required in the present manufacturing method. Other processes are similar to those process described in the first embodiment. Thus, a description of the other processes will be omitted. - In the present via-hole providing process, the via holes 4 are provided to have such an opening diameter that a
circuit patterns 3A of an adjacent circuit film can be fitted into the via holes 4 in the circuit-pattern coupling process. - In the sintered-body inserting process, ones of
sintered bodies 5A that have components similar to thesintered bodies 5 is inserted into corresponding ones of the via holes 4. Accordingly, a thirdcircuit pattern film 30A is formed. Thesintered bodies 5A has a height that is less than a depth of the via holes 4. Thus, thesintered bodies 5A do not protrude from the open ends of the via holes 4 to an outside of theresin film 1. - That is, an upper surface (i.e., exposed surface) of each of the
sintered bodies 5 disposed in the via holes 4 are positioned below a surface around the open end of corresponding ones of the via holes 4 at a predetermined distance. The predetermined distance is less than or equal to a thickness of thecircuit patterns 3A. The dimension of thesintered bodies 5A is different from thesintered bodies 5 in the first embodiment. However, thesintered bodies 5A can be formed in a manner similar to thesintered bodies 5. - Following to the sintered-body inserting process, the circuit-pattern coupling process is performed as illustrated in
FIG. 5A andFIG. 5B . - At first, a first
circuit pattern film 10A is disposed on a plurality of, for example, three third 30A and 30B. For example, thecircuit pattern films third pattern film 30B has thecircuit pattern 3 similarly to thethird pattern film 30 illustrated inFIG. 1C . The firstcircuit pattern film 10A and the third 30A and 30B are stacked in such a manner that each first surface, on which thecircuit pattern films 3 or 3A is formed, is arranged on the downside and eachcircuit pattern circuit pattern 3A is fitted into the viahole 4 located under eachcircuit pattern 3A. - Each
circuit pattern 3A of the thirdcircuit pattern films 30A contacts thesintered body 5 in the viahole 4. An upper surface of the firstcircuit pattern film 10A and a lower surface of thethird pattern film 30B are pressed during heating by using a vacuum heating pressing apparatus. For example, the vacuum heating pressing is performed at a temperature in a range from about 250 degrees centigrade to about 350 degrees centigrade, under a pressure in a range from about 1 MPa to about 10 MPa, for a time in a range from about 10 minutes and 20 minutes. - Thereby, the
30A and 30B and the firstthird pattern films circuit pattern film 10A are heat-sealed and are integrated. As a result, the multilayer printedcircuit board 100A is formed as illustrated inFIG. 5B . In the multilayer printedcircuit board 100A, the 3 and 3A of adjacent circuit pattern films are electrically coupled through thecircuit patterns sintered bodies 5A in the via holes 4. - Because the
sintered bodies 5A disposed in the via holes 4 are applied with a predetermined pressure, thesintered bodies 5A contact the surface of thecircuit patterns 3A. Thus, the tin component in thesintered bodies 5 and the copper component of the 3 and 3A are mutually solid-phase diffused, and a solid-phase diffusion layer is provided between thecircuit patterns sintered bodies 5A and the 3 and 3A. Thus, thecircuit patterns 3 and 3A can be electrically coupled.multilayer circuit patterns - As described above, the present manufacturing method of the multilayer printed
circuit board 100A includes the etching process, the via-hole providing process, the sintered-body inserting process, and the circuit-pattern coupling process. In the etching process, thecircuit pattern 3A is formed by etching themetal layer 2 that is attached to the first surface of theresin film 1. In the via-hole providing process, the via holes 4 are provided so as to extend through theresin film 1 from the second surface side so as to reach thecircuit pattern 3A. In the sintered-body inserting process, ones of thesintered bodies 5A is inserted into corresponding ones of the via holes 4, and thereby thecircuit pattern films 30A is formed. In the present case, each sinteredbody 5 has such a dimension that the each sinteredbody 5 does not protrude from the viahole 4 to the outside. In the circuit-pattern coupling process, the thirdcircuit pattern films 30A are hot-pressed in a state where thecircuit patterns 3A contact thesintered bodies 5A in the via holes 4. Thereby, themultilayered circuit patterns 3 are electrically coupled. - In the present manufacturing method, the effect similar to the first embodiment can be obtained. In addition, because a process for fixing the
sintered bodies 5A in the via holes 4 is performed at the same time where themultilayered circuit patterns 3A are electrically coupled, the manufacturing process can be simplified. - A manufacturing method of sintered body according to a third embodiment of the invention will be described with reference to
FIG. 6A toFIG. 6D . The sintered bodies manufactured by the present manufacturing method can be used for the manufacturing method of the multilayer printed circuit board according to the first and the second embodiments. - At first,
tin particles 71 andsilver particles 73 are added to a solvent 72 and are mixed to form aconductive paste 70. For example, thesilver particles 73 have an average particle size of about 1 μm and a specific surface area of about 1.2 m2/g. Thetin particles 71 have an average particle size of about 5 μm and a specific surface area of about 0.5 m2/g. The solvent 72 includes terpineol, for example. A resin component including the solvent 72 functions as a binder for holding a shape of the whole conductive particles. The tin content of the whole conductive particles may be similar to the tin content of the first embodiment. For example, a content ratio of thesilver particles 73 to thetin particles 71 is about 65:35. - The
conductive paste 70 including an aggregation of the conductive particles is formed to have a predetermined shape by paste printing with ametal mask 80. Themetal mask 80 has a plurality of throughholes 81 having the predetermined shape. For example, each throughhole 81 has a depth of about 50 μm and an inner diameter of about 100 μm. Themetal mask 80 is disposed on asubstrate 82 having a releasing property. For example, thesubstrate 82 is made of fluorine resin. A predetermined amount of theconductive paste 70 that includes thetin particle 71, thesilver particles 73, and the solvent 72 is provided on a surface of themetal mask 80. Then, theconductive paste 70 is spread on the whole surface ofmetal mask 80 by using abrush 83. Thereby, theconductive paste 70 is filled into the throughholes 81 of themetal mask 80 as illustrated inFIG. 6A . - When the
metal mask 80 is lifted on a vertical direction, a plurality ofconductive pastes 70 having a disk shape remain on thesubstrate 82 as illustrated inFIG. 6B . Each disk has a side shape substantially same as an inner surface of the throughholes 81 and a height substantially same as a thickness of themetal mask 80. - Next, as illustrated in
FIG. 6C , the disk-shaped conductive pastes 70 are sintered at a temperature about 260 degrees centigrade. Thereby, sinteredbodies 74 are formed. The heat treatment can be performed by using a general reflow furnace, a vapor reflow furnace, an atmosphere firing furnace, or a box furnace, for example. The heat treatment may be performed in a reductive atmosphere for preventing an oxidation of the thin component. - When the
conductive pastes 70 are sintered, the solvent 72 including terpineol is evaporated and is dried, and thetin particles 71 and thesilver particles 73 are mixed. A melting point of thetin particles 71 is about 232 degrees centigrade. Thus, when the heating temperature becomes 260 degree centigrade, thetin particles 71 are melted and attach to surfaces of thesilver particles 73. When the heat treatment is kept in the above-described state, the melted tin is diffused from the surface of the silver particles. Thereby, sinteredbodies 74 made of tin and silver is formed. - Next, as illustrated in
FIG. 6D , thesintered bodies 74 is cleaned with acleaning agent 83 for removing carbide. The cleaned sinteredbodies 74 are dried, and thereby the 5 and 5A used for the sintered-body inserting process are provided.sintered bodies - As described above, the
conductive paste 70 that includes thetin particles 71, thesilver particle 73, and the solvent 72 is formed into the predetermined shape and is sintered by the heat treatment. Then thesintered bodies 74 are cleaned for removing carbide, and thereby the 5 and 5A used for the sintered-body inserting process are provided.sintered bodies - In the present manufacturing method, the
5 and 5A are shaped using thesintered bodies metal mask 80. Thus, the 5 and 5A can be produced in large quantities with a high degree of accuracy, and a conductive property and a bonding property of the multilayer printedsintered bodies 100 and 100A are improved.circuit boards - Although the present invention has been fully described in connection with the preferred embodiments thereof with reference to the accompanying drawings, it is to be noted that various changes and modifications will become apparent to those skilled in the art.
- In the above-described first and the second embodiments, the
resin film 1 consists of between about 65% and 35% polyether ether ketone resin and between about 35% and 65% polyetherimide resin by weight, as an example. Theresin film 1 may also include polyether ether ketone resin, polyetherimide resin, and a nonconductive filler. Alternatively, theresin film 1 may include polyether ether ketone (PEEK) or polyetherimide (PEI). - The multilayer printed
circuit board 100 according to the first embodiment has three layers and the multilayer printedcircuit board 100A according to the second embodiment has four layers, as an example. The number of the multilayer circuit board is not limited to the above examples as long as each of the multilayer printed 100 and 100A has multilayered circuit patterns.circuit boards
Claims (15)
1. A method of manufacturing a multilayer printed circuit board, comprising:
preparing a plurality of insulating substrates each having a first surface and a second surface;
forming a circuit pattern on each of the first surfaces of the plurality of insulating substrates to form a plurality of the circuit patterns;
providing a plurality of via holes that extend through respective ones of the plurality of insulating substrates from a side of the second surfaces such that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns;
inserting ones of a plurality of sintered bodies into corresponding ones of the plurality of via holes, the plurality of sintered bodies formed by sintering a plurality of aggregation of conductive particles;
fixing the plurality of sintered bodies into the plurality of via holes; and
stacking the plurality of insulating substrates and electrically coupling the plurality of circuit patterns through the plurality of sintered bodies.
2. The method according to claim 1 , wherein
the conductive particles include silver particles and tin particles.
3. The method according to claim 2 , wherein
a tin content of the whole conductive particles is in a range from about 20% to about 80% by weight.
4. The method according to claim 3 , wherein
the tin content of the whole conductive particles is in a range from about 30% to about 50% by weight.
5. The method according to claim 1 , wherein
a ratio of a maximum dimension of each of the plurality of sintered bodies to a thickness of each of the plurality of insulating substrates is in a range from about 1 to about 1.4.
6. The method according to claim 5 , wherein
the ratio of the maximum dimension of the each of the plurality of sintered bodies to the thickness of the each of the plurality of insulating substrates is in a range from about 1 to about 1.3.
7. The method according to claim 1 , wherein
each of the plurality of sintered bodies is deformed when the plurality of sintered bodies is fixed into the plurality of via holes.
8. The method according to claim 7 , wherein:
the ones of the plurality of sintered bodies and the corresponding ones of the plurality of via holes have a clearance therebetween when the ones of the plurality of sintered bodies is inserted into the corresponding ones of the plurality of via holes; and
the deformation amount of the plurality of sintered bodies is let into the clearance when the plurality of sintered bodies is fixed into the plurality of via holes.
9. The method according to claim 1 , wherein a manufacturing method of the plurality of sintered bodies includes:
mixing the conductive particles that includes silver particles and tin particles with a solvent to provide a paste;
forming the paste into a predetermined shape by using a mask;
sintering the paste; and
rinsing the sintered paste for removing a carbide.
10. A method of manufacturing a multilayer printed circuit board, comprising:
preparing a plurality of insulating substrates each having a first surface and a second surface;
forming a circuit pattern on each of the first surfaces of the plurality of insulating substrates to form the plurality of circuit patterns;
providing a plurality of via holes that extend through respective ones of the plurality of insulating substrates from a side of the second surfaces such that the plurality of via holes reaches corresponding ones of the plurality of the circuit patterns;
inserting ones of a plurality of sintered bodies into corresponding ones of the plurality of via holes, the plurality of sintered bodies formed by sintering a plurality of aggregation of conductive particles, the plurality of sintered bodies having a height that is less than a depth of the plurality of via holes;
stacking the plurality of insulating substrates in such a manner that ones of the plurality of the circuit patterns is fitted into corresponding ones of the plurality of via holes; and
pressing the stacked insulating substrates during heating so that the ones of the plurality of the circuit patterns comes in contact with corresponding ones of the plurality of the sintered bodies in the corresponding via holes and the plurality of circuit patterns is electrically coupled through the plurality of sintered bodies.
11. The method according to claim 10 , wherein
the conductive particles include silver particles and tin particles.
12. The method according to claim 11 , wherein
a tin content of the whole conductive particles is in a range from about 20% to about 80% by weight.
13. The method according to claim 12 , wherein
the tin content of the whole conductive particles is in a range from about 30% to about 50% by weight.
14. The method according to claim 10 , wherein:
an exposed surface of the ones of the plurality of sintered bodies is positioned at a predetermined distance from an open end of the corresponding ones of the plurality of via holes when the ones of the plurality of sintered bodies is inserted into the corresponding ones of the plurality of via holes; and
the predetermined distance is less than or equal to a thickness of the plurality of the circuit patterns.
15. The method according to claim 10 , wherein a manufacturing method of the plurality of sintered bodies includes:
mixing the conductive particles that includes silver particles and tin particles with a solvent to provide a paste;
forming the paste into a predetermined shape by using a mask;
sintering the paste; and
rinsing the sintered paste for removing a carbide.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007224596A JP2009059814A (en) | 2007-08-30 | 2007-08-30 | Manufacturing method of multilayer printed board |
| JP2007-224596 | 2007-08-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US20090057265A1 true US20090057265A1 (en) | 2009-03-05 |
Family
ID=40299369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US12/230,219 Abandoned US20090057265A1 (en) | 2007-08-30 | 2008-08-26 | Method of manufacturing multilayer printed circuit board |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20090057265A1 (en) |
| JP (1) | JP2009059814A (en) |
| KR (1) | KR20090023130A (en) |
| CN (1) | CN101378634A (en) |
| DE (1) | DE102008045003A1 (en) |
| TW (1) | TW200930197A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120012371A1 (en) * | 2009-04-02 | 2012-01-19 | Panasonic Corporation | Manufacturing method for circuit board, and circuit board |
| US20150359106A1 (en) * | 2012-12-31 | 2015-12-10 | Amogreentech | Flexible printed circuit board and method for manufacturing same |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011018728A (en) * | 2009-07-08 | 2011-01-27 | Fujikura Ltd | Laminated wiring board, and method of manufacturing the same |
| JP2011018727A (en) * | 2009-07-08 | 2011-01-27 | Fujikura Ltd | Circuit wiring board, and method of manufacturing the same |
| JP2013123031A (en) * | 2011-11-07 | 2013-06-20 | Denso Corp | Conductive material and semiconductor device |
| CN103796418B (en) * | 2012-10-31 | 2016-12-21 | 重庆方正高密电子有限公司 | A kind of circuit board and the manufacture method of circuit board |
| DE102013208387A1 (en) * | 2013-05-07 | 2014-11-13 | Robert Bosch Gmbh | Silver composite sintered pastes for low temperature sintered joints |
| KR101882576B1 (en) | 2016-06-02 | 2018-07-27 | 한양대학교 산학협력단 | Light sintering device having protecting damage to substrate |
| CN114446168B (en) * | 2022-01-24 | 2024-02-09 | Tcl华星光电技术有限公司 | Manufacturing method of array substrate and array substrate |
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| JP2001024323A (en) | 1999-07-12 | 2001-01-26 | Ibiden Co Ltd | Method for filling conductive paste and manufacture of single sided circuit board for multilayer printed wiring board |
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2007
- 2007-08-30 JP JP2007224596A patent/JP2009059814A/en active Pending
-
2008
- 2008-08-12 TW TW097130661A patent/TW200930197A/en unknown
- 2008-08-21 KR KR1020080081655A patent/KR20090023130A/en not_active Ceased
- 2008-08-26 US US12/230,219 patent/US20090057265A1/en not_active Abandoned
- 2008-08-29 DE DE102008045003A patent/DE102008045003A1/en not_active Withdrawn
- 2008-08-29 CN CNA2008102142887A patent/CN101378634A/en active Pending
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| US5440075A (en) * | 1992-09-22 | 1995-08-08 | Matsushita Electric Industrial Co., Ltd. | Two-sided printed circuit board a multi-layered printed circuit board |
| US5588207A (en) * | 1992-09-22 | 1996-12-31 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing two-sided and multi-layered printed circuit boards |
| US5401913A (en) * | 1993-06-08 | 1995-03-28 | Minnesota Mining And Manufacturing Company | Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board |
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| US20120012371A1 (en) * | 2009-04-02 | 2012-01-19 | Panasonic Corporation | Manufacturing method for circuit board, and circuit board |
| US20150359106A1 (en) * | 2012-12-31 | 2015-12-10 | Amogreentech | Flexible printed circuit board and method for manufacturing same |
| US9648753B2 (en) * | 2012-12-31 | 2017-05-09 | Amogreentech Co., Ltd. | Flexible printed circuit board and method for manufacturing same |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200930197A (en) | 2009-07-01 |
| CN101378634A (en) | 2009-03-04 |
| DE102008045003A1 (en) | 2009-03-05 |
| KR20090023130A (en) | 2009-03-04 |
| JP2009059814A (en) | 2009-03-19 |
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| AS | Assignment |
Owner name: DENSO CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SHIRAISHI, YOSHIHIKO;KONDO, KOUJI;YAZAKI, YOSHITARO;AND OTHERS;REEL/FRAME:021493/0281;SIGNING DATES FROM 20080804 TO 20080805 |
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| STCB | Information on status: application discontinuation |
Free format text: EXPRESSLY ABANDONED -- DURING EXAMINATION |